Abstract: In one implementation, a method is provided that comprises receiving a plurality of potential listings associated with an entity from a provider system. Each listing comprises a confidence score assigned by the provider system. A representative listing of the entity located on the provider system is designated from amongst the plurality of potential listings based on the confidence score. A first request is transmitted to synchronize the representative listing with the entity on the provider system. Responsive to receiving an indication that the request to synchronize is complete, a second request to suppress remaining listings of the potential listings as duplicates is provided. The remaining listings having confidence scores lower than the confidence score associated with the representative listing. The second request to suppress the remaining listings as duplicate listings is provided to the provider system using an API and a confirmation that the remaining listings are suppressed.

Abstract: Disclosed herein is a data estimation technique for a data intake and query system. The system receives user inputs indicative that a first data source is to be the subject of a storage related estimate. The system receives a first plurality of events generated by the first data source. The system indexes only a sample of the received first plurality of events, based on a sampling criterion, where the sample is fewer than all of the first plurality of events. The system generates the storage related estimate based on at least some of the first plurality of events, and causes an indication of the estimate to be output to a user.

Abstract: A wiring board includes an electronic component laterally surrounded by a stiffener, and a third routing circuitry disposed beyond the space laterally surrounded by the stiffener and extends over the stiffener. The electronic component includes a first routing circuitry, an encapsulant, an array of vertical connecting elements and a second routing circuitry integrated together. The mechanical robustness of the stiffener can prevent the wiring board from warping. The embedded semiconductor device is electrically coupled to the first routing circuitry and surrounded by the vertical connecting elements in electrical connection with the first and second routing circuitries. The first routing circuitry provides primary fan-out routing for another semiconductor device to be assembled on the wiring board, whereas the third routing circuitry not only provides further fan-out wiring structure, but also mechanically binds the electronic component with the stiffener.

Abstract: The wiring substrate includes a cavity and a plurality of metal leads disposed around the cavity. The metal leads are bonded with a resin compound and electrically connected to a buildup circuitry or a re-distribution layer under the cavity. The bottom of the cavity is covered by a dielectric layer of the buildup circuitry or the resin compound, and an aperture is formed through the dielectric layer of the buildup circuitry or the resin compound to be communicated with the cavity. As a result, a semiconductor device can be face-down disposed in the cavity and electrically connected to the buildup circuitry or the re-distribution layer by bonding wires extending through the aperture.

Abstract: The present disclosure provides bicontinuous microemulsions, and methods of using the bicontinuous microemulsions in the treatment of dry eye.

Abstract: Methods, systems, and computer readable media for modeling garments using single view images are disclosed. According to one method, the method includes receiving an image depicting a person wearing at least one garment. The method also includes constructing a body model based on the person in the image and a template from a body model database. The method further includes constructing at least one garment model based on the at least one garment in the image and at least one template from a garment model database. The method also includes constructing a combined model based on the body model and the at least one garment model. The method further includes adjusting the combined model by modifying body pose parameters and determining garment material properties and sizing parameters.

Abstract: An interconnect substrate includes vertical connection channels around a cavity. The vertical connection channels are made of a combination of metal posts and metallized vias. The cavity includes a recess in a core layer and an aperture in a stiffener. The metal posts, disposed over the top surface of the core layer, are sealed in the stiffener and are electrically connected to a buildup circuitry adjacent to the bottom surface of the core layer. The minimal height of the metal posts needed for the vertical connection can be reduced by the amount equal to the depth of the recess. The buildup circuitry is electrically connected to the metal posts through the metallized vias.

Abstract: Aspects of the present disclosure generally pertains a system and method for wireless inter-networking between a wireless wide area network (WWAN) and a local area network (WLAN) employing one or more extended range wireless inter-networking devices. Aspects of the present disclosure more specifically are directed toward a high powered wireless interconnect device that includes high efficiency circuitry to make it possible to implement in a portable or in-vehicle form factor, which may provide reasonable battery life, size, weight, and thermal dissipation.

Abstract: A face-to-face semiconductor assembly is characterized by a semiconductor device positioned in a dielectric recess of a core base and surrounded by an array of metal posts. The recess in the core provides lateral displacement control between the device and the metal posts, and the minimal height of the metal posts needed for the vertical connection between both opposite sides of the core base can be reduced by the amount equal to the depth of the recess. Further, the semiconductor device is face-to-face electrically coupled to another semiconductor device through a buildup circuitry therebetween.

Abstract: A semiconductor assembly includes an anti-warping controller, a semiconductor device, a balance layer and a first routing circuitry positioned within a through opening of a stiffener and a second routing circuitry positioned outside of the through opening of the stiffener and electrically connected to the first routing circuitry and a vertical connecting element of the stiffener. The mechanical robustness of the stiffener and the anti-warping controller can prevent the assembly from warping, whereas the vertical connecting element of the stiffener provides electrical connection between two opposite sides of the stiffener. The first routing circuitry can enlarge the pad size and pitch of the semiconductor device, whereas the second routing circuitry not only provides further fan-out wiring structure, but also mechanically binds the first routing circuitry with the stiffener.

Abstract: A package-on-package semiconductor assembly is characterized by a semiconductor device positioned in a dielectric recess of a core base and surrounded by an array of metal posts. The recess in the core provides lateral displacement control between the device and the metal posts, and the minimal height of the metal posts needed for the vertical connection between two both opposite sides of the core base can be reduced by the amount equal to the depth of the recess. Further, another semiconductor device is disposed over a top surface of the core base and is electrically coupled to the semiconductor device in the dielectric recess through a buildup circuitry under a bottom surface of the core base.

Abstract: An aluminum casting alloy has 8.5-9.5 wt. % silicon, 0.5-2.0 wt. % copper (Cu), 0.27-0.53 wt. % magnesium (Mg), wherein the aluminum casting alloy includes copper and magnesium such that 4.7?(Cu+10Mg)?5.8, and other elements, the balance being aluminum. Selected elements may be added to the base composition to give resistance to degradation of tensile properties due to exposure to heat. The thermal treatment of the alloy is calculated based upon wt. % composition to solutionize unwanted phases having a negative impact on properties and may include a three level ramp-up and soak to a final temperature followed by cold water quenching and artificial aging.

Abstract: A semiconductor assembly includes a face-to-face semiconductor sub-assembly electrically coupled to a circuit board by bonding wires. The face-to-face semiconductor sub-assembly includes top and bottom devices assembled on opposite sides of a routing circuitry, and is disposed in a through opening of the circuit board. The bonding wires provide electrical connections between the routing circuitry and the circuit board to interconnect the devices face-to-face assembled in the sub-assembly with the circuit board for next-level connection from two opposite sides of the circuit board.

Abstract: A method of making an interconnect substrate mainly includes steps of: providing metal posts around a stress modulator, providing a molding compound to bind the stress modulator and the metal posts, providing a crack inhibiting layer on the stress modulator and the molding compound and interfaces between the stress modulator and the molding compound, and depositing metal conductors on the crack inhibiting layer and electrically connected to the metal posts. The metal conductors have interconnect pads superimposed over the stress modulator so that bumps for device connection can be mounted at the area covered by the stress modulator, thereby avoiding cracking of the bumps.

Abstract: An earth boring bit has a bit body with a depending bearing pin, a cone rotatably mounted on the bearing pin, a seal gland between the cone and the bearing pin, and a seal assembly located in the seal gland. The seal assembly includes an annular metallic spring encircling the bearing pin. The spring has a geometric center line that extends in a circle around the bearing pin. The spring is elastically deformable in radial directions relative to the center line. An elastomeric layer is located on an exterior side of the spring and is biased by the spring against a surface of the seal gland.

Abstract: Described are apparatuses for improving resistive memory energy efficiency. An apparatus performs data-driven write to make use of asymmetric write switch energy between write0 and write1 operations. The apparatus comprises: a resistive memory cell coupled to a bit line and a select line; a first pass-gate coupled to the bit line; a second pass-gate coupled to the select line; and a multiplexer operable by input data, the multiplexer to provide a control signal to the first and second pass-gates or to write drivers according to logic level of the input data. An apparatus comprises circuit for performing read before write operation which avoids unnecessary writes with an initial low power read operation. An apparatus comprises circuit to perform self-controlled write operation which stops the write operation as soon as bit-cell flips. An apparatus comprises circuit for performing self-controlled read operation which stops read operation as soon as data is detected.

Abstract: Aspects of the present disclosure generally pertains a system and method for wireless inter-networking between a wireless wide area network (WWAN) and a local area network (WLAN) employing one or more extended range wireless inter-networking devices. Aspects of the present disclosure more specifically are directed toward a high powered wireless interconnect device that includes high efficiency circuitry to make it possible to implement in a portable or in-vehicle form factor, which may provide reasonable battery life, size, weight, and thermal dissipation.

Abstract: A thermally enhanced semiconductor assembly with three dimensional integration includes a stacked semiconductor sub-assembly electrically coupled to a wiring board by bonding wires. A heat spreader that provides an enhanced thermal characteristic for the stacked semiconductor sub-assembly is disposed in a through opening of a wiring structure. Another wiring structure disposed on the heat spreader not only provides mechanical support, but also allows heat spreading and electrical grounding for the heat spreader by metallized vias. The bonding wires provide electrical connections between the sub-assembly and the wiring board for interconnecting devices assembled in the sub-assembly to terminal pads provided in the wiring board.

Abstract: A face-to-face semiconductor assembly is characterized in that first and second semiconductor devices are face-to-face mounted on two opposite sides of a first routing circuitry and is further electrically connected to an interconnect board through the first routing circuitry. The interconnect board has a heat spreader to provide thermal dissipation for the second semiconductor device, and a second routing circuitry formed on the heat spreader and electrically coupled to the first routing circuitry. The first routing circuitry provides primary fan-out routing for the first and second semiconductor devices, whereas the second routing circuitry provides further fan-out wiring structure for the first routing circuitry.

Abstract: New magnesium-zinc aluminum alloy bodies and methods of producing the same are disclosed. The new magnesium-zinc aluminum alloy bodies generally include 3.0-6.0 wt. % magnesium and 2.5-5.0 wt. % zinc, where at least one of the magnesium and the zinc is the predominate alloying element of the aluminum alloy bodies other than aluminum, and wherein (wt. % Mg)/(wt. % Zn) is from 0.6 to 2.40, and may be produced by preparing the aluminum alloy body for post-solutionizing cold work, cold working by at least 25%, and then thermally treating. The new magnesium-zinc aluminum alloy bodies may realize improved strength and other properties.