Abstract: An apparatus for acquiring intraoral images of a subject has an OCT imaging apparatus having an OCT light source, a scanner that conveys OCT light toward the subject and returned from the subject, and an interferometer having a reference arm and a sample arm. A reflectance imaging apparatus has a visible light source directed toward the subject and an image sensor that forms a reflectance image from returned light. Processing and control logic are configured to process and combine the returned reflectance image to the OCT measured data. A display shows the combined reflectance image and OCT measured data.

Abstract: The invention features combination therapies using an IL-15-based superagonist complex and an antibody to effectively treat subjects with cancer and infectious diseases.

Abstract: The invention features multi-specific fusion protein complexes with one domain comprising IL-15 or a functional variant and a binding domain specific to IL-12 or IL-18.

Abstract: A method and system for fabricating a dental appliance for orthodontic treatment. The method comprises the steps of obtaining three-dimensional dental data from a patient scan, locating initial tooth positions, generating optimal arch forms, and determining a digital model for fabricating an orthodontic aligner with additive device. The system comprises a scanning apparatus to acquire three-dimensional dental data, and a computer apparatus programmed with instructions for generating optimal arch forms, and determining a digital model for fabricating an orthodontic aligner with additive device.

Abstract: The present invention features compositions and methods featuring ALT-803, a complex of an interleukin-15 (IL-15) superagonist mutant and a dimeric IL-15 receptor ?/Fc fusion protein useful for enhancing an immune response against a neoplasia (e.g., multiple myeloma, melanoma, lymphoma) or a viral infection (e.g., human immunodeficiency virus).

Abstract: An apparatus for acquiring intraoral images of a subject has an OCT imaging apparatus having an OCT light source, a scanner that conveys OCT light toward the subject and returned from the subject, and an interferometer having a reference arm and a sample arm. A reflectance imaging apparatus has a visible light source directed toward the subject and an image sensor that forms a reflectance image from returned light. Processing and control logic are configured to process and combine the returned reflectance image to the OCT measured data. A display shows the combined reflectance image and OCT measured data.

Abstract: The present disclosure relates to methods that include the use of a first multi-chain chimeric polypeptide and a second multi-chain chimeric polypeptide for stimulating the NK cells, inducing or increasing proliferation of the NK cells, inducing differentiation of the NK cells, and treating a subject in need thereof using activated NK cells.

Abstract: An aircraft includes a machine body that encloses a turbofan gas turbine engine and a plurality of ancillary systems. The turbofan gas turbine engine includes, in axial flow sequence, a first heat exchanger module, a fan assembly, a compressor module, a combustor module, a turbine module, and an exhaust module. The aircraft includes a second heat exchanger module. The machine body comprises a single fluid inlet aperture, with the fluid inlet aperture being configured to allow a fluid cooling flow to enter the machine body and to pass through the first heat exchanger module. When a temperature of the fluid cooling flow is less than a temperature of a fluid to be cooled, the fluid to be cooled is directed to the first heat exchanger module, and when a temperature of the fluid cooling flow is greater than a temperature of the fluid to be cooled, the fluid to be cooled is directed to the second heat exchanger module and cooled using a fuel supply for the gas turbine engine.

Abstract: Techniques are disclosed relating to improving memory reliability, e.g., in the context of memory circuits with limited reliability features. In some embodiments, memory controller circuitry is configured to communicate with memory circuitry via an interface that supports link error detection. The memory controller circuitry may, based on a corruption indicator, transmit a data and parity combination for the first data block that causes the memory circuitry to detect an uncorrectable write interface error. Subsequent reads of the location may therefore cause an uncorrectable error indication. This may advantageously allow the memory controller circuitry to propagate a corruption indicator as an uncorrectable error in the memory circuit, without requiring additional tracking of the indicator by the memory circuit or memory controller, in some embodiments.

Abstract: Provided herein are multi-chain chimeric polypeptides and use thereof in reducing neuroinflammation in a subject.

Abstract: Method and/or apparatus embodiments for 3-D cephalometric analysis of a patient according to the application can display reconstructed volume image data from a computed tomographic scan of a patient's head including segmented dentition elements having an initial arrangement from one or more 2D/3D views; can compute and display a plurality of cephalometric parameters for the patient according to the reconstructed volume image data; then use the patient specific cephalometric parameters and population biometry data, to identify one or more maxillofacial/dental abnormalities; and compose patient specific treatment plans to correct selected dentition abnormalities using maxillofacial/dental structure, which can be composed in a final tooth arrangement in a final virtual CT volume. One or more aligners can be generated to incrementally move dentition from the initial arrangement to the final tooth arrangement.

Abstract: Techniques are disclosed relating to improving memory reliability. In some embodiments, memory circuitry includes memory cells configured to store data, interface circuitry, and on-die error correcting code (ECC) circuitry. The ECC circuitry may check read data from the memory cells for errors and correct detected correctable errors to generate corrected data. The memory circuitry may provide read data to a requesting circuit via the interface circuitry, including one or more sets of corrected data from the on-die ECC circuitry. The memory circuitry may provide a decoding status flag (DSF) via the interface circuitry, including to: set the DSF to a first value in response to no error being detected for a given set of provided read data, set the DSF to a second value in response to a correctable error that was detected and corrected by the on-die ECC circuitry to provide a given set of read data, and set the DSF to a third value in response to an uncorrectable error detected by the on-die ECC circuitry.

Abstract: An electronic circuit includes a differential output circuit that produces a differential output signal at a differential output. A primary winding of a balun has a first balun terminal coupled to a first differential output terminal, and a second balun terminal coupled to a second differential output terminal. A configurable harmonic reduction circuit includes first and second configurable shunt capacitance circuits coupled between the first differential output terminal or the second differential output terminal, respectively, and a ground reference node. A control circuit receives tuning data associated with a calibrated tuning state. The tuning data indicates a first and second calibrated capacitance values, which are unequal, for the first and second configurable shunt capacitance circuits, respectively.

Abstract: Method and apparatus embodiments can generate a volume fluorescence image of a tooth. Method and apparatus embodiments can project structured light patterns onto a tooth and generate a contour (volume) image of the tooth surface from acquired corresponding structured light projection images; then acquire one or more fluorescence images of the tooth generated under blue-UV illumination. A composite image that shows fluorescence image content mapped to the generated contour image can be transmitted, stored, modified and/or displayed.

Abstract: A turbofan gas turbine engine comprises, in axial flow sequence, a heat exchanger module, a fan assembly, a compressor module, and a turbine module. The fan assembly comprises a plurality of fan blades defining a fan diameter (D). The heat exchanger module comprises a plurality of heat transfer elements. The heat exchanger module is in fluid communication with the fan assembly by an inlet duct. The inlet duct has a fluid path length along a central axis of the inlet duct between a downstream-most face of the heat transfer elements and an upstream-most face of the fan assembly. The fluid path length is less than 10.0*D.

Abstract: A turbofan gas turbine engine includes, in axial flow sequence, a heat exchanger module, a fan assembly, a compressor module, and a turbine module. The fan assembly includes a plurality of fan blades defining a fan diameter, and the heat exchanger module is in fluid communication with the fan assembly by an inlet duct. The heat exchanger module includes a plurality of heat transfer elements for transfer of heat from a first fluid contained within the heat transfer elements to an airflow passing over a surface of the heat transfer elements prior to entry of the airflow into an inlet to the fan assembly. At full-power condition, the engine produces a maximum thrust T (N), the heat exchanger module transfers a maximum heat rejection H (W) from the first fluid to the airflow, and a Heat Exchanger Performance parameter PEX (W/N) defined as PEX=H/T is 0.4 to 6.0.

Abstract: A method of fabricating a gate with a mini field plate includes forming a dielectric passivation layer over an epitaxy layer on a substrate, coating the dielectric passivation layer with a first resist layer, etching the first resist layer and the dielectric passivation layer to form a first opening in the dielectric passivation layer, removing the first resist layer; and forming a tri-layer gate having a gate foot in the first opening, the gate foot having a first width, a gate neck extending from the gate foot and extending for a length over the dielectric passivation layer on both sides of the first opening, the gate neck having a second width wider than the first width of the gate foot, and a gate head extending from the gate neck, the gate head having a third width wider than the second width of the gate neck.

Abstract: Embodiments of a calibration system for third order intermodulation distortion (IMD3) cancellation and a wireless apparatus are disclosed. In an embodiment, a calibration system for IMD3 cancellation includes a cancellation circuit for IMD3 cancellation between a first transmitter and a second transmitter, and a controller coupled to the cancellation circuit and configured to for each frequency channel of the first transmitter, perform a pre-conditional calibration of the cancellation circuit, after the pre-conditional calibration, determine a phase configuration for the cancellation circuit, and after the phase configuration for the cancellation circuit is determined, determine an attenuation configuration for the cancellation circuit.

Abstract: A base station in a first wireless network provides first wireless connectivity to user equipment operated by a subscriber. The first wireless network supports first wireless communications such as non-voice communications. A network management resource receives configuration information assigned to the subscriber operating the user equipment. The configuration information indicates that the subscriber is assigned use of a second wireless network that provides support of second wireless communications (such as voice communications). In response to detecting a trigger event (such as a voice call) indicating a need to switch to use of the second wireless network, the network management resource initiates termination of the first wireless connectivity and establishment of second wireless connectivity between the user equipment and a base station in the second wireless network.

Abstract: A double sidewall image transfer process for forming FinFET structures having a fin pitch of less than 40 nm generates paired fins with a spacing determined by the width of a sidewall spacer that forms a second mandrel. Here, the fin pairs are created at two different spacings without requiring the minimum space for the standard sidewall structure. An enlarged space between paired fins is created by placing two first mandrel shapes close enough so as to overlap or merge two sidewall spacer shapes so as to form a wider second mandrel upon further processing. The fin pair created from the wider second mandrel is spaced at about 2 times the fin pair created from the narrower second mandrel. For some circuits, such as an SRAM bitcell, the wider second mandrel can be utilized to form an inactive fin not utilized in the circuit structure, which can be removed. In some embodiments, all dummy inactive fins are eliminated for a simpler process.