Abstract: A toy building block set includes a socket block piece and at least one of first and second plug block pieces. The socket block piece has a socket wall body and at least one engaging hole of a regular polygonal shape. Each of the first and second plug block pieces has a plug body and at least one polygonal insert plug configured to be inserted into and in frictional engagement with the engaging hole with a first frictional force to permit rotation of the plug block piece relative to the socket block piece by a forcible torque and to keep a predetermined angle of the plug block piece relative to the socket block piece when the forcible torque is removed. The plug body is partially inserted into and in frictional engagement with the engaging hole with a second frictional force larger than the first frictional force.

Abstract: In some embodiments, the present disclosure relates to a method of forming an integrated chip. The method includes doping a substrate to form a first well region having a first doping type, and selectively etching an upper surface of the substrate to define a trench extending into the first well region. The trench is filled with one or more dielectric materials. The substrate is implanted to form a first photodiode region within the substrate. The first photodiode region is separated from the trench by the first well region. A first part of the one or more dielectric materials is removed from within the trench to expose a sidewall of the substrate that defines the trench and that is proximate to the first photodiode region. A doped epitaxial material having the first doping type is formed along the sidewall of the substrate.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip has a photodetector region arranged within a semiconductor substrate. One or more dielectric materials are disposed within a trench defined by one or more interior surfaces of the semiconductor substrate. A doped epitaxial material is arranged within the trench and is laterally between the one or more dielectric materials and the photodetector region. A dielectric protection layer is arranged over the one or more dielectric materials within the trench. The dielectric protection layer laterally contacts a sidewall of the doped epitaxial material.

Abstract: In some embodiments, the present disclosure relates to an integrated chip having a photodetector arranged within a semiconductor substrate having a first doping type. One or more dielectric materials are disposed within a trench defined by interior surfaces of the semiconductor substrate. A doped epitaxial material arranged within the trench at a location laterally between the one or more dielectric materials and the photodetector. The doped epitaxial material has a second doping type that is different than the first doping type.

Abstract: A photosensor device and the method of making the same are provided. In one embodiment, the device includes at least one pixel cell. The at least one pixel cell includes a substrate formed from a semiconductor material, and includes first and second photosensor regions. The first photosensor region is disposed in the substrate and includes a first dopant of a first conductivity type. The second photosensor region is disposed above the first photosensor region and includes a second dopant of a second conductivity type. The second photosensor region can have an increase in dopant concentration from an outer edge to a center portion therein.

Abstract: A semiconductor arrangement is provided. The semiconductor arrangement includes a first conductive element over a substrate and a second conductive element over the substrate. A dielectric region is over a top surface of the substrate and between the first conductive element and the second conductive element. An electrically conductive structure is over the first conductive element, the second conductive element, and the dielectric region.

Abstract: A method for forming an integrated circuit (IC) package is provided. In some embodiments, a semiconductor workpiece comprising a scribe line, a first IC die, a second IC die, and a passivation layer is formed. The scribe line separates the first and second IC dies, and the passivation layer covers the first and second IC dies. The first IC die comprises a circuit and a pad structure electrically coupled to the circuit. The pad structure comprises a first pad, a second pad, and a bridge. The bridge is within the scribe line and connects the first pad to the second pad. The passivation layer is patterned to expose the first pad, but not the second pad, and testing is performed on the circuit through the first pad. The semiconductor workpiece is cut along the scribe line to individualize the first and second IC dies, and to remove the bridge.

Abstract: A MEMS device includes a first layer and a second layer including a same material, a third layer disposed between the first layer and the second layer, a first air gap separating the first layer and the third layer, a second air gap separating the second layer and the third layer, a plurality of first pillars exposed to the first air gap and arranged in contact with the first layer and the third layer, a plurality of second pillars exposed to the second air gap and arranged in contact with the second layer and the third layer.

Abstract: The present invention discloses a high density retinal prosthesis system with equalization comprises a retinal prosthesis chip, a measuring device, a tuning device, and a transmitting device. After the measuring device capable of generating electrical induction with the retinal prosthesis chip obtains a degree of light stimulation received by pixel units in the retinal prosthesis chip, it is equalized by the tuning device, and then a calibration signal is fed to the pixel units to tune the pixel units to make the pixel units in the retinal prosthesis system to achieve an equalization effect.

Abstract: In some embodiments, the present disclosure relates to a method of forming an integrated chip. The method includes doping a substrate to form a first well region having a first doping type, and selectively etching an upper surface of the substrate to define a trench extending into the first well region. The trench is filled with one or more dielectric materials. The substrate is implanted to form a first photodiode region within the substrate. The first photodiode region is separated from the trench by the first well region. A first part of the one or more dielectric materials is removed from within the trench to expose a sidewall of the substrate that defines the trench and that is proximate to the first photodiode region. A doped epitaxial material having the first doping type is formed along the sidewall of the substrate.

Abstract: A photosensor device and the method of making the same are provided. In one embodiment, the device includes at least one pixel cell. The at least one pixel cell includes a substrate formed from a semiconductor material, and includes first and second photosensor regions. The first photosensor region is disposed in the substrate and includes a first dopant of a first conductivity type. The second photosensor region is disposed above the first photosensor region and includes a second dopant of a second conductivity type. The second photosensor region can have an increase in dopant concentration from an outer edge to a center portion therein.

Abstract: A method for forming an integrated circuit (IC) package is provided. In some embodiments, a semiconductor workpiece comprising a scribe line, a first IC die, a second IC die, and a passivation layer is formed. The scribe line separates the first and second IC dies, and the passivation layer covers the first and second IC dies. The first IC die comprises a circuit and a pad structure electrically coupled to the circuit. The pad structure comprises a first pad, a second pad, and a bridge. The bridge is within the scribe line and connects the first pad to the second pad. The passivation layer is patterned to expose the first pad, but not the second pad, and testing is performed on the circuit through the first pad. The semiconductor workpiece is cut along the scribe line to individualize the first and second IC dies, and to remove the bridge.

Abstract: A method of forming a protective film on at least one electronic module is provided. The method includes the following steps. A protective material is disposed on at least one electronic module such that the protective material and the electronic modules are in contact with each other. The electronic modules and the protective material disposed on the electronic modules are disposed in a chamber, and a first ambient pressure is provided in the chamber. The protective material in the chamber is heated to a first temperature to soften the protective material disposed on the electronic modules. After the protective material is softened, a second ambient pressure greater than the first ambient pressure is provided in the chamber, wherein a gas in the chamber directly pressurizes the protective material such that the protective material conformally covers a top of the electronic modules.

Abstract: A micro electro mechanical system (MEMS) microphone includes a first membrane, a second membrane, a third membrane disposed between the first membrane and the second membrane, a first cavity disposed between the first membrane and the third membrane and surrounded by a first wall, a second cavity disposed between the second membrane and the third membrane and surrounded by a second wall, and one or more first supports disposed in the first cavity and connecting the first membrane and the third membrane.

Abstract: A method for forming an integrated circuit (IC) package is provided. In some embodiments, a semiconductor workpiece comprising a scribe line, a first IC die, a second IC die, and a passivation layer is formed. The scribe line separates the first and second IC dies, and the passivation layer covers the first and second IC dies. The first IC die comprises a circuit and a pad structure electrically coupled to the circuit. The pad structure comprises a first pad, a second pad, and a bridge. The bridge is within the scribe line and connects the first pad to the second pad. The passivation layer is patterned to expose the first pad, but not the second pad, and testing is performed on the circuit through the first pad. The semiconductor workpiece is cut along the scribe line to individualize the first and second IC dies, and to remove the bridge.

Abstract: Some embodiments relate to a bond pad structure of an integrated circuit (IC). The bond structure includes a bond pad and an intervening metal layer positioned below the bond pad. The intervening metal layer has a first face and a second face. A first via layer is in contact with the first face of intervening metal layer. The first via layer has a first via pattern. The bond structure also includes a second via layer in contact with the second face of the intervening metal layer. The second via layer has a second via pattern that is different than first via pattern. The second via pattern includes a first group of elongated vias extending in parallel with one another in a first direction and a second group of vias in between the first group of elongated vias. The second group of vias extend in a second direction orthogonal to the first direction.

Abstract: The invention provides a system for artificial retinal prosthesis with color vision comprising an artificial retinal prosthesis implanted in a user's body. The artificial retinal prosthesis comprises a plurality of pixel units and a color shutter integrated with the plurality of pixel units structurally. The plurality of pixel units are used to receive an external visual image that enters the eyes of the user, and output a spatiotemporal electrical stimulation to the user's optic nerve according to the external visual image. The color shutter connects with the plurality of pixel units, and determines a spectrum that is allowed to enter the eyes to allow the user to generate a color image perception. By allowing stimulation of the artificial retinal prosthesis to vary with different spaces and times, and synchronously controlling the spectrum that is allowed to enter the eyes, thereby assisting the patient in obtaining color visual perception.

Abstract: The present invention relates to a system for artificial retinal prosthesis comprising a pixel array, a correlated double sampling unit, an analog-to-digital converter, a digital core, and a digital-to-analog converter. The system stimulates retinal cells row-to-row, and therefore can effectively reduce large transient currents and avoid unfavorable condition of power drop due to large transient currents.