Patents by Inventor Chang-An Hsieh

Chang-An Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9153483
    Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: October 6, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Feng Shieh, Wen-Hung Tseng, Hung-Chang Hsieh
  • Patent number: 9140976
    Abstract: A lithography mask and method for manufacturing such mask that includes optically isolated via features and proximity correction features. The via patterns that include via features that define vias are positioned on the mask in rows and columns with a row and a column pitch between each row and column on the mask. The via patterns are positioned such that via features that are in adjacent columns are separated by at least one intervening row between them. The via patterns can also be positioned such that the via patterns that are in adjacent rows are separated by at least one intervening column between them. As a result, the via feature of each via pattern and the associated optical proximity correction features that are positioned around each via feature do not overlap with the optical proximity correction features and the via features of the surrounding via patterns.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 22, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Chih-Chang Hsieh, Shih-Hung Chen, Hang-Ting Lue
  • Patent number: 9130103
    Abstract: The present invention is directed to a light-emitting diode (LED) device, which includes at least one LED unit. Each LED unit includes at least one LED, which includes a first doped layer, a second doped layer and a conductive defect layer. The conductive defect layer is formed on the first or second doped layer. The conductive defect layer may be deposited between two LEDs, or between the first/second doped layer and an electrode.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: September 8, 2015
    Assignee: PHOSTEK, INC.
    Inventor: Yen-Chang Hsieh
  • Publication number: 20150249039
    Abstract: A method of fabricating a fin-like field-effect transistor (FinFET) device includes providing a substrate having a first region and a second region, and forming a plurality of mandrel features in the first region with a first spacing. The method further includes forming first spacers along sidewalls of the mandrel features with a targeted width A, and forming second spacers with a first width W1 along sidewalls of the first spacers, wherein two back-to-back adjacent second spacers are separated by a gap. The method further includes depositing a dielectric material in the gap and in the second region, and performing a first cut thereby removing a first subset of the first spacers. Coincident with the removing of the first subset, the method further includes partially removing the dielectric material in the second region thereby forming a mesa of the dielectric material in the second region.
    Type: Application
    Filed: May 13, 2015
    Publication date: September 3, 2015
    Inventors: Ming-Feng Shieh, Hung-Chang Hsieh, Han-Wei Wu
  • Publication number: 20150243500
    Abstract: A method for forming a photoresist layer on a semiconductor device is disclosed. An exemplary includes providing a wafer. The method further includes spinning the wafer during a first cycle at a first speed, while a pre-wet material is dispensed over the wafer and spinning the wafer during the first cycle at a second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer during a second cycle at the first speed, while the pre-wet material continues to be dispensed over the wafer and spinning the wafer during the second cycle at the second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer at a third speed, while a photoresist material is dispensed over the wafer including the pre-wet material.
    Type: Application
    Filed: May 8, 2015
    Publication date: August 27, 2015
    Inventors: Chun-Wei Chang, Chih-Chien Wang, Wang-Pen Mo, Hung-Chang Hsieh
  • Publication number: 20150212420
    Abstract: A method for preparing a wafer includes forming a film layer on a substrate of the wafer; coating the film layer with a photoresist layer; exposing a first portion of the photoresist layer to a beam of light; and patterning a second portion of the photoresist layer after performing exposing the first portion of the photoresist layer. A cross-link reaction is caused on the first portion of the photoresist layer and the first portion of the photoresist layer is converted to a reacted first portion of the photoresist layer. The reacted first portion of the photoresist layer is near an edge of the wafer. The second portion of the photoresist layer is different from the reacted first portion of the photoresist layer. The second portion of the photoresist layer is converted to a patterned second portion of the photoresist layer.
    Type: Application
    Filed: April 7, 2015
    Publication date: July 30, 2015
    Inventors: Chun-Wei CHANG, Wang-Pen MO, Hung-Chang HSIEH
  • Patent number: 9092055
    Abstract: A method for BCI control is utilized to control a plurality of brain control devices. The brain control devices are capable of executing an operation themselves. A brain-wave control platform is provided for supplying a first signal and a second signal, wherein the first and second signals are utilized to visually evoke a user's first and second brain waves, respectively. The brain-wave control platform selects one of the brain control devices as a to-be-controlled device by the first brain wave, and the to-be-controlled device is controlled to finish an operation by the second brain wave.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: July 28, 2015
    Assignee: SOUTHERN TAIWAN UNIVERSITY
    Inventors: Shih-Chung Chen, Shih-Chang Hsieh, Wei-Jhe Hung
  • Patent number: 9070688
    Abstract: A semiconductor device includes a semiconductor substrate, a first active region in the semiconductor substrate, and a second active region in the semiconductor substrate. The semiconductor device further includes a first conductive line over the semiconductor substrate electrically connected to the first active region and having a first end face adjacent to the second active region, and the first end face having an image log slope of greater than 15 ?m?1.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: June 30, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jhun Hua Chen, Yu-Lung Tung, Chi-Tien Chen, Hua-Tai Lin, Hsiang-Lin Chen, Hung-Chang Hsieh, Yi-Fan Chen
  • Publication number: 20150147867
    Abstract: A method of fabricating a fin-like field-effect transistor (FinFET) device is disclosed. A plurality of mandrel features are formed on a substrate. First spacers are formed along sidewalls of the mandrel feature and second spacers are along sidewalls of the first spacers. Two back-to-back adjacent second spacers separate by a gap in a first region and merge together in a second region of the substrate. A dielectric feature is formed in the gap and a dielectric mesa is formed in a third region of the substrate. A first subset of the first spacer is removed in a first cut. Fins and trenches are formed by etching the substrate using the first spacer and the dielectric feature as an etch mask.
    Type: Application
    Filed: November 25, 2013
    Publication date: May 28, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Feng Shieh, Hung-Chang Hsieh, Han-Wei Wu
  • Publication number: 20150142573
    Abstract: The present invention discloses systems and methods for storing pictures on a cloud platform and printing the pictures from different locations. The system may include a first network device to upload a plurality of image files to a private space on a cloud platform, the cloud platform selectively assigning a unique access code to a set of image files or a single image file within the plurality of image files, and a second network device, which is different from the first network device. The second network device may include a transmitter to communicate with the cloud platform electronically so as to access related image files utilizing the unique access code, wherein the set of image files or the single image file within the plurality of image files may have a respective privacy setting.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 21, 2015
    Inventors: Hung-Chan Chien, Chang-Hsieh Lee, Shih-Hung Lin
  • Patent number: 9034723
    Abstract: A method of fabricating a fin-like field-effect transistor (FinFET) device is disclosed. A plurality of mandrel features are formed on a substrate. First spacers are formed along sidewalls of the mandrel feature and second spacers are along sidewalls of the first spacers. Two back-to-back adjacent second spacers separate by a gap in a first region and merge together in a second region of the substrate. A dielectric feature is formed in the gap and a dielectric mesa is formed in a third region of the substrate. A first subset of the first spacer is removed in a first cut. Fins and trenches are formed by etching the substrate using the first spacer and the dielectric feature as an etch mask.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: May 19, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Feng Shieh, Hung-Chang Hsieh, Han-Wei Wu
  • Publication number: 20150132973
    Abstract: An ultraviolet curing apparatus includes a chamber, a gas flow generator, and an ultraviolet lamp. The gas flow generator includes a top liner and a bottom liner coupled to each other. The top liner and the bottom liner are disposed in the chamber, and are made of low-coefficient of thermal expansion material. The ultraviolet lamp is disposed on the chamber and is configured for providing ultraviolet light.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 14, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Teng-Da Hung, Liang-Chang Hsieh, Chun-Lung Lin, Hsin-Hung Chi, Yun-Wen Chu, Jiun-Wei Su
  • Publication number: 20150134843
    Abstract: A method of establishing network connection for peer-to-peer connection between a first network device and a second network device includes a first server receiving a connection request package from the first network device according to a first match table. The first server confirms the second network device being connected thereto. The first server confirms the address type of the first network device and the second network device and transmits a connection signaling package to the second network device. The first server receives a connection response package sent by the second network device according to a second match table and the first server confirms connection according to the connection request package and the connection response package. Then, the first network device and the second network device establish connection.
    Type: Application
    Filed: November 10, 2014
    Publication date: May 14, 2015
    Inventors: CHING-CHANG HSIEH, YU-CHUAN KAO, CHIH-CHUNG WU
  • Patent number: 9028915
    Abstract: A method for forming a photoresist layer on a semiconductor device is disclosed. An exemplary includes providing a wafer. The method further includes spinning the wafer during a first cycle at a first speed, while a pre-wet material is dispensed over the wafer and spinning the wafer during the first cycle at a second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer during a second cycle at the first speed, while the pre-wet material continues to be dispensed over the wafer and spinning the wafer during the second cycle at the second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer at a third speed, while a photoresist material is dispensed over the wafer including the pre-wet material.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wei Chang, Chih-Chien Wang, Wang-Pen Mo, Hung-Chang Hsieh
  • Publication number: 20150128098
    Abstract: A method of lithographic defect detection and repair is disclosed. In an exemplary embodiment, the method of patterning a workpiece comprises receiving a mask for patterning a workpiece. The mask is inspected for defects, and a mask defect is identified that is repairable in the workpiece. The workpiece is lithographically exposed using the mask, and a defect is repaired within the workpiece based on the identified mask defect. The method may further comprise comparing defects across the workpiece to determine repeating defects and determining a spacing between repeating defects. A distance between a first focal point and a second focal point of a lithographic system may be configured to correspond to the spacing between repeating defects. Thus, a first repeating defect and a second repeating defect may be repaired concurrently.
    Type: Application
    Filed: November 4, 2013
    Publication date: May 7, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Ming Chang, Chih-Ming Lai, Hung-Chang Hsieh
  • Patent number: 9025787
    Abstract: An earphone plug with a mode switching function is presented. The earphone plug includes a terminal and a switching device. The terminal has a plurality of electrodes to transmit signals. The switching device is combined with the terminal, and is capable of switching between a first mode and a second mode, and part of the electrodes of the terminal are electrically connected together, so as to achieve mode switching to perform processing on different transmission signals.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: May 5, 2015
    Assignee: Merry Electronics Co., Ltd.
    Inventors: Chiu-Yun Tung, Fang-Chang Hsieh, Yuan-Hsing Wu, Chiung-Wen Yeh
  • Publication number: 20150118837
    Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.
    Type: Application
    Filed: October 30, 2013
    Publication date: April 30, 2015
    Inventors: Ming-Feng Shieh, Wen-Hung Tseng, Hung-Chang Hsieh
  • Publication number: 20150111362
    Abstract: A method of fabricating a fin-like field-effect transistor device is disclosed. The method includes forming mandrel features over a substrate and performing a first cut to remove mandrel features to form a first space. The method also includes performing a second cut to remove a portion of mandrel features to form a line-end and an end-to-end space. After the first and the second cuts, the substrate is etched using the mandrel features, with the first space and the end-to-end space as an etch mask, to form fins. Depositing a space layer to fully fill in a space between adjacent fins and cover sidewalls of the fins adjacent to the first space and the end-to-end space. The spacer layer is etched to form sidewall spacers on the fins adjacent to the first space and the end-to-end space and an isolation trench is formed in the first space and the end-to-end space.
    Type: Application
    Filed: October 18, 2013
    Publication date: April 23, 2015
    Inventors: Ming-Feng Shieh, Weng-Hung Tseng, Tzung-Hua Lin, Hung-Chang Hsieh
  • Publication number: 20150109844
    Abstract: An integrated circuit and an operating method for the same are provided. The integrated circuit comprises a stacked structure and a conductive structure. The stacked structure comprises a conductive strip. The conductive structure is disposed above the stacked structure and electrically connected to the conductive strip. The conductive structure and the conductive strip have various gap distances between corresponding points of different pairs according to a basic axis.
    Type: Application
    Filed: October 21, 2013
    Publication date: April 23, 2015
    Applicant: Macronix International Co., Ltd.
    Inventors: Teng-Hao Yeh, Hang-Ting Lue, Yen-Hao Shih, Chih-Chang Hsieh, Chih-Wei Hu
  • Publication number: 20150108551
    Abstract: A method of fabricating a fin-like field-effect transistor (FinFET) device is disclosed. The method includes forming a mandrel features over a substrate, the mandrel feature and performing a coarse cut to remove one or more mandrel features to form a coarse space. After the coarse cut, the substrate is etched by using the mandrel features, with the coarse space as an etch mask, to form fins. A spacer layer is deposited to fully fill in a space between adjacent fins and cover sidewalls of the fins adjacent to the coarse space. The spacer layer is etched to form sidewall spacers on the fins adjacent to the coarse space. A fine cut is performed to remove a portion of one or more mandrel features to form an end-to-end space. An isolation trench is formed in the end-to-end space and the coarse space.
    Type: Application
    Filed: October 18, 2013
    Publication date: April 23, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Feng Shieh, Weng-Hung Tseng, Tzung-Hua Lin, Hung-Chang Hsieh