Patents by Inventor Chang Huang

Chang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11618822
    Abstract: An organic-inorganic hybrid resin is formed by reacting a polyol organic resin with a polysilsesquioxane polymer. The organic-inorganic hybrid resin has T0, T1, T2, and T3 signals of 29Si-NMR, wherein a ratio of the sum of 3 times the integral value of T0 signal and 2 times the integral value of T1 signal and the integral value of T2 signal and the integral value of T3 signal ((3T0+2T1+T2)/T3) is from 0.3 to 1.2, wherein the T0 signal range is 35 ppm to 40 ppm, the T1 signal range is 48 ppm to 53 ppm, the T2 signal range is 55 ppm to 62 ppm, and the T3 signal range is 63 ppm to 72 ppm.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: April 4, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yuan-Chang Huang, Shu-Yun Chien, Ya-Tin Yu, Wei-Cheng Tang
  • Patent number: 11607758
    Abstract: A device for lifting and tightening screws includes a transporting unit to move the device to a screw suction position or a screw locking position, a suction nozzle unit, a vacuum generator, and an electronic screwdriver unit. When the device is moved to a position to attract and apply suction to a screw, the suction nozzle unit captures a screw. When the device is moved to the screw locking position, the electronic screwdriver unit tightens the screw. The device prevents the suction nozzle from contacting the workpiece, guides a suction position of the screw, and can function in relation to screw holes surrounded by steps and barriers.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: March 21, 2023
    Assignees: FOXCONN PRECISION ELECTRONICS (TAIYUAN) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Ming-Ya Wang, Yong Liu, Jen-Chang Huang, Wen-Shou Tseng
  • Publication number: 20230078296
    Abstract: A semiconductor structure, including a substrate, a first well, a second well, a first doped region, a second doped region, a first gate structure, a first insulating layer, and a first field plate structure. The first and second wells are disposed in the substrate. The first doped region is disposed in the first well. The second doped region is disposed in the second well. The first gate structure is disposed between the first and second doped regions. The first insulating layer covers a portion of the first well and a portion of the first gate structure. The first field plate structure is disposed on the first insulating layer, and it partially overlaps the first gate structure. Wherein the first field plate structure is segmented into a first partial field plate and a second partial field plate separated from each other along a first direction.
    Type: Application
    Filed: September 16, 2021
    Publication date: March 16, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Kai-Chieh HSU, Chun-Chih CHEN, Chih-Hsuan LIN
  • Publication number: 20230065723
    Abstract: The present disclosure relates to an electroplating system including a first contact detection sensor and a second contact detection sensor disposed at a surface of a cone of the electroplating system. The first contact detection sensor detects a first resistance at a first contact between a substrate to be plated by the electroplating system and a first contact pin, the second contact detection sensor detects a second resistance at a second contact between the substrate and a second contact pin. A controller receives the first resistance and the second resistance, and determines the first contact and the second contact are not properly formed when a difference between the first resistance and the second resistance is not within a first predetermined resistance range, or the first resistance or the second resistance is not within a second predetermined resistance range.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Yung Chang HUANG
  • Patent number: 11590822
    Abstract: A mechanism is provided for controlling the internal air-quality of a vehicle, including configuring a control policy that controls an internal air-quality of a vehicle and performing an action dictated by the control policy according to a window status of the vehicle.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: February 28, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ning Duan, Jing Chang Huang, Peng Ji, Chun Yang Ma, Zhi Hu Wang, Renjie Yao
  • Publication number: 20230057823
    Abstract: The present application relates to a dispatch method for a production line in a semiconductor process, a storage medium and a semiconductor device. The dispatch method for a production line in a semiconductor process can acquire an overlay error reference curve of a product lot to be exposed in equipment and set an overlay error range according to the overlay error reference curve. At the end of exposure, an overlay error for the product lot to be exposed can be acquired, and it can be determined whether the overlay error falls into the overlay error range. If the overlay error for the product lot to be exposed does not fall into the overlay error range, the product lot to be exposed can be continuously machined by this equipment.
    Type: Application
    Filed: May 26, 2021
    Publication date: February 23, 2023
    Inventor: CHIN-CHANG HUANG
  • Patent number: 11587807
    Abstract: An annealing apparatus includes a heater plate and a cooler plate disposed in a chamber, a delivering robot, a sensor and circuitry. The delivering robot is configured to deliver a wafer between the heater plate and the cooler plate in the chamber. The sensor is located on the delivering robot and configured to output a first signal in response to a motion of the delivering robot. The circuitry is coupled to the sensor and configured to detect whether an abnormality of the delivering robot occurs according to the first signal.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: February 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yung-Chang Huang, Yu-Chi Tsai
  • Patent number: 11581903
    Abstract: Disclosed are a data compression method, a computer-readable storage medium, and an electronic device. The method includes: converting each data in a to-be-compressed data set into binary data in a preset format; determining a to-be-compressed bit and a significant bit for the each data in the to-be-compressed data set based on a sequence of all bits of the binary data; determining a compression bit width corresponding to the to-be-compressed data set based on bit widths of the significant bits; compressing the each data in the to-be-compressed data set based on the compression bit width, to obtain a compressed data set; and generating attribute information of the compressed data set. According to the present disclosure, the significant bit can be determined based on the sequence of all bits without adjusting orders of the bits of the binary data, thereby simplifying a data compression process and improving efficiency of data compression.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: February 14, 2023
    Assignee: Beijing Horizon Information Technology Co., Ltd.
    Inventors: Zhenjiang Wang, Jianjun Li, Zhuoran Zhao, Chang Huang
  • Publication number: 20230043309
    Abstract: A type of fragrant eyeglasses is revealed. The fragrant eyeglasses include an eyeglass body and a nose bridge which is arranged at the eyeglass body and provided with a mounting space for mounting fragrance tablets. At least one air inlet and at least one air outlet for guiding air flows are disposed on a front side and a rear side of the mounting space respectively. Thereby the fragrance tablet mounted in the nose bridge is just adjacent to the user's nose when the eyeglasses are fitted on bridge of user's nose by the nose bridge. Thus the user smells scents emanated from the fragrance tablet and feels refreshing and soothing. The air inlet and the air outlet not only help emanation of scents from the fragrance tablet, but also guide the scents to spread along with air flows induced by movements of people who while walking or riding bicycles.
    Type: Application
    Filed: August 6, 2021
    Publication date: February 9, 2023
    Inventor: CHIH-CHANG HUANG
  • Patent number: 11574997
    Abstract: A semiconductor structure including a substrate, a first well, a second well, a first doped region, a second doped region, a gate electrode, an insulating layer, a field plate, and a tunable circuit is provided. The first and second wells are formed on the substrate. The first doped region is formed in the first well. The second doped region is formed in the second well. The gate electrode is disposed over the substrate. The gate electrode, the first doped region, and the second doped region constitute a transistor. The insulating layer is disposed on the substrate and overlaps the gate electrode. The field plate overlaps the insulating layer and the gate electrode. The tunable circuit provides either a first short-circuit path between the field plate and the gate electrode, or a second short-circuit path between the field plate and the first doped region.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 7, 2023
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shao-Chang Huang, Li-Fan Chen, Ching-Ho Li, Gong-Kai Lin, Chieh-Yao Chuang
  • Patent number: 11574031
    Abstract: Disclosed is a method for convolution calculation in a neural network, comprising: reading an input feature map, depthwise convolution kernels and pointwise convolution kernels from a dynamitic random access memory (DRAM); performing depthwise convolution calculations and pointwise convolution calculations according to the input feature map, the depthwise convolution kernels and the pointwise convolution kernels to obtain output feature values of a first predetermined number p of points on all pointwise convolution output channels; storing the output feature values of a first predetermined number p of points on all pointwise convolution output channels into an on-chip memory, wherein the first predetermined number p is determined according to at least one of available space in the on-chip memory, a number of the depthwise convolution calculation units, and width, height and channel dimensions of the input feature map; and repeating the above operation obtain output feature values of all points on all pointwis
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: February 7, 2023
    Assignee: Nanjing Horizon Robotics Technology Co., Ltd.
    Inventors: Liang Chen, Chang Huang, Kun Ling, Jianjun Li, Delin Li, Heng Luo
  • Publication number: 20230029731
    Abstract: A ring monitor includes an accessory unit, a monitoring module, a processing unit, a transmission module and a power supply module. The accessory unit is a discontinuously annular body with a gap. Two end walls of the gap are two endpoints. The gap and the two endpoints together define an opening end. When the person who wears the ring monitor is measured, a measuring part of the person is inserted into the gap, and the measuring part of the person is clamped between the two endpoints. The monitoring module is mounted at the opening end. The processing unit is mounted in the accessory unit. The processing unit is connected with the monitoring module. The transmission module is mounted in the accessory unit. The transmission module is connected with the processing unit. The power supply module is mounted in the accessory unit.
    Type: Application
    Filed: May 29, 2022
    Publication date: February 2, 2023
    Inventor: HUNG-CHANG HUANG
  • Publication number: 20230034420
    Abstract: A semiconductor structure including a substrate, a first well, a second well, a first doped region, a second doped region, a gate electrode, an insulating layer, a field plate, and a tunable circuit is provided. The first and second wells are formed on the substrate. The first doped region is formed in the first well. The second doped region is formed in the second well. The gate electrode is disposed over the substrate. The gate electrode, the first doped region, and the second doped region constitute a transistor. The insulating layer is disposed on the substrate and overlaps the gate electrode. The field plate overlaps the insulating layer and the gate electrode. The tunable circuit provides either a first short-circuit path between the field plate and the gate electrode, or a second short-circuit path between the field plate and the first doped region.
    Type: Application
    Filed: August 2, 2021
    Publication date: February 2, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Li-Fan CHEN, Ching-Ho LI, Gong-Kai LIN, Chieh-Yao CHUANG
  • Patent number: 11569657
    Abstract: The protection circuit includes a detection circuit and a discharge circuit. The detection circuit is coupled to first and second power bonding pads and detects whether an ESD event or an EOS event occurs at the first power bonding pad. The detection circuit controls a detection voltage on a detection node according to a detection result. The first and second power bonding pads belong to different power domains. The discharge circuit is coupled to the detection node and the first power pad. In response to the ESD event occurring at the first power bonding pad, the discharge circuit provides a discharge path between the first power bonding pad and a ground terminal according to the detection voltage. In response to the EOS event occurring at the first power bonding pad, the detection circuit activates a second discharge path between the first power bonding pad and the ground terminal.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: January 31, 2023
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang Huang, Ching-Ho Li, Hsien-Feng Liao, Chieh-Yao Chuang, Yeh-Ning Jou
  • Patent number: 11568216
    Abstract: A method and an apparatus for adapting feature data in a convolutional neural network. The method includes selecting a plurality of consecutive layers; determining an expected number of subdata blocks and a layout position, width and height of each subdata block in an output feature data of a last layer; determining, for each current layer, a layout position, width, and height of each subdata block of an input feature data for the current layer according to the layout position, width, and height of each subdata block of the output feature data for the current layer; determining an actual position of each subdata block of the input feature data for a first layer in the input feature data for the first layer; and obtaining the expected number of subdata blocks of the input feature data for the first layer according to the actual position, width and height of each subdata block of the input feature data for the first layer.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: January 31, 2023
    Assignee: Nanjing Horizon Robotics Technology Co., Ltd.
    Inventors: Jianjun Li, Chang Huang, Liang Chen, Kun Ling, Delin Li
  • Publication number: 20230012350
    Abstract: A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a package substrate having a first surface and a second surface opposite to the first surface. Several integrated devices are bonded to the first surface of the package substrate. A first underfill element is disposed over the first surface and surrounds the integrated devices. A first molding layer is disposed over the first surface and surrounds the integrated devices and the first underfill element. A semiconductor die is bonded to the second surface of the package substrate. A second underfill element is disposed over the second surface and surrounds the semiconductor die. A second molding layer is disposed over the second surface and surrounds the semiconductor die and the second underfill element. Several conductive bumps are disposed over the second surface and adjacent to the second molding layer.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 12, 2023
    Inventors: Heh-Chang HUANG, Fu-Jen LI, Pei-Haw TSAO, Shyue-Ter LEU
  • Publication number: 20230010751
    Abstract: The method includes placing a wafer in a chamber body of a plasma processing tool; moving a first movable jig along an arc path to comb a spiral-shaped radio frequency (RF) coil over the chamber body, the first movable jig having a plurality of first confining slots penetrated by a plurality of coil segments of the spiral-shaped RF coil, respectively; and generating plasma in the chamber body through the spiral-shaped RF coil.
    Type: Application
    Filed: March 7, 2022
    Publication date: January 12, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung Chang HUANG, Chia Jung HSU, Yu Hsiu CHEN
  • Publication number: 20230002926
    Abstract: A method of controlling chemical concentration in electrolyte includes measuring a chemical concentration in an electrolyte, wherein the electrolyte is contained in a tank; and increasing a vapor flux through an exhaust pipe connected to the tank when the measured chemical concentration is lower than a control lower limit value.
    Type: Application
    Filed: March 21, 2022
    Publication date: January 5, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yung-Chang HUANG, You-Fu CHEN, Yu-Chi TSAI, Chu-Ting CHANG
  • Publication number: 20220410340
    Abstract: A polishing head assembly for polishing of semiconductor wafers includes a polishing head and a cap. The polishing head has a top portion and a recess along a bottom portion. The recess has a recessed surface. Holes extend from the top portion through the recessed surface. The cap is positioned within the recess and the cap has an annular wall and a floor extending across the annular wall. The annular wall has apertures corresponding to the holes. The floor is spaced from the recessed surface to form a chamber therebetween. The polishing head assembly also includes a band that circumscribes a portion of the annular wall. The holes and the corresponding apertures receive fasteners to removably secure the annular wall to the recessed surface.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 29, 2022
    Inventors: Peter Daniel Albrecht, Chih Yuan Hsu, Jen Chieh Lin, Wei Chang Huang, Yau-Ching Yang
  • Publication number: 20220415828
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a gate disposed on the semiconductor substrate. The semiconductor device structure also includes a source doped region and a drain doped region on two opposite sides of the gate. The semiconductor device structure further includes a source protective circuit and a drain protective circuit. From a side perspective view, a first drain conductive element of the source protective circuit partially overlaps a first source conductive element of the drain protective circuit.
    Type: Application
    Filed: August 29, 2022
    Publication date: December 29, 2022
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Jian-Hsing LEE, Shao-Chang HUANG, Chih-Hsuan LIN, Yu-Kai WANG, Karuna NIDHI, Hwa-Chyi CHIOU