Abstract: A foldable bottle holder (10, 100, 106, 110) includes a foldable wall (12), a sheet (14), and a closure (16). The foldable wall (12) includes a first portion (20) and a second portion (22) that are connected by a hinge (24). A first portion (32) of the sheet (14) is secured to the foldable wall (12), and a second portion (34) of the sheet (14) cooperates with the first portion (20) of the foldable wall (12) to define an opening (36) of the bottle holder (10) so that the sheet (14) forms a bottom wall (38) of the bottle holder (10) connected to the second portion (22) of the foldable wall (12) and so that the foldable wall (12) and the sheet (14) together form side walls (39) of the bottle holder (10) and the opening (36). The closure (16) selectively retains the first portion (20) and the second portion (22) of the foldable wall (12) in a minimized condition of the foldable bottle holder (10) and in open state of the closure (16) allows for a user to carry a bottle (50) in the foldable holder (10).

Abstract: An electronic device and a manufacturing method thereof are provided. The manufacturing method of the electronic device includes the following. A substrate is provided. A plurality of electronic units are transferred to the substrate. The electronic units are inspected to obtain M first defect maps. The M first defect maps are integrated into N second defect maps, where N<M. M repairing groups are provided according to the N second defect maps. Each of the repairing groups includes at least one repairing electronic unit. The M repairing groups are transferred to the substrate. At least two of the repairing groups have the same location distribution of repairing electronic units, and the location distribution is consistent with a defect distribution of one of the second defect maps.

Abstract: An audio latency calibration method is disclosed. A master speaker and a slave speaker are located at a separation distance from each other, and a paring process is performed. As the paring process is completed, multiple latency time period parameters are obtained relating to the master and slave speakers. The latency time period parameters comprise: T1+T2 representing the time that the master speaker sends an audio signal to the slave speaker, T3+T4 representing the time that the audio signal is transmitted from the slave speaker to a microphone of the master speaker, T5 representing the time that a trumpet of the master speaker plays the audio signal and T3? representing the time that a microphone of the master speaker receives the audio signal. Thus, the way to synchronously play audio signals can be achieved.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a stack of semiconductor layers spaced apart from and aligned with each other, a first source/drain epitaxial feature in contact with a first one or more semiconductor layers of the stack of semiconductor layers, and a second source/drain epitaxial feature disposed over the first source/drain epitaxial feature. The second source/drain epitaxial feature is in contact with a second one or more semiconductor layers of the stack of semiconductor layers. The structure further includes a first dielectric material disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature and a first liner disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature. The first liner is in contact with the first source/drain epitaxial feature and the first dielectric material.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device includes a semiconductor fin projecting from a substrate. Semiconductor nanostructures are disposed over the semiconductor fin. A gate electrode is disposed over the semiconductor fin and around the semiconductor nanostructures. A dielectric fin is disposed over the substrate. A dielectric structure is disposed over the dielectric fin. An upper surface of the dielectric structure is disposed over the upper surface of the gate electrode. A dielectric layer is disposed over the substrate. The dielectric fin laterally separates both the gate electrode and the semiconductor nanostructures from the dielectric layer. An upper surface of the dielectric layer is disposed over the upper surface of the gate electrode structure and the upper surface of the dielectric structure. A lower surface of the dielectric layer is disposed below the upper surface of the dielectric fin.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first stacked nanostructure and a second stacked nanostructure formed over a substrate, and a dummy fin structure between the first stacked nanostructure and the second stacked nanostructure. The semiconductor device structure includes a gate structure formed over the first stacked nanostructure and the second stacked nanostructure, and a conductive layer formed over the gate structure. The semiconductor device structure includes a capping layer formed over the dummy fin structure, and each of the gate structure and the conductive layer is divided into two portions by the capping layer.

Abstract: A method for detecting motion information includes the following steps. First, a pixel array is provided for detecting an image of a measured object located in a first distance range or in a second distance range, and the pixel array includes a plurality of invisible image sensing pixels and a plurality of visible image sensing pixels. Then, image detection is conducted within the first distance range by using the invisible image sensing pixels to output a plurality of invisible images. Next, the image detection is conducted within the second distance range by using the visible image sensing pixels to output a plurality of visible images. Then, the plurality of invisible images and the plurality of visible images are analyzed by using a processing unit, so as to obtain motion information of the measured object. A pixel array for detecting motion information and an image sensor are also provided.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.

Abstract: An electrical impedance imaging sensing system includes a signal processing device, a sensing element and a processor. The signal processing device is electrically coupled to the sensing element and configured for outputting an emission signal. Each of N electrodes of the sensing element is configured to receive a received signal after the emission signal passes through a to-be tested object. The processor is configured to determine whether one of the N electrodes fails according to a plurality of the received signal; in response to the failure of the electrode, compensate the received signal of the failed electrode; and generate an electrical impedance image pre-processing data according to the received signal.

Abstract: An industrial heavy load electric linear actuator includes a gearbox, an electric motor, a lead screw, an extension pipe and a load baring structure. The electric motor is connected to the gearbox. A portion of the lead screw is received inside the gearbox and driven by the electric motor, and another portion of the lead screw is extended out of the gearbox. The extension pipe is movably fastened to the lead screw. The load bearing structure includes a sleeve, a bearing, a fastening element, a fixation seat, and a rear supporting seat. The sleeve is mounted to the lead screw and holds the bearing jointly with the fastening element. The fixation seat and the rear supporting seat hold the bearing at outer perimeters of the sleeve and the fastening element.

Abstract: A tamper-proof screw includes a main body, a pin body, a ball, and at least one abutting member. A through hole is provided in the main body. The pin body is movably disposed in the through hole. The ball is located in the through hole. The abutting member is located in the through hole and has a connecting end and a free end opposite to each other. The connecting end is disposed on an inner wall of the main body and located between the ball and the free end. The ball is located between the pin body and the abutting member. When the pin body moves in the through hole to push the ball to press against the connecting end of the abutting member, the abutting member pivots around the connecting end to allow the free end to extend outwards from the main body.

Abstract: A semiconductor device includes a substrate, a fin structure and an isolation layer formed on the substrate and adjacent to the fin structure. The semiconductor device includes a gate structure formed on at least a portion of the fin structure and the isolation layer. The semiconductor device includes an epitaxial layer including a strained material that provides stress to a channel region of the fin structure. The epitaxial layer has a first region and a second region, in which the first region has a first doping concentration of a first doping agent and the second region has a second doping concentration of a second doping agent. The first doping concentration is greater than the second doping concentration. The epitaxial layer is doped by ion implantation using phosphorous dimer.

Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor die, a stack of polymer layers, redistribution elements and a passive filter. The polymer layers cover a front surface of the semiconductor die. The redistribution elements and the passive filter are disposed in the stack of polymer layers. The passive filter includes a ground plane and conductive patches. The ground plane is overlapped with the conductive patches, and the conductive patches are laterally separated from one another. The ground plane is electrically coupled to a reference voltage. The conductive patches are electrically connected to the ground plane, electrically floated, or electrically coupled to a direct current (DC) voltage.

Abstract: A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.

Abstract: An optical device includes a first waveguide, ring-shaped waveguides adjacent to the first waveguide, and heaters coupled to the ring-shaped waveguides in one-to-one correspondence. A method includes coupling a first light source with a first wavelength to the first waveguide, increasing electric current through the heaters until a first one of the ring-shaped waveguides resonates, assigning the first one of the ring-shaped waveguides to the first wavelength, resetting the electric current through the heaters to the initial electric current, coupling a second light source with a second wavelength to the first waveguide wherein the second wavelength is different from the first wavelength, increasing the electric current through the heaters until a second one of the ring-shaped waveguides resonates wherein the second one of the ring-shaped waveguides is different from the first one of the ring-shaped waveguides, and assigning the second one of the ring-shaped waveguides to the second wavelength.

Abstract: A thin type lock and unlock connector include a first shell, a second shell and a first insulator, which are buckled and combined with each other by the respective provided first fixing members to form a connector that can be connected to a flexible printed circuit board. The second shell provides a first locking member and a first elastic member to lock the flexible printed circuit board to the connector. When an external force is applied to the first pressing part of the first shell, it acts on the locking member to unlock the flexible printed circuit board that the flexible printed circuit board can be detached from the connector. The first insulator provides an action portion with a slope to be arranged corresponding to the first locking member, to determine the deformation stroke of the first locking member.

Abstract: A semiconductor device includes an active fin disposed on a substrate, a gate structure, and a pair of gate spacers disposed on sidewalls of the gate structure, in which the gate structure and the gate spacers extend across a first portion of the active fin, and a bottom surface of the gate structure is higher than a bottom surface of the gate spacers.

Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate; a first conductive feature and a second conductive feature disposed on the semiconductor substrate; and a staggered dielectric feature interposed between the first and second conductive feature. The staggered dielectric feature includes first dielectric layers and second dielectric layers being interdigitated. The first dielectric layers include a first dielectric material and the second dielectric layers include a second dielectric material being different from the first dielectric material.

Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method includes forming a bottom electrode layer over a substrate and forming a pinned layer over the bottom electrode layer. The method also includes forming a tunnel barrier layer over the pinned layer and forming a free layer over the tunnel barrier layer. The method also includes patterning the free layer, the tunnel barrier layer, and the pinned layer to form a magnetic tunnel junction (MTJ) stack structure and patterning the bottom electrode layer to form a bottom electrode structure under the MTJ stack structure. In addition, patterning the free layer includes using a first etching gas, and patterning the bottom electrode layer includes using a second etching gas, which is different from the first etching gas.

Abstract: An alternating current control system includes a zero crossing detector, an alternating current solid state relay, a constant current driver, and a microcontroller connected to the zero crossing detector and the constant current driver. The zero crossing detector and the alternating current solid state relay are connected to an alternating current power source, a first control pin of the microcontroller receives a zero crossing detection signal outputted by the zero crossing detector, a second control pin of the microcontroller receives a switch state signal, and a third control pin of the microcontroller is connected to the constant current driver and outputs a control signal. Based on the switch state signal and the zero crossing detection signal, the microcontroller adjusts a level of the control signal and controls an electrical connection between the alternating current solid state relay and the alternating current power source.