Patents by Inventor Chen-An Hsieh

Chen-An Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11728173
    Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Ju Chen, Chung-Ting Ko, Wan-Chen Hsieh, Chun-Ming Lung, Tai-Chun Huang, Chi On Chui
  • Publication number: 20230253342
    Abstract: An electronic package is provided and includes a substrate structure and an electronic element disposed on the substrate structure. The substrate structure is provided with a plurality of circuits and a reinforcing portion that is free from being electrically connected to the plurality of circuits on a surface of a substrate body of the substrate structure, such that the electronic element is electrically connected to the plurality of circuits and is free from being electrically connected to the reinforcing portion, and the reinforcing portion includes a dummy pad and a trace line connected to the dummy pad to increase a layout area of the reinforcing portion on the substrate body. Therefore, the adhesion of the reinforcing portion can be improved, and the electronic element can be prevented from cracking.
    Type: Application
    Filed: August 23, 2022
    Publication date: August 10, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hsiu-Fang Chien, Wen-Chen Hsieh, Chia-Wen Tsao, Hsin-Yin Chang, Ya-Ting Chi, Yi-Lin Tsai
  • Publication number: 20230215758
    Abstract: A method includes forming a first protruding fin and a second protruding fin over a base structure, with a trench located between the first protruding fin and the second protruding fin, depositing a trench-filling material extending into the trench, and performing a laser reflow process on the trench-filling material. In the reflow process, the trench-filling material has a temperature higher than a first melting point of the trench-filling material, and lower than a second melting point of the first protruding fin and the second protruding fin. After the laser reflow process, the trench-filling material is solidified. The method further includes patterning the trench-filling material, with a remaining portion of the trench-filling material forming a part of a gate stack, and forming a source/drain region on a side of the gate stack.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 6, 2023
    Inventors: Wen-Yen Chen, Li-Ting Wang, Wan-Chen Hsieh, Bo-Cyuan Lu, Tai-Chun Huang, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 11695037
    Abstract: A semiconductor structure includes a substrate, a passive device and an active device over the substrate. The active device is formed in the first region of the substrate, and the passive device is formed in the second region of the substrate. The semiconductor structure further includes a passivation layer that covers the top surface of the passive device. The passivation layer has an opening that exposes the active device.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: July 4, 2023
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Ju-Hsien Lin, Jung-Tao Chung, Shu-Hsiao Tsai, Hsi-Tsung Lin, Chen-An Hsieh, Yi-Han Chen, Yao-Ting Shao
  • Publication number: 20230207478
    Abstract: A method includes encapsulating a device die in an encapsulating material, planarizing the device die and the encapsulating material, and forming a first plurality of conductive features electrically coupling to the device die. The step of forming the first plurality of conductive features includes a deposition-and-etching process, which includes depositing a blanket copper-containing layer, forming a patterned photo resist over the blanket copper-containing layer, and etching the blanket copper-containing layer to transfer patterns of the patterned photo resist into the blanket copper-containing layer.
    Type: Application
    Filed: March 6, 2023
    Publication date: June 29, 2023
    Inventors: Hung-Jui Kuo, Yun Chen Hsieh, Chen-Hua Yu, Hui-Jung Tsai
  • Publication number: 20230170696
    Abstract: A control device for controlling a power generation system comprises a reception module, for receiving environmental data from the power generation system; an environment generation module, coupled to the reception module, for generating an environment state of the power generation system according to the environment data and an environment model; a strategy generation module, coupled to the environment generation module, for generating a power of the power generation system according to the environmental state, and for generating a control strategy of the power generation system according to the power; a transmission module, coupled to the strategy generation module, for transmitting the control strategy to the power generation system.
    Type: Application
    Filed: January 10, 2022
    Publication date: June 1, 2023
    Applicant: National Cheng Kung University
    Inventors: Yueh-Heng Li, Yu-Ting Wu, Chao-Wei Huang, Wei-Cheng Lo, Hsun-Chen Hsieh, Po-Hung Lin, Yi-Heng Chen, Ping-Han Huang
  • Patent number: 11664606
    Abstract: An antenna structure includes a patch antenna including two opposite edges, a microstrip line connected to the patch antenna, two first radiation assemblies respectively disposed on two sides of the patch antenna, two second radiation assemblies disposed under the two first radiation assemblies, a liquid crystal layer disposed between a first plane and a second plane, and a ground plane disposed under the two second radiation assemblies. The patch antenna, the microstrip line, and the two first radiation assemblies are located on the first plane, and each of the first radiation assemblies includes multiple separated first conductors. The two second radiation assemblies are located on the second plane, and each of the second radiation assemblies includes multiple separated second conductors. A projection of the two second radiation assemblies on the first plane, the two first radiation assemblies, and the two edges of the patch antenna collectively form two loops.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: May 30, 2023
    Assignee: Au Optronics Corporation
    Inventors: Shih-Yuan Chen, Hsiu-Ping Liao, Chun-I Wu, Yi-Chen Hsieh, Yi-Hsiang Lai, Ching-Huan Lin, Chuang Yueh Lin
  • Patent number: 11651994
    Abstract: A method includes forming a metal seed layer on a dielectric layer, and forming a patterned mask over the metal seed layer. An opening in the patterned mask is over a first portion of the dielectric layer, and the patterned mask overlaps a second portion of the dielectric layer. The method further includes plating a metal region in the opening, removing the patterned mask to expose portions of the metal seed layer, etching the exposed portions of the metal seed layer, performing a plasma treatment on a surface of the second portion of the dielectric layer, and performing an etching process on the surface of the second portion of the dielectric layer.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: May 16, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yun Chen Hsieh, Hui-Jung Tsai, Hung-Jui Kuo, Chen-Hua Yu
  • Publication number: 20230131367
    Abstract: A use of extracts of roselle seeds for preparing a composition of antioxidant, anti-inflammation, anti-UVB, anti-allergy, whitening, moisturizing, and anti-wrinkle, wherein the extracts of the roselle seeds comprise lauric, palmitic, linoleic, oleic, or stearic acids; and a method for preparing the extracts of the roselle seeds comprises steps of: steeping of: extracting a weight ratio of the 12:1 to 20:1 roselle seeds and an ethanol solution with a concentration of 75 to 95%; and steeping the roselle seeds in the ethanol solution to obtain a suspension; and extraction of: the suspension being engaged in an extraction of a continuous and rapid oscillation with an ultrasonic energy with a total energy of 200 to 500W, wherein 1 to 3 hours of the oscillation is one cycle, and a total number of 3 to 5 cycles is lasted, in order to obtain roselle seed crude extracts.
    Type: Application
    Filed: October 24, 2022
    Publication date: April 27, 2023
    Inventors: Hui-Ping HSIEH, Chen HSIEH, Fang-Rong CHANG, Chia-Hua LIANG, Yen-Chang CHEN, Yi-Hong TSAI
  • Publication number: 20230116949
    Abstract: Improved methods for forming gate isolation structures between portions of gate electrodes and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a channel structure over a substrate; forming a first isolation structure extending in a direction parallel to the channel structure; forming a dummy gate structure over the channel structure and the first isolation structure; depositing a hard mask layer over the dummy gate structure; etching the hard mask layer to form a first opening through the hard mask layer over the first isolation structure; conformally depositing a first dielectric layer over the hard mask layer, in the first opening, and over the dummy gate structure; etching the first dielectric layer to extend the first opening and expose the dummy gate structure; and etching the dummy gate structure to extend the first opening and expose the first isolation structure.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 20, 2023
    Inventors: Li-Fong Lin, Wan Chen Hsieh, Chung-Ting Ko, Tai-Chun Huang
  • Publication number: 20230117569
    Abstract: A method for measuring a physiological signal includes following steps: detecting a first physiological signal of a target; receiving the first physiological signal to generate a first signal and a second signal by a radar sensor; selecting one of the first signal and the second signal to generate a plurality of original signals, which a phase difference is formed between the first signal and the second signal; and capturing a respiration signal and a heartbeat signal according to the plurality of original signals.
    Type: Application
    Filed: June 20, 2022
    Publication date: April 20, 2023
    Inventors: Shu-Hua CHANG, Wei-Mei CHEN, Chao-Hsiung TSENG, Ching-Huan LIN, Yi-Hsiang LAI, Chuang-Yueh LIN, Chun-I WU, Yi-Chen HSIEH
  • Publication number: 20230115729
    Abstract: Embodiments include plating a contact feature in a first opening in a mask layer, the contact feature physically coupled to a contact pad, the contact feature partially filling the first opening. A solder cap is directly plated onto the contact feature in the first opening. The mask layer is then removed to expose an upper surface of a work piece, the contact feature vertically protruding from the work piece. After utilizing the solder cap, etching the solder cap to remove the solder cap from over the contact feature. A first encapsulant is deposited laterally around and over an upper surface of the contact feature. The first encapsulant is planarized to level an upper surface of the first encapsulant with the upper surface of the contact feature.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 13, 2023
    Inventors: Chen-Hua Yu, Yun Chen Hsieh, Hui-Jung Tsai, Hung-Jui Kuo
  • Publication number: 20230094267
    Abstract: A method of expanding natural killer cells, comprising: providing a population of internally gelated cells, each of which includes a gelated interior and a fluid cell membrane that contains one or more membrane-bound proteins each or collectively are capable of stimulating expansion of natural killer (NK) cells; and culturing a population of cells containing NK cells, which are capable of responding to the one or more membrane-bound proteins, with the population of internally gelated cells under conditions that allow expansion of NK cells.
    Type: Application
    Filed: March 2, 2021
    Publication date: March 30, 2023
    Applicant: ACADEMIA SINICA
    Inventors: Che-Ming Jack HU, Shih-Yu CHEN, Yi-Fu WANG, Wan-Chen HSIEH, Yi-Shiuan TZENG, Ya-Ting LU, Jung-Chen LIN, Chung-Yao HSU
  • Patent number: 11605555
    Abstract: A method includes forming a first protruding fin and a second protruding fin over a base structure, with a trench located between the first protruding fin and the second protruding fin, depositing a trench-filling material extending into the trench, and performing a laser reflow process on the trench-filling material. In the reflow process, the trench-filling material has a temperature higher than a first melting point of the trench-filling material, and lower than a second melting point of the first protruding fin and the second protruding fin. After the laser reflow process, the trench-filling material is solidified. The method further includes patterning the trench-filling material, with a remaining portion of the trench-filling material forming a part of a gate stack, and forming a source/drain region on a side of the gate stack.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: March 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Yen Chen, Li-Ting Wang, Wan-Chen Hsieh, Bo-Cyuan Lu, Tai-Chun Huang, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 11600574
    Abstract: A method includes encapsulating a device die in an encapsulating material, planarizing the device die and the encapsulating material, and forming a first plurality of conductive features electrically coupling to the device die. The step of forming the first plurality of conductive features includes a deposition-and-etching process, which includes depositing a blanket copper-containing layer, forming a patterned photo resist over the blanket copper-containing layer, and etching the blanket copper-containing layer to transfer patterns of the patterned photo resist into the blanket copper-containing layer.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Jui Kuo, Yun Chen Hsieh, Hui-Jung Tsai, Chen-Hua Yu
  • Patent number: 11587902
    Abstract: A method includes encapsulating a device in an encapsulating material, planarizing the encapsulating material and the device, and forming a conductive feature over the encapsulating material and the device. The formation of the conductive feature includes depositing a first conductive material to from a first seed layer, depositing a second conductive material different from the first conductive material over the first seed layer to form a second seed layer, plating a metal region over the second seed layer, performing a first etching on the second seed layer, performing a second etching on the first seed layer, and after the first seed layer is etched, performing a third etching on the second seed layer and the metal region.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: February 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hui-Jung Tsai, Yun Chen Hsieh, Jyun-Siang Peng, Tai-Min Chang, Yi-Yang Lei, Hung-Jui Kuo, Chen-Hua Yu
  • Publication number: 20230042531
    Abstract: A ceiling fan blade is provided. The ceiling fan blade is configured to be mounted on a rotating base, and includes a main body and a blade holder connected to the main body. The blade holder is configured to be mounted on the rotating base. The main body includes a windward part arranged adjacent to a side of the main body and a plurality of air guiding structures arranged adjacent to the windward part. Each of the air guiding structures and the side of the main body that is adjacent to the windward part is 0.2 to 0.4 times of a width of the main body.
    Type: Application
    Filed: August 5, 2021
    Publication date: February 9, 2023
    Inventors: LUNG-FA HSIEH, YU-CHEN HSIEH, MIN-YUAN HSIAO, CHIA-WEI CHANG, KAI-JEN TSAI
  • Patent number: 11572891
    Abstract: A ceiling fan blade is provided. The ceiling fan blade is configured to be mounted on a rotating base, and includes a main body and a blade holder connected to the main body. The blade holder is configured to be mounted on the rotating base. The main body includes a windward part arranged adjacent to a side of the main body and a plurality of air guiding structures arranged adjacent to the windward part. Each of the air guiding structures and the side of the main body that is adjacent to the windward part is 0.2 to 0.4 times of a width of the main body.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: February 7, 2023
    Assignee: HOTECK INC.
    Inventors: Lung-Fa Hsieh, Yu-Chen Hsieh, Min-Yuan Hsiao, Chia-Wei Chang, Kai-Jen Tsai
  • Publication number: 20230011218
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes an isolation structure formed over a semiconductor substrate. A first fin structure and a second fin structure extend from the semiconductor substrate and protrude above the isolation structure. A first gate structure is formed across the first fin structure and a second gate structure is formed across the second fin structure. A gate isolation structure is formed between the first fin structure and the second fin structure and separates the first gate structure from the second gate structure. The gate isolation structure includes a bowl-shaped insulating layer that has a first convex sidewall surface adjacent to the first gate structure and a second convex sidewall surface adjacent to the second gate structure.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 12, 2023
    Inventors: Wan-Chen HSIEH, Chung-Ting KO, Tai-Chun HUANG
  • Publication number: 20220415888
    Abstract: A semiconductor structure includes a first gate stack across a first semiconductor fin structure, a second gate stack across a second semiconductor fin structure, a dielectric fin structure between the first semiconductor fin structure and the second semiconductor fin structure, and a gate cut isolation structure over the dielectric fin structure and between the first gate stack and the second gate stack. The gate cut isolation structure includes a protection layer and a fill layer over the protection layer, and the protection layer and the fill layer are made of different materials.
    Type: Application
    Filed: April 15, 2022
    Publication date: December 29, 2022
    Inventors: Wan Chen Hsieh, Chung-Ting Ko, Tai-Chun Huang