Patents by Inventor Chen-An Hsieh

Chen-An Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11532628
    Abstract: Improved methods for forming gate isolation structures between portions of gate electrodes and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a channel structure over a substrate; forming a first isolation structure extending in a direction parallel to the channel structure; forming a dummy gate structure over the channel structure and the first isolation structure; depositing a hard mask layer over the dummy gate structure; etching the hard mask layer to form a first opening through the hard mask layer over the first isolation structure; conformally depositing a first dielectric layer over the hard mask layer, in the first opening, and over the dummy gate structure; etching the first dielectric layer to extend the first opening and expose the dummy gate structure; and etching the dummy gate structure to extend the first opening and expose the first isolation structure.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Fong Lin, Chung-Ting Ko, Wan Chen Hsieh, Tai-Chun Huang
  • Patent number: 11530479
    Abstract: In an embodiment, a method of forming a semiconductor device includes forming a hydrophobic coating on an inner surface of an exhaust line, connecting the exhaust line to a semiconductor processing chamber, introducing a first precursor into the semiconductor processing chamber, introducing a second precursor into the semiconductor processing chamber, wherein the first precursor reacts with the second precursor to form a layer of oxide material, and pumping the first precursor and the second precursor from the semiconductor processing chamber and through the exhaust line.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Ting Ko, Wen-Ju Chen, Wan-Chen Hsieh, Ming-Fa Wu, Tai-Chun Huang, Yung-Cheng Lu, Chi On Chui
  • Patent number: 11527466
    Abstract: Embodiments include forming a die, the die including a pad and a passivation layer over the pad. A via is formed to the pad through the passivation layer. A solder cap is formed on the via, where a first material of the solder cap flows to the sidewall of the via. In some embodiments, the via is encapsulated in a first encapsulant, where the first encapsulant is a polymer or molding compound selected to have a low co-efficient of thermal expansion and/or low curing temperature. In some embodiments, the first material of the solder cap is removed from the sidewall of the via by an etching process and the via is encapsulated in a first encapsulant.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: December 13, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Yun Chen Hsieh, Hui-Jung Tsai, Hung-Jui Kuo
  • Publication number: 20220391061
    Abstract: A portable electronic device and a one-hand touch operation method thereof are provided. A touch operation performed on a touch screen is detected. When a shift amount of the touch operation in a first direction is greater than a first threshold, whether to activate a one-hand mode is determined according to a shift amount of the touch operation in a second direction. When the one-hand mode is activated, the operation interface image is zoomed out or shifted, and displayed in a one-hand mode interface display region.
    Type: Application
    Filed: May 24, 2022
    Publication date: December 8, 2022
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Meng Chen Hsieh, CHEN-YU HSU, Chih-Hsien Yang, I-Hsi Wu, HSIN-YI PU
  • Publication number: 20220378846
    Abstract: Disclosed herein is a method or a pharmaceutical composition for the treatment of dry eye disease or corneal wound healing, comprising administering to a subject in need thereof a therapeutically effective amount of secretome of amniotic fluid stem cells. Also provided is a use of secretome of amniotic fluid stem cells for manufacturing a medicament for the treatment of dry eye disease or corneal wound healing.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 1, 2022
    Applicant: U-Neuron Biomedical Inc.
    Inventors: Shiaw-Min Hwang, Chen-An Hsieh, Pei-Cheng Lin
  • Publication number: 20220362136
    Abstract: A Aquilaria malaccensis seed extract for use in preparation of skin care composition is provided. Multiple Aquilaria malaccensis seeds are washed for three times and drained to dry in room temperature, and are then spread on a water-absorbing material for drying in shade. The Aquilaria malaccensis seeds so dried are pulverized to a particle size not greater than 2 mm. The pulverized Aquilaria malaccensis seeds are subject to ultrasonic extraction with 90% ethanol in such a way that the pulverized Aquilaria malaccensis seeds are subjected to extraction for three times, one time for each day. After the completion of the extraction, all ethanol-water solvent is removed to obtain Aquilaria malaccensis seed extract (Crude-EtOH).
    Type: Application
    Filed: May 11, 2021
    Publication date: November 17, 2022
    Inventors: Chen HSIEH, Hui-Ping Hsieh
  • Publication number: 20220356573
    Abstract: In an embodiment, a method of forming a semiconductor device includes forming a hydrophobic coating on an inner surface of an exhaust line, connecting the exhaust line to a semiconductor processing chamber, introducing a first precursor into the semiconductor processing chamber, introducing a second precursor into the semiconductor processing chamber, wherein the first precursor reacts with the second precursor to form a layer of oxide material, and pumping the first precursor and the second precursor from the semiconductor processing chamber and through the exhaust line.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Chung-Ting Ko, Wen-Ju Chen, Wan-Chen Hsieh, Ming-Fa Wu, Tai-Chun Huang, Yung-Cheng Lu, Chi On Chui
  • Publication number: 20220338496
    Abstract: The present invention relates to an oligo-saccharide oat liquid composition, an oligo-saccharide oat powder composition and an oligo-saccharide oat drink having improved properties and immunomodulatory efficacy (for example, promotion of proliferation of immune cells), a micro-milling process involving quadri-enzyme hydrolysis for preparing the same, and uses thereof.
    Type: Application
    Filed: April 21, 2022
    Publication date: October 27, 2022
    Inventors: Kwan-Han CHEN, HUNG-CHI HSIAO, CHUN-LIANG CHOU, HAI-FENG CHANG, YI-SHIAN WANG, YUN-WEN CHEN, PEI-HSIU HUANG, PEI-CHEN HSIEH
  • Publication number: 20220336141
    Abstract: A transformer includes a drum core and a coil set wound on the drum core. The coil set includes a conductive member and an insulating layer wrapping around the conductive member. A diameter of the conductive member is between 0.07 mm and 0.2 mm, and a ratio of an outer diameter of the insulating layer to the diameter of the conductive member is between 1.35 and 2.5.
    Type: Application
    Filed: August 12, 2021
    Publication date: October 20, 2022
    Inventors: Chin-Hsin LAI, Chien-Tung LU, Sheng-Heng CHUNG, Li-O LEE, Chi-Kai LIN, Ying-Chian KANG, Yu-Chen HSIEH, Chia-Kai WENG
  • Publication number: 20220278098
    Abstract: Improved methods for forming gate isolation structures between portions of gate electrodes and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a channel structure over a substrate; forming a first isolation structure extending in a direction parallel to the channel structure; forming a dummy gate structure over the channel structure and the first isolation structure; depositing a hard mask layer over the dummy gate structure; etching the hard mask layer to form a first opening through the hard mask layer over the first isolation structure; conformally depositing a first dielectric layer over the hard mask layer, in the first opening, and over the dummy gate structure; etching the first dielectric layer to extend the first opening and expose the dummy gate structure; and etching the dummy gate structure to extend the first opening and expose the first isolation structure.
    Type: Application
    Filed: May 20, 2021
    Publication date: September 1, 2022
    Inventors: Li-Fong Lin, Chung-Ting Ko, Wan Chen Hsieh, Tai-Chun Huang
  • Patent number: 11404308
    Abstract: In an embodiment, a method includes: forming a first dielectric layer over a die, the first dielectric layer including a photo-sensitive material; curing the first dielectric layer to reduce photo-sensitivity of the first dielectric layer; patterning the first dielectric layer by etching to form a first opening; forming a first metallization pattern in the first opening of the first dielectric layer; forming a second dielectric layer over the first metallization pattern and the first dielectric layer, the second dielectric layer including the photo-sensitive material; patterning the second dielectric layer by exposure and development to form a second opening; and forming a second metallization pattern in the second opening of the second dielectric layer, the second metallization pattern electrically connected to the first metallization pattern.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: August 2, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Jui Kuo, Yun Chen Hsieh, Hui-Jung Tsai
  • Publication number: 20220238669
    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.
    Type: Application
    Filed: March 3, 2022
    Publication date: July 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
  • Publication number: 20220223685
    Abstract: A semiconductor structure includes a substrate, a passive device and an active device over the substrate. The active device is formed in the first region of the substrate, and the passive device is formed in the second region of the substrate. The semiconductor structure further includes a passivation layer that covers the top surface of the passive device. The passivation layer has an opening that exposes the active device.
    Type: Application
    Filed: January 12, 2021
    Publication date: July 14, 2022
    Inventors: Ju-Hsien LIN, Jung-Tao CHUNG, Shu-Hsiao TSAI, Hsi-Tsung LIN, Chen-An HSIEH, Yi-Han CHEN, Yao-Ting SHAO
  • Publication number: 20220216621
    Abstract: An antenna structure includes a patch antenna including two opposite edges, a microstrip line connected to the patch antenna, two first radiation assemblies respectively disposed on two sides of the patch antenna, two second radiation assemblies disposed under the two first radiation assemblies, a liquid crystal layer disposed between a first plane and a second plane, and a ground plane disposed under the two second radiation assemblies. The patch antenna, the microstrip line, and the two first radiation assemblies are located on the first plane, and each of the first radiation assemblies includes multiple separated first conductors. The two second radiation assemblies are located on the second plane, and each of the second radiation assemblies includes multiple separated second conductors. A projection of the two second radiation assemblies on the first plane, the two first radiation assemblies, and the two edges of the patch antenna collectively form two loops.
    Type: Application
    Filed: August 6, 2021
    Publication date: July 7, 2022
    Applicant: Au Optronics Corporation
    Inventors: Shih-Yuan Chen, Hsiu-Ping Liao, Chun-I Wu, Yi-Chen Hsieh, Yi-Hsiang Lai, Ching-Huan Lin, Chuang Yueh Lin
  • Patent number: 11371518
    Abstract: A ceiling fan and a fan set are provided. The fan set includes an upper fixed plate, a lower fixed plate, and a plurality of fan blades. The upper fixed plate has a plurality of first through holes that are in a ring-shaped arrangement, and the lower fixed plate has a plurality of second through holes that are in a ring-shaped arrangement. The quantity of the second through holes is equal to the quantity of the first through holes, and the positions of the second through holes respectively correspond to the positions of the first through hole. Each of the fan blades has an assembly portion, a blade portion, and three fasteners. The fasteners pass through the first through holes and the second through holes such that each of the fan blades is fastened between the upper fixed plate and the lower fixed plate.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: June 28, 2022
    Assignee: HOTECK INC.
    Inventors: Lung-Fa Hsieh, Yu-Chen Hsieh
  • Patent number: 11353033
    Abstract: A ceiling fan includes a fan body, a sensing unit and a control unit. The fan body includes a base seat, a plurality of fan blades mounted to the base seat, and a motor mounted to the base seat for driving rotation of the fan blades about the base seat. The sensing unit includes an outer casing, a room temperature sensor, and a body temperature sensor. The control unit is mounted to the fan body, in communication with the room temperature sensor, the body temperature sensor and the motor, and operable to adjust a rotational speed of the fan blades by controlling the motor according to a room temperature and a body temperature respectively sensed by the room temperature sensor and the body temperature sensor.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: June 7, 2022
    Assignee: Hoteck Inc.
    Inventors: Lung-Fa Hsieh, Yu-Chen Hsieh
  • Publication number: 20220102152
    Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 31, 2022
    Inventors: Wen-Ju Chen, Chung-Ting Ko, Wan-Chen Hsieh, Chun-Ming Lung, Tai-Chun Huang, Chi On Chui
  • Publication number: 20220080452
    Abstract: Disclosed herein is a method for applying a liquid metal on a surface of an object that is selected from the group consisting of a heat-emitting surface and a heat-conducting surface. The method includes applying the liquid metal onto the surface, and applying a force to the liquid metal using a tool to destroy cohesion of the liquid metal, followed by moving the tool back and forth to apply the liquid metal on the surface.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 17, 2022
    Inventors: Li-Chen HSIEH, Chiu-Lang LIN
  • Patent number: 11271083
    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: March 8, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
  • Publication number: 20220042520
    Abstract: A ceiling fan and a fan set are provided. The fan set includes an upper fixed plate, a lower fixed plate, and a plurality of fan blades. The upper fixed plate has a plurality of first through holes that are in a ring-shaped arrangement, and the lower fixed plate has a plurality of second through holes that are in a ring-shaped arrangement. The quantity of the second through holes is equal to the quantity of the first through holes, and the positions of the second through holes respectively correspond to the positions of the first through hole. Each of the fan blades has an assembly portion, a blade portion, and three fasteners. The fasteners pass through the first through holes and the second through holes such that each of the fan blades is fastened between the upper fixed plate and the lower fixed plate.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 10, 2022
    Inventors: LUNG-FA HSIEH, YU-CHEN HSIEH