Patents by Inventor Chen Wang

Chen Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12187851
    Abstract: The present invention relates to covalent adaptable networks (CANs) having exchangeable crosslinks which are able to undergo repeated covalent bond reshuffling through photo-activation at ambient temperatures. The invention provides covalent adaptable network forming compositions as well as methods of forming, remolding and recycling the CANs of the invention.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: January 7, 2025
    Assignee: The Regents of the University of Colorado, a body corporate
    Inventors: Christopher N. Bowman, Brady T. Worrell, Gayla Berg Lyon, Matthew K. McBride, Chen Wang
  • Publication number: 20250002626
    Abstract: A polymerizable phosphonate monomer and a preparation method therefor, a copolymer prepared and obtained from the polymerizable phosphonate monomer and a drilling fluid that uses the copolymer are disclosed. The anion of the polymerizable phosphonic acid (salt) has a structure that is represented in the following formula (1), and the cation is at least one among hydrogen, a monovalent metal cation, a divalent metal cation, a trivalent metal cation, and a tetravalent metal cation. In addition, 1H NMR of the polymerizable phosphonic acid (salt) substantively has no peak at the chemical shift ? of 1.019. The preparation method for a polymerizable phosphonic acid (salt) monomer as provided in the present invention uses an organic solvent as the solvent of a reaction system, so that compared to a water solvent system, reaction efficiency is higher, less by-products are produced, and the separation of the obtained products is simpler.
    Type: Application
    Filed: October 27, 2022
    Publication date: January 2, 2025
    Inventors: Zhenfeng SUN, Kaiqiang ZHAO, Chao YANG, Chen WANG, Jie LI
  • Publication number: 20250004858
    Abstract: Method and systems for online training management of reinforcement learning policy serving for cloud computing systems are discloses. An example method includes controlling a cloud computing system using a first reinforcement learning (RL) model; training the first RL model to generate a second RL model in response to one or more first criteria being satisfied; and controlling the cloud computing system using the second RL model in response to one or more second criteria being satisfied.
    Type: Application
    Filed: June 30, 2023
    Publication date: January 2, 2025
    Inventors: Haoran QIU, Chen WANG, Alaa S. YOUSSEF, Hubertus FRANKE
  • Publication number: 20250006174
    Abstract: A computer implemented method synthesizes electroencephalograph signals. A number of processor units creates a training dataset comprising real electroencephalograph signals, speech signals correlating to the real electroencephalograph signals, and a set of human characteristics for the real electroencephalograph signals. The number of processor units trains a generative adversarial network using the training dataset to create a trained generative adversarial network. The trained generative adversarial network generates synthetic electroencephalograph signals in response to receiving new speech signals.
    Type: Application
    Filed: June 27, 2023
    Publication date: January 2, 2025
    Inventors: Erhan Bilal, Chen Wang, Bo Wen
  • Publication number: 20250006367
    Abstract: A method, computer program product, and computer system for generating synthetic time-series data for a specific disease. One or more processors of a computer system provide a generative adversarial network (GAN), train the GAN to generate time series data using episodic measurement results as metadata for a patient cohort with a specific disease; receive input metadata associated with an episodic measurement for a patient in the patient cohort with the specific disease by the trained GAN, and generate synthetic time series data that simulates the patient in the patient cohort with the specific disease.
    Type: Application
    Filed: June 30, 2023
    Publication date: January 2, 2025
    Inventors: Chen Wang, Bo Wen, Erhan Bilal
  • Patent number: 12183633
    Abstract: A semiconductor device includes a channel structure, a first gate structure straddling the channel structure, and an epitaxial structure. The epitaxial structure is adjacent to the first gate structure and is coupled to an end of the channel structure. The semiconductor device further includes a first contact structure disposed over and in contact with the epitaxial structure and a nitride-based conformal layer extending at least over the first contact structure. The semiconductor device further includes an oxide-based layer disposed over the nitride-based conformal layer. A portion of the nitride-based conformal layer, disposed over the first contact structure, has a dip that is filled with a first portion of the oxide-based layer.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: December 31, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chih Hsiung, Yi-Chen Wang, Guang-Hong Cheng, Wen Wang, Yuan-Tien Tu, Huan-Just Lin
  • Publication number: 20240428013
    Abstract: A method, computer program product, and computer system are provided for enhancing chatbot responses. Data corresponding to a user input to a chatbot is received. A prompt is generated for a large language model based on the received data and a conversation flowchart associated with the chatbot. The generated prompt is input to the large language model. A natural language response to the received data is generated based on an output from the large language model. The generated natural language response substantially corresponds to a response associated with the conversation flowchart.
    Type: Application
    Filed: June 23, 2023
    Publication date: December 26, 2024
    Inventors: Bo Wen, Chen Wang
  • Publication number: 20240428161
    Abstract: A method includes acquiring a to-be-used execution project flow, where the to-be-used execution project flow includes multiple to-be-used flow nodes; in response to detecting that an operation on at least one to-be-used flow node is a preset operation, updating the to-be-used execution project flow, and in response to detecting that a target control is triggered, using the updated to-be-used execution project flow as a target execution project flow.
    Type: Application
    Filed: September 5, 2024
    Publication date: December 26, 2024
    Inventors: Tao HONG, Dian XIONG, Chen WANG, Linxuan SHI
  • Publication number: 20240427129
    Abstract: A microscope system includes at least one illumination subsystem configured to produce and direct a light sheet toward a specimen region. The illumination subsystem includes a spatial adjustment apparatus configured to operate in a plurality of different modes, each operating mode configured to produce a light sheet having a different spatial status. The microscope system includes at least one detection subsystem arranged to collect fluorescence emitted from the specimen region due to an interaction between a specimen at the specimen region and a light sheet. The at least one detection subsystem includes a plurality of imaging devices, with each imaging device being associated with a different spatial status such that each imaging device is configured to record images of the fluorescence due to an interaction between a specimen at the specimen region and the light sheet of the associated spatial status.
    Type: Application
    Filed: September 21, 2022
    Publication date: December 26, 2024
    Inventors: Chen Wang, Philipp Johannes Keller
  • Patent number: 12172262
    Abstract: Systems and methods are provided for predicting irregular motions of one or more mechanical components of a semiconductor processing apparatus. A mechanical motion irregular prediction system includes one or more motion sensors that sense motion-related parameters associated with at least one mechanical component of a semiconductor processing apparatus. The one or more motion sensors output sensing signals based on the sensed motion-related parameters. Defect prediction circuitry predicts an irregular motion of the at least one mechanical component based on the sensing signals.
    Type: Grant
    Filed: June 21, 2023
    Date of Patent: December 24, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chunhung Chen, Yu Chi Tsai, Chin Wei Chuang, Bo-An Chen, Sheng-Chen Wang, Chen-Hua Tsai
  • Patent number: 12175633
    Abstract: A method of enhancing an abnormal area of a ground-penetrating radar image based on hybrid-supervised learning includes the steps of: building a database including a real image set, a simulation image set and a simulation image label set; adopting a generative adversarial network; processing semi-supervised training and unsupervised training alternately to obtain a trained model, then inputting a real radar image with abnormal area that needs to be enhanced into the model and processing through the generative network to output an abnormal-area-enhanced image.
    Type: Grant
    Filed: July 3, 2024
    Date of Patent: December 24, 2024
    Inventors: Guangle Yao, Honghui Wang, Wenlong Zhou, Wei Zeng, Chen Wang, Ruijia Li, Xiaoyu Xu, Jun Li, Siyuan Sun
  • Publication number: 20240422969
    Abstract: A layout structure of a memory cell array for a non-volatile memory is provided. The memory cell array includes plural memory cells. Each memory cell includes a capacitor, an erase gate element, a select transistor, a floating gate transistor and a switch transistor. Moreover, plural wells are formed in a semiconductor substrate, and a floating gate is formed over the semiconductor substrate. The locations of the well regions and the shape of the floating gate are specially designed. Moreover, the plural memory cells with at least two shapes are constructed on the semiconductor substrate. Consequently, the layout area of the layout structure of the memory cell array can be effectively reduced.
    Type: Application
    Filed: May 20, 2024
    Publication date: December 19, 2024
    Inventors: Chih-Hsin CHEN, Shih-Chen WANG, Bo-Chang LI
  • Publication number: 20240422986
    Abstract: A memory device includes a substrate, a first stacking structure, a second stacking structure, struts, an isolation structure, memory films, channel layers, and conductive pillars. The first stacking structure includes first gate layers and is located on the substrate. The second stacking structure includes second gate layers and is located on the substrate, where the second stacking structure is separated from the first stacking structure through a trench. The struts stand on the substrate and are located in the trench, where the struts each have two opposite surfaces respectively in contact with the first stacking structure and the second stacking structure. The isolation structure stands on the substrate and is located in the trench, where cell regions are located in the trenches, and at least two of the cell regions are separated from one another through a respective one strut and the isolation structure connected therewith.
    Type: Application
    Filed: July 29, 2024
    Publication date: December 19, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Chen Wang, Meng-Han Lin, Sai-Hooi Yeong, Yu-Ming Lin, Han-Jong Chia
  • Patent number: 12171102
    Abstract: In an embodiment, a device includes: a first word line over a substrate, the first word line including a first conductive material; a first bit line intersecting the first word line; a first memory film between the first bit line and the first word line; and a first conductive spacer between the first memory film and the first word line, the first conductive spacer including a second conductive material, the second conductive material having a different work function than the first conductive material, the first conductive material having a lower resistivity than the second conductive material.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: December 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sai-Hooi Yeong, Chi On Chui, Sheng-Chen Wang
  • Publication number: 20240412866
    Abstract: Provided are techniques for an omni-channel Artificial Intelligence (AI) chatbot module collecting data and performing analysis. Survey questions for a participant are received. A first channel of a plurality of channels of communication and a period of time for contact are identified. A conversation is initiated by attempting to contact the participant using the first channel and during the period of time. in response to the participant accepting the contact, each of the survey questions are converted to natural language. There is interaction with the participant using the first channel to receive survey answers to the survey questions in the natural language. The survey answers are analyzed, and an analysis result is output.
    Type: Application
    Filed: June 12, 2023
    Publication date: December 12, 2024
    Inventors: Bo Wen, Vince Siu, Chen Wang, Hongfei Tian
  • Publication number: 20240409690
    Abstract: Disclosed herein is a degradable polyimide substrate that may be reliably used as an electronic substrate in flexible electronics. The degradable polyimide substrate is formed via thiol-ene click chemistry reactions between diallyl imide or other alkene monomers and thiol monomers, that can be activated by photoirradiation at relatively low temperatures (e.g., about 80° C.). As a result, the degradable polyimide substrates disclosed herein may be cured using a simple, energy efficient curing process that allows for streamlined manufacturing of circuits including multilayered circuits. In some instances, epoxy monomers may be added to the monomer resin used to form the polyimide substrate, wherein selective curing may yield polymer substrates with varying degrees of flexibility and rigidity.
    Type: Application
    Filed: June 7, 2024
    Publication date: December 12, 2024
    Inventors: Caleb Reese, Chen Wang
  • Patent number: 12165275
    Abstract: Systems, apparatus, articles of manufacture and methods for face augmentation in video are disclosed. An example apparatus includes executable code to detect a face of a subject in the video, detect a gender of the subject based on the face, detect a skin tone of the subject based on the face, apply a first process to smooth skin on the face in the video, apply a second process to change the skin tone of the face, apply a third process to slim the face, apply a fourth process to adjust a size of eyes on the face, and apply a fifth process to remove an eye bag from the face. One or more of the first process, the second process, the third process, the fourth process, or the fifth process adjustable based on one or more of the gender or an age. The example apparatus also includes one or more processors to generate modified video with beauty effects, the beauty effects based on one or more of the first process, the second process, the third process, the fourth process, or the fifth process.
    Type: Grant
    Filed: August 28, 2023
    Date of Patent: December 10, 2024
    Assignee: Tahoe Research, Ltd.
    Inventors: Ke Chen, Zhipin Deng, Xiaoxia Cai, Chen Wang, Ya-Ti Peng, Yi-Jen Chiu, Lidong Xu
  • Patent number: 12167608
    Abstract: In an embodiment, a device includes: a source line extending in a first direction; a bit line extending in the first direction; a back gate between the source line and the bit line, the back gate extending in the first direction; a channel layer surrounding the back gate; a word line extending in a second direction, the second direction perpendicular to the first direction; and a data storage layer extending along the word line, the data storage layer between the word line and the channel layer, the data storage layer between the word line and the bit line, the data storage layer between the word line and the source line.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: December 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han Lin, Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Yu-Ming Lin, Chung-Te Lin
  • Publication number: 20240404060
    Abstract: A method for narrow-band image generation is provided. First obtaining an input image of an object by an image capture unit. Then converting the input image according to an image conversion model and at least one target wave band corresponding to a narrow-band light source to get a simulated narrow-band image. Lastly comparing a simulated narrow-band image information of the simulated narrow-band image with a reference narrow-band image information according to at least one objective similarity index to generate an index data for determining similarity between the simulated narrow-band image information and the reference narrow-band image information. Thereby the simulated narrow-band image is checked by the objective similarity index combined with simulation of narrow-band images using hyperspectral techniques to help doctors in interpretation of endoscopic images.
    Type: Application
    Filed: July 11, 2023
    Publication date: December 5, 2024
    Inventors: HSIANG-CHEN WANG, YU-MING TSAO, XIAN-HONG SHI
  • Publication number: 20240404875
    Abstract: A memory device includes first transistor over a semiconductor substrate, wherein the first transistor includes a first word line extending over the semiconductor substrate; a second transistor over the semiconductor substrate, wherein the second transistor includes a second word line extending over the first word line; a first air gap extending between the first word line and the second word line; a memory film extending along and contacting the first word line and the second word line; a channel layer extending along the memory film; a source line extending along the channel layer, wherein the memory film is between the source line and the word line; a bit line extending along the channel layer, wherein the memory film is between the bit line and the word line; and an isolation region between the source line and the bit line.
    Type: Application
    Filed: July 12, 2024
    Publication date: December 5, 2024
    Inventors: Sheng-Chen Wang, Kai-Hsuan Lee, Sai-Hooi Yeong, Chia-Ta Yu, Han-Jong Chia