Abstract: A communication configuration apparatus for constructing a communication topology structure based on a plurality of processing nodes may be included in a combined processing apparatus. The combined processing apparatus further includes an interconnection interface and other processing apparatus. The communication configuration apparatus interacts with other processing apparatus to jointly complete a computing operation specified by a user. The combined processing apparatus further includes a storage apparatus. The storage apparatus is connected to the communication configuration apparatus and other processing apparatuses, respectively. The storage apparatus is used for storing data of the communication configuration apparatus and other processing apparatus. A technical solution of the present disclosure may improve efficiency of inter-chip communication.

Abstract: A semiconductor structure including a bottom source drain region arranged on a substrate, a semiconductor channel region extending vertically upwards from a top surface of the bottom source drain region, a metal gate disposed around the semiconductor channel region, a top source drain region above the semiconductor channel region, an amorphous silicon layer directly on top of the metal gate, and an oxidation layer directly on top of the amorphous silicon layer, where the amorphous silicon layer and the oxidation layer together completely separate the metal gate from a surrounding interlevel dielectric layer.

Abstract: A semiconductor device including a plurality of nanosheet transistor channels adjacent to a source/drain. An inner spacer located between each of the plurality of nanosheet transistor channels and the inner spacer wraps around the end of each of the plurality of nanosheet transistors. The source/drain is in contact with the inner spacer and each of the plurality of nanosheet transistor channels. A gate surrounding each of the plurality of nanosheet transistor channels and an electrical contact connected to the source/drain. An ultra low-k spacer located between the gate and the source/drain. The ultra low-k spacer reduces the parasitic capacitance of the nanosheet transistor.

Abstract: A compact SRAM design in a stacked architecture is provided. Notably, a 6-transistor SRAM bite cell including a bottom device level containing bottom field effect transistors and a top device level, stacked above the bottom device level, containing top field effect transistors of a different conductivity type than the bottom field effect transistors is provided.

Abstract: Provided is a tangible, non-transitory, machine readable medium storing instructions that when executed by a processor of a robot effectuates operations including: capturing, with at least one sensor, first data used in indicating a position of the robot; capturing, with at least one sensor, second data indicative of movement of the robot; recognizing, with the processor of the robot, a first area of the workspace based on at least one of: a first part of the first data and a first part of the second data; generating, with the processor of the robot, a first movement path covering at least part of the first recognized area; actuating, with the processor of the robot, the robot to move along the first movement path; and generating, with the processor of the robot, a map of the workspace based on at least one of: the first data and the second data.

Abstract: A robot configured to perceive a model of an environment, including: a chassis; a set of wheels; a plurality of sensors; a processor; and memory storing instructions that when executed by the processor effectuates operations including: capturing a plurality of data while the robot moves within the environment; perceiving the model of the environment based on at least a portion of the plurality of data, the model being a top view of the environment; storing the model of the environment in a memory accessible to the processor; and transmitting the model of the environment and a status of the robot to an application of a smartphone previously paired with the robot.

Abstract: A method is presented for forming a nanosheet device. The method includes forming nanosheets stacks over a substrate, the nanosheet stacks separated by shallow trench isolation (STI) regions, forming a first hardmask material over the nanosheet stacks, depositing a sacrificial gate, recessing the sacrificial gate such that recesses are defined adjacent the first hardmask material, wherein a top surface of the sacrificial gate is below a top surface of the first hardmask material, forming a second hardmask material in the recesses, defining a uniform gate length in both the first and second hardmask materials, and selectively trimming the first hardmask material such that a gate length over the nanosheet stacks is less than a gate length over the STI regions.

Abstract: A communication configuration apparatus for performing inter-node communication based on a plurality of processing nodes may be included in a combined processing apparatus. The combined processing apparatus further includes an interconnection interface and other processing apparatus. The communication configuration apparatus interacts with other processing apparatus to jointly complete a computing operation specified by a user. The combined processing apparatus further includes a storage apparatus. The storage apparatus is connected to the communication configuration apparatus and other processing apparatuses, respectively. The storage apparatus is used for storing data of the communication configuration apparatus and other processing apparatus. A technical solution of the present disclosure may improve efficiency of the inter-chip communication.

Abstract: A method of fabricating a complementary metal-oxide-semiconductor device is provided. The method includes forming a work function material layer segment on a gate dielectric layer over a first vertical fin and a bottom spacer layer on an n-type bottom source/drain adjoining the first vertical fin on a first region of a substrate, wherein the gate dielectric layer is also over a second vertical fin, bottom spacer layer on a p-type bottom source/drain adjoining the second vertical fin on a second region. The method further includes heat treating the work function material layer segment to produce a modified work function material layer segment on the first vertical fin with a shifted work function value, forming a second work function material layer on the modified work function material layer segment and the gate dielectric layer on the second vertical fin, and growing a top source/drain on each of the vertical fins.

Abstract: Provided in the present invention are a salt of an arylaminopurine derivative represented by Formula (2), a preparation method therefor and the use thereof. The salt obtained in the present invention has good crystallinity and significantly improved solubility relative to that in the free form, and the preferred salt and crystal form have low hygroscopicity and can exist stably. Therefore, compared with the free form of arylaminopurine derivatives or other salts, it is easier to prepare same into a medicine.

Abstract: A semiconductor device comprising a first nanosheet located on top of a substrate, wherein the first nanosheet is tapered the Y-direction to have a width W1 and the first nanosheet is tapered in the X-direction to have a length L1. A second nanosheet located on top of the first nanosheet, wherein the second nanosheets is tapered in the Y-direction to have a width W2 and the first nanosheet is tapered in the X-direction to have a length L2. Wherein the widths W1 and W2 are different from each other and the lengths L1 and L2 are different from each other and wherein the substrate includes a tapered surface in the Y-direction.

Abstract: A method can include determining, by a head-mounted device, that a user is looking at a first electronic device; determining that the user made a predefined gesture; determining content that was presented by the first electronic device when the user made the predefined gesture; and instructing a second electronic to present the content that was presented by the first electronic device when the user made the predefined gesture.

Abstract: A compound having a KHK inhibitory effect, or pharmaceutically acceptable salts thereof, and use thereof in the preparation of a medicament for treating a disease associated with KHK kinase abnormal expression. Provided is a compound as represented by formula (III) or a pharmaceutically acceptable salt thereof.

Abstract: The application relates to a vanadium battery SOC balance system, which comprises a detection module, a control module, a load module and vanadium battery modules; the vanadium battery modules are connected in series; the detection module is used for detecting and outputting SOC values of the vanadium battery modules; the control module is connected with the detection module and used for receiving the SOC values and connecting the load module into one of the vanadium battery modules according to the SOC values. The detection module can detect the SOC values of the vanadium battery modules, the control module can insert a load into one of the vanadium battery modules according to the SOC values, the vanadium battery modules inserted into the load module can discharge through the load module, the SOC values of the vanadium battery modules are reduced, and the SOC values of the vanadium battery modules are balanced.

Abstract: Provided is a method for processing audio including: acquiring an accompaniment audio signal and a voice signal of a current to-be-processed musical composition; determining a target reverberation intensity parameter value of the acquired accompaniment audio signal, wherein the target reverberation intensity parameter value is configured to indicate a rhythm speed, an accompaniment type, and a performance score of a singer of the current to-be-processed musical composition; and reverberating the acquired vocal signal based on the target reverberation intensity parameter value.

Abstract: The subject disclosure relates to high mobility complementary metal-oxide-semiconductor (CMOS) devices and techniques for forming the CMOS devices with fins formed directly on the insulator. According to an embodiment, a method for forming such a high mobility CMOS device can comprise forming, via a first epitaxial growth of a first material, first pillars within first trenches formed within a dielectric layer, wherein the dielectric layer is formed on a silicon substrate, and wherein the first pillars comprise first portions with defects and second portions without the defects. The method can further comprise forming second trenches within a first region of the dielectric layer, and further forming second pillars within the second trenches via a second epitaxial growth of one or more second materials using the second portions of the first pillars as seeds for the second epitaxial growth.

Abstract: Disclosed are a diazaindole derivative as shown in formula I and the use thereof in the preparation of a drug for treating Chk1-related diseases.

Abstract: Techniques regarding anchors for fins comprised within stacked VTFET devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can further comprise a fin extending from a semiconductor body. The fin can be comprised within a stacked vertical transport field effect transistor device. The apparatus can also comprise a dielectric anchor extending from the semiconductor body and adjacent to the fin. Further, the dielectric anchor can be coupled to the fin.

Abstract: Disclosed is a nitrile derivative compound represented by formula (I), a stereoisomer, a deuterated product, a co-crystal, a solvate or a pharmaceutically acceptable salt thereof, wherein each group is as defined in the description. The compound has dipeptidyl peptidase 1 inhibitory activity and can be used to prepare a drug for treating diseases including obstructive airway diseases, bronchiectasis, cystic fibrosis, asthma, emphysema, and chronic obstructive pulmonary diseases.

Abstract: A robot configured to perceive a model of an environment, including: a chassis; a set of wheels; a plurality of sensors; a processor; and memory storing instructions that when executed by the processor effectuates operations including: capturing a plurality of data while the robot moves within the environment; perceiving the model of the environment based on at least a portion of the plurality of data, the model being a top view of the environment; storing the model of the environment in a memory accessible to the processor; and transmitting the model of the environment and a status of the robot to an application of a smartphone previously paired with the robot.