Abstract: An audio processing system and method which calculates, based on spatial metadata of the audio object, a panning coefficient for each of the audio objects in relation to each of a plurality of predefined channel coverage zones. Converts the audio signal into submixes in relation to the predefined channel coverage zones based on the calculated panning coefficients and the audio objects. Each of the submixes indicating a sum of components of the plurality of the audio objects in relation to one of the predefined channel coverage zones. Generating a submix gain by applying an audio processing to each of the submix and controls an object gain applied to each of the audio objects. The object gain being as a function of the panning coefficients for each of the audio objects and the submix gains in relation to each of the predefined channel coverage zones.

Abstract: A semiconductor structure including a one-transistor one-capacitor (1T1R) device is provided that includes an embedded resistive random access memory (ReRAM) having a width larger than 1 gate pitch, that is present in a frontside or the backside of the structure, a frontside contact structure electrically connected to a source region of the transistor of the 1T1R device and a backside contact structure electrically connected to a drain region of the transistor of the 1T1R device.

Abstract: A method for forming a stacked transistor includes forming a sacrificial cap over a first interconnect of a lower level transistor. The method further includes forming an upper level transistor above the sacrificial cap. The method further includes removing the sacrificial cap to form an opening such that the opening is delimited by the upper level transistor. The method further includes forming a second interconnect in the opening such that the second interconnect is in direct contact with the first interconnect.

Abstract: A method of detecting safe and other states of battery while electric vehicle is being driven controls an inverter to generate ripple current on the battery; ripple voltages of a plurality of battery cells are measured, voltage phase shifts between the battery cells are calculated. The battery can be analyzed as normal or otherwise according to the voltage phase shift between plurality of the battery cells. A vehicle-mounted device and a non-volatile storage medium therein, for performing the above-described method, are also disclosed.

Abstract: A method of forming a semiconductor structure includes forming a first array of mandrels on a hardmask layer disposed on an uppermost surface of a semiconductor substrate. First sidewall image transfer spacers are formed on opposing longitudinal sidewalls of each mandrel in the first array of mandrels. A second array of mandrels is formed on the hardmask layer. Each mandrel in the second array of mandrels is laterally separated from each mandrel in the first array of mandrels by the first sidewall image transfer spacers. Second sidewall image transfer spacers are formed on opposing transversal sidewalls of the first array of mandrels and the second array of mandrels. Portions of the second sidewall image transfer spacers are selectively removed to define a crosslink fin pattern to be transferred to the semiconductor substrate.

Abstract: A semiconductor structure includes a power rail contact at least partially disposed between a first source/drain region of a first vertical fin structure and a second source/drain region of a second vertical fin structure. The power rail contact is in contact with a buried power rail disposed under the first and second vertical fin structures. The power rail contact is in contact with at least one of the first and second source/drain regions. A contact cap is disposed above the power rail contact.

Abstract: A resistive random access memory (ReRAM) device and a method for forming the device are provided. The ReRAM device includes a first electrode, a resistive switching element layer in contact with the first electrode, and a plurality of second electrodes in contact with the resistive switching element layer. Protruding portions of the first electrode and the resistive switching element layer overlap with the plurality of second electrodes in a vertical direction of the ReRAM device to form a plurality of vertically stacked ReRAM cells.

Abstract: A microelectronic structure including a first stacked FET device that includes a first bottom FET device and a first upper FET device. The first bottom FET device include a plurality of first bottom channel layers, and the first upper FET device includes a plurality of first upper channel layers. A bottom gate that surrounds the plurality of first bottom channel layers and an upper gate that surrounds the plurality of first upper channel layers. A gate protrusion that extends downwards from the backside of the upper gate to connected to the bottom gate. The gate protrusion partially overlaps with a bottom gate cut region of the first bottom stacked FET device, and the gate protrusion partially overlaps with an upper gate cut region of the first upper stacked FET device.

Abstract: A compound, as represented by formula I, as a TLR7 agonist, a method for preparing the compound, and the use of the compound in treating diseases mediated by the TLR7 agonist are provided. Studies on the activity of a human-derived receptor, a TLR7 agonist, show that compounds have a strong agonistic effect on the human-derived receptor, TLR7, and can be used as a foreground compound for treating diseases mediated by the TLR7 agonist.

Abstract: Monolithically stacked VTFET devices having source/drain contacts with increased contact area and dielectric isolation are provided. In one aspect, a stacked VTFET device includes: at least a bottom VTFET below a top VTFET, wherein the bottom VTFET and the top VTFET each includes source/drain regions interconnected by a vertical fin channel, and a gate stack alongside the vertical fin channel; and source/drain contacts to the source/drain regions, wherein at least one of the source/drain contacts is in direct contact with more than one surface of a given one of the source/drain regions. A stacked VTFET device having at least a bottom VTFET1 below a top VTFET1, and a bottom VTFET2 below a top VTFET2, and a method of forming a stacked VTFET device are also provided.

Abstract: A code checking method includes: causing a compiler to generate a map file and a low-level code file(s) according to a high-level code file(s); obtaining target function information from the map file; finding a target code file from the low-level code file(s); obtaining a first return command of a target function name of the target function information from the target code file; traversing the low-level code file(s) to obtain each calling module name and a second return command of each calling function name; obtaining a second storage area of each calling module name from the map file; and generating a check failure result when calling of a target function name by each calling function name is not complied with a bank-switching compile form according to a first storage area of the target function information, the first return command, each second storage area, and each second return command.

Abstract: Provided is a system including a robot and an application of a communication device. The robot includes a medium storing instructions that when executed by a processor of the robot effectuate operations including: obtaining first data indicative of a relative position of the robot in a workspace; actuating the robot to drive within the workspace to form a map including mapped perimeters that correspond with physical perimeters of the workspace while obtaining second data indicative of movement of the robot; and forming the map of the workspace based on at least some of the first data, wherein the map of the workspace expands as new first data are obtained, until all perimeters of the workspace are included in the map. The application is configured to display information, such as the map, and receive user input.

Abstract: An array substrate and a display panel. The array substrate provided in the embodiments of the present application includes: a base including a flat portion and a recess portion so that the base includes a concave hole corresponding to the bending area; a semiconductor component layer provided on the base and including a plurality of interlayer insulation layers and a plurality of metal layers, the interlayer insulation layers being not aligned horizontally in the peripheral area and the wire switching area to form a stepped hole including a first hole and a second hole, wherein a third metal layer of the metal layers extends along a sidewall and a bottom of the stepped hole and is electrically connected to a first metal layer of the metal layers.

Abstract: A vehicle hitching assistance system includes a controller executing an initial alignment process including searching for a trailer within a specified area of image data that is less than a total field of the image data in directions corresponding with both a longitudinal distance between the vehicle and the trailer and a lateral direction perpendicular to the longitudinal distance, presenting an indication to a driver of the vehicle to reposition the vehicle when the trailer is not identified within the specified area, and removing the indication when the trailer is identified within the specified area. The controller further executes an automated backing process upon identifying the trailer within the specified area, including identifying a coupler of the trailer and outputting a steering signal to the vehicle to cause the vehicle to steer to align a hitch ball of the vehicle with the coupler of the trailer during reversing.

Abstract: A semiconductor structure is provided including a backside source/drain contact structure that contacts a source/drain region of a transistor and overlaps a portion of a tri-layered bottom dielectric isolation structure that is located on a backside of the transistor. The presence of the tri-layered bottom dielectric isolation structure prevents shorting between the gate structure of the transistor and the backside source/drain contact structure, and thus improves process margin.

Abstract: A compound represented by general formula (I) or a stereoisomer, tautomer, deuterated substance, solvate, prodrug, metabolite, pharmaceutically acceptable salt or co-crystal thereof, an intermediate thereof and a preparation method therefor, as well as an application in preparation of a drug for treating diabetes.

Abstract: Provided are an air-conditioning system, a data transmission method and apparatus, and a non-transitory computer storage medium. A centralized air-conditioning controller, at least one air conditioner, and at least one environmental information collection module are provided.

Abstract: A robot configured to perceive a model of an environment, including: a chassis; a set of wheels; a plurality of sensors; a processor; and memory storing instructions that when executed by the processor effectuates operations including: capturing a plurality of data while the robot moves within the environment; perceiving the model of the environment based on at least a portion of the plurality of data, the model being a top view of the environment; storing the model of the environment in a memory accessible to the processor; and transmitting the model of the environment and a status of the robot to an application of a smartphone previously paired with the robot.

Abstract: A method executed by a robot, including: starting, from a starting position, a work session in which the robot maps a workspace, wherein a front of the robot faces towards a forward direction in a frame of reference of the robot; the robot traversing, from the starting position, to a first position, a first distance from the starting position in a backward direction in the frame of reference of the robot; after traversing the first distance, the robot rotating; after rotating, the robot traversing a coverage path of at least one area of the workspace, the coverage path including a boustrophedon movement pattern; and the robot cleaning the at least one area of the workspace with a cleaning tool of the robot while traversing the coverage path.

Abstract: Embodiments of present invention provide a semiconductor structure. The semiconductor structure includes a first nanosheet transistor having a first source/drain (S/D) region; and a second nanosheet transistor on top of the first nanosheet transistor, the second nanosheet transistor having a second S/D region, the second S/D region being separated from the first S/D region by a dielectric cap layer, wherein the first S/D region of the first nanosheet transistor has a substantially flat top surface adjacent to the dielectric cap layer and has at least one vertical edge that is substantially aligned with an edge of the dielectric cap layer. A method of manufacturing the semiconductor structure is also provided.