Patents by Inventor Chen Zhang

Chen Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11769796
    Abstract: A semiconductor device formed by forming a stack of alternating horizontal nanosheet layers, recessing the stack for an n-type field effect transistor (nFET), growing crystalline semiconductor adjacent to the stack, forming vertical nanosheets from the crystalline semiconductor, forming inner spacers between the vertical nanosheets, and forming a high-k metal gate structure around the horizontal nanosheets and the vertical nanosheets.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: September 26, 2023
    Assignee: International Business Machines Corporation
    Inventors: Chen Zhang, Ruilong Xie, Tenko Yamashita
  • Publication number: 20230299205
    Abstract: A semiconductor structure including a bottom source drain region arranged above front-end-of-line circuitry, a gate region disposed above and insulated from the bottom source drain region, a top source drain region disposed above and insulated from the gate region, and a channel region adjacent to the gate region and extending vertically from a top surface of the bottom source drain region to a bottom surface of the top source drain region.
    Type: Application
    Filed: March 18, 2022
    Publication date: September 21, 2023
    Inventors: Heng Wu, Julien Frougier, Ruilong Xie, Chen Zhang
  • Publication number: 20230299176
    Abstract: Embodiments of the present invention are directed to methods and resulting structures for nanosheet devices having defect free channels. In a non-limiting embodiment of the invention, a nanosheet stack is formed over a substrate. The nanosheet stack includes alternating first sacrificial layers and second sacrificial layers. One layer of the first sacrificial layers has a greater thickness than the remaining first sacrificial layers. The first sacrificial layers are removed and semiconductor layers are formed on surfaces of the second sacrificial layers. The semiconductor layers include a first set and a second set of semiconductor layers. The second sacrificial layers are removed and an isolation dielectric is formed between the first set and the second set of semiconductor layers.
    Type: Application
    Filed: May 26, 2023
    Publication date: September 21, 2023
    Inventors: Lan Yu, Kangguo Cheng, Heng Wu, Chen Zhang
  • Patent number: 11764298
    Abstract: A semiconductor device is provided. The semiconductor device includes a buried power rail, a buried oxide (BOX) layer formed on the buried power rail, a plurality of channel fins formed on the BOX layer, a bottom epitaxial layer formed on the BOX layer and between the channel fins such that the BOX layer is between the buried power rail and the bottom epitaxial layer, a gate stack formed over the bottom epitaxial layer and contacting the channel fins, the gate stack including a work function metal (WFM) layer and a high-? layer, and a top epitaxial layer formed on the gate stack. In the semiconductor device, between two adjacent ones of the channel fins the BOX layer has an opening so that the bottom epitaxial layer is electrically connected to the buried power rail.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: September 19, 2023
    Assignee: International Business Machines Corporation
    Inventors: Chen Zhang, Ruilong Xie, Heng Wu, Junli Wang, Brent Anderson
  • Patent number: 11764259
    Abstract: A vertical field-effect transistor includes a substrate comprising a semiconductor material; a first set of fins formed from the semiconductor material and extending vertically with respect to the substrate; and a second set of fins extending vertically with respect to the substrate, wherein ones of the second set of fins abut ones of the first set of fins. The second set of fins comprises a dielectric material.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: September 19, 2023
    Assignee: International Business Machines Corporation
    Inventors: Chen Zhang, Tenko Yamashita, Xin Miao, Wenyu Xu, Kangguo Cheng
  • Patent number: 11763156
    Abstract: In embodiments of the present disclosure, there is provided an approach for neural network model compression based on bank-balanced sparsity. In embodiments of the present disclosure, a set of weight parameters, such as a weight matrix, in a neural network is divided into a plurality of equal-sized banks in terms of number of elements, and then all of the equal-sized banks are pruned at the same sparsity level. In this way, each pruned bank will have the same number of non-zero elements, which is suitable for hardware speedup. Moreover, since each bank is pruned independently in a fine granularity, the model accuracy can be ensured. Thus, according to embodiments of the present disclosure, the neural network compression method based on bank-balanced sparsity can achieve both high model accuracy and high hardware speedup.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: September 19, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Chen Zhang, Yunxin Liu
  • Patent number: 11762512
    Abstract: An electronic device such as a speaker device may have a curved housing characterized by a vertical longitudinal axis. A layer of fabric may cover the curved housing. A touch sensor may be used to detect touch input on the layer of fabric. The touch sensor may include capacitive touch sensor electrodes including drive lines and sense lines. In some arrangements, the touch sensor is formed from conductive strands in the layer of fabric. In other arrangements, the touch sensor is formed from conductive traces on a substrate. The substrate may be formed from portions of the curved housing or may be formed from a layer that is separate from the housing. Light-emitting components and/or fabric with different visual characteristics may be used to mark where the touch-sensitive regions of the fabric are located. The touch-sensitive regions may be shaped as media control symbols.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: September 19, 2023
    Assignee: Apple Inc.
    Inventors: Zhengyu Li, Elvis M. Kibiti, Ming Gao, Qiliang Xu, Chen Zhang
  • Patent number: 11756957
    Abstract: A semiconductor device structure and method for fabricating the same. The semiconductor device structure includes a first vertical transport field effect transistor (VTFET) comprising at least a first gate structure having a first gate length, and a second VTFET stacked on the first VTFET and comprising at least a second gate structure having a second gate length that is less than the first gate length. The method includes forming, on a substrate, a first VTFET including at least a first gate structure having a first gate length. The method further includes forming a second VTFET stacked on the first VTFET and including at least a second gate structure having a second gate length that is less than the first gate length.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: September 12, 2023
    Assignee: International Business Machines Corporation
    Inventors: Heng Wu, Chen Zhang, Kangguo Cheng, Tenko Yamashita, Joshua M. Rubin
  • Patent number: 11757036
    Abstract: A uniform moon-shaped bottom spacer for a VTFET device is provided utilizing a replacement bottom spacer that is epitaxially grown above a bottom source/drain region. After filling a trench that is formed into a substrate with a dielectric fill material that also covers the replacement bottom spacer, the replacement bottom spacer is accessed, removed and then replaced with a moon-shaped bottom spacer.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: September 12, 2023
    Assignee: International Business Machines Corporation
    Inventors: Ruilong Xie, Chen Zhang, Julien Frougier, Alexander Reznicek, Shogo Mochizuki
  • Patent number: 11747819
    Abstract: Provided is provide a robotic device, including: a chassis; a set of wheels; a control system; a battery; one or more sensors; a processor; a tangible, non-transitory, machine readable medium storing instructions that when executed by the processor effectuates operations including: capturing, with the one or more sensors, data of an environment of the robotic device and data indicative of movement of the robotic device; generating or updating, with the processor, a map of the environment based on at least a portion of the captured data; and generating or updating, with the processor, a movement path of the robotic device based on at least the map of the environment.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: September 5, 2023
    Assignee: AI Incorporated
    Inventors: Ali Ebrahimi Afrouzi, Lukas Robinson, Chen Zhang, Brian Highfill
  • Patent number: 11745313
    Abstract: A hand tool includes a first jaw, a first handle fixed to the first jaw, a second jaw, and a second handle pivotally coupled to the second jaw, a link member, and an adjustment member. The adjustment member is operable to axially move a first end of the link member to vary a distance between the first and second jaws. The adjustment member includes an engagement surface engageable with the first end of the link member, a shank in threaded engagement with a bore in the first handle, and a flange extending from the shank opposite the engagement portion. The flange includes a first side, a second side opposite the first side, and an elongate opening extending through the first and second sides.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: September 5, 2023
    Assignee: Milwaukee Electric Tool Corporation
    Inventors: Steven W. Hyma, Chen Zhang Li
  • Patent number: 11747813
    Abstract: Provided is a tangible, non-transitory, machine readable medium storing instructions that when executed by a processor of a robotic device effectuates operations including, receiving, by the processor, a sequence of one or more commands; executing, by the robotic device, the sequence of one or more commands; saving, by the processor, the sequence of one or more commands in memory after a predetermined amount of time from receiving a most recent one or more commands; and re-executing, by the robotic device, the saved sequence of one or more commands.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: September 5, 2023
    Assignee: AI Incorporated
    Inventors: Ali Ebrahimi Afrouzi, Lukas Fath, Chen Zhang
  • Patent number: 11744472
    Abstract: The present approach relates to determining a reference value based on image data that includes a non-occluded vascular region (such as the ascending aorta in a cardiovascular context). This reference value is compared on a pixel-by pixel basis with the CT values observed in the other vasculature regions. With this in mind, and in a cardiovascular context, the determined FFR value for each pixel is the ratio of CT value in the vascular region of interest to the reference CT value.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: September 5, 2023
    Assignee: GE Precision Healthcare LLC
    Inventors: Zhoushe Zhao, Yingbin Nie, Chen Zhang
  • Publication number: 20230275603
    Abstract: Embodiments of the present application provide an electronic device for wireless communication. An example electronic device includes a low-frequency processing circuit, a high-frequency processing circuit, a coil, and at least one capacitor. The low-frequency processing circuit is electrically connected to two ends of the coil. The high-frequency processing circuit is electrically connected to the two ends of the coil. Each of the at least one capacitor is connected in parallel to the coil.
    Type: Application
    Filed: July 7, 2021
    Publication date: August 31, 2023
    Inventors: Qiang Wang, Hanyang Wang, Chen Zhang, Chengcheng Nie, Xiaofeng Li
  • Publication number: 20230265107
    Abstract: The present invention relates to a compound of formula (I); a stereoisomer, a tautomer, a nitrogen oxide, a solvate, a metabolite, a pharmaceutically acceptable salt, a co-crystal or a prodrug thereof, or a pharmaceutical composition containing same; and the use thereof as a PB2 inhibitor in the preparation of a drug for treating related diseases. Each group in formula (I) is as defined in the description.
    Type: Application
    Filed: July 9, 2021
    Publication date: August 24, 2023
    Applicant: SICHUAN HAISCO PHARMACEUTICAL CO., LTD.
    Inventors: Yao LI, Lei CHEN, Zongjun SHI, Guobiao ZHANG, Wenjing WANG, Fei YE, Gang HU, Tiancheng HE, Haodong WANG, Jia NI, Chen ZHANG, Pangke YAN
  • Patent number: 11735658
    Abstract: A method for manufacturing a semiconductor device includes forming a source layer on a semiconductor substrate, forming a channel layer on the source layer, and forming a drain layer on the channel layer. The source, channel and drain layers are patterned into at least one fin, and a cap layer is formed on a lower portion of the at least one fin. The lower portion of the at least one fin includes the source layer and part of the channel layer. The method further includes forming a gate structure comprising a gate dielectric layer and a gate conductor on the at least one fin and on the cap layer. The cap layer is positioned between the lower portion of the at least one fin and the gate dielectric layer.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: August 22, 2023
    Assignee: International Business Machines Corporation
    Inventors: Xin Miao, Chen Zhang, Kangguo Cheng, Wenyu Xu
  • Patent number: 11728340
    Abstract: Devices and methods are provided for forming single diffusion break isolation structures for integrated circuit devices including gate-all-around FET devices such as nanosheet FET devices and nanowire FET devices. For example, a semiconductor integrated circuit device includes first and second gate-all-around field-effect transistor devices disposed in first and second device regions, respectively, of a semiconductor substrate. A single diffusion break isolation structure is disposed between the first and second device regions. The single diffusion break isolation structure includes a dummy gate structure disposed on the semiconductor substrate between a first source/drain layer of the first gate-all-around field-effect transistor device and a second source/drain layer of the second gate all-around field-effect transistor device. The single diffusion break isolation structure is configured to electrically isolate the first and second source/drain layers.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: August 15, 2023
    Assignee: International Business Machines Corporation
    Inventors: Wenyu Xu, Xin Miao, Chen Zhang, Kangguo Cheng
  • Patent number: 11726489
    Abstract: Provided is a tangible, non-transitory, machine readable medium storing instructions that when executed by one or more processors of a robotic device effectuate operations including capturing, with a camera of the robotic device, spatial data of surroundings of the robotic device; generating, with the one or more processors of the robotic device, a movement path based on the spatial data of the surroundings; capturing, with at least one sensor of the robotic device, at least one measurement relative to the surroundings of the robotic device; obtaining, with the one or more processors of the robotic device, the at least one measurement; and inferring, with the one or more processors of the robotic device, a location of the robotic device based on the at least one measurement.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: August 15, 2023
    Assignee: AI Incorporated
    Inventors: Ali Ebrahimi Afrouzi, Lukas Robinson, Chen Zhang
  • Patent number: 11726490
    Abstract: A robotic device, including a tangible, non-transitory, machine readable medium storing instructions that when executed by a processor effectuates operations including: capturing, with the camera, one or more images of an environment of the robotic device; capturing, with the plurality of sensors, sensor data of the environment; generating or updating, with the processor, a map of the environment; identifying, with the processor, one or more rooms in the map; receiving, with the processor, one or more multidimensional arrays including at least one parameter that is used to identify a feature included in the one or more images; determining, with the processor, a position and orientation of the robotic device relative to the feature; and transmitting, with the processor, a signal to the processor of the controller to adjust a heading of the robotic device.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: August 15, 2023
    Assignee: AI Incorporated
    Inventors: Ali Ebrahimi Afrouzi, Lukas Fath, Chen Zhang, Brian Highfill
  • Patent number: D996401
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: August 22, 2023
    Assignee: Beijing Dajia Internet Information Technology Co., Ltd.
    Inventors: Runqiang Han, Chen Zhang, Xinliang Lv, Xiguang Zheng, Qiong Yan, Qiao Han