Abstract: A semiconductor device including a first source/drain region (S/D) located on a frontside of a substrate, wherein the first source/drain region has a first width, a second S/D region located on the frontside of the substrate, wherein the second source/drain region is located above the first source drain region, wherein the second source/drain region has second width, wherein the first width is larger than the second width, a first power rail located on a backside of the substrate, a second power rail located on the backside of the substrate, a first connector in contact with the first source/drain region, wherein the first connector is only in contact with a sidewall of the first source/drain region, and a second connector in contact with the second source/drain region, wherein the second connector is in contact with a top surface and a side surface of the second source/drain region.

Abstract: Semiconductor devices, and methods of forming the same, include forming a stack of channel layers, including an upper device region and a lower device region. The upper device region is separated from the lower device region by a dielectric spacer layer. A first work function metal layer is formed on the channel layers in the lower device region. A height of the first work function metal layer does not rise above the dielectric spacer layer. A second work function metal layer is formed on the channel layers in the upper device region.

Abstract: Disclosed is a multi-shaft pressurized rock mechanics tester, pertaining to the technical field of rock mechanics testing devices, comprising a base; the base is of an integral rectangular structure, and welded six vertical support plates symmetrically at the front and back ends, a -shaped bracket plate is horizontally welded at the top of the six vertical support plates (“” is a Chinese character, read as “Ri”), and a bracket plate is rotatably installed on the top section of the three rear vertical support plates, pressed against the -shaped bracket plate; the left and right sides of the base are symmetrically welded with four vertical bracing plates, an I-shaped installation plate is welded on the top of the four vertical bracing plates, four hydraulic cylinders are locked, fixed and hoisted on the bottom of the I-shaped installation plate with screws.

Abstract: A control blurring method and apparatus, a terminal device, and a readable storage medium are provided, which are applicable to the terminal field. The method includes: obtaining a dynamic parameter of a first control in a first frame image during drawing of the first frame image; encapsulating a drawing result of the first frame image and a dynamic parameter, to obtain a result of the encapsulation; performing composition on the drawing result of the first frame image based on the dynamic parameter, to obtain a composition result having a blur effect of the first frame image; and performing display based on the composition result of the first frame image.

Abstract: A plurality of transistor components, a system, and a method of forming a vertically stacked transistor structure within a wafer. The plurality of transistor components may include a first bottom transistor, where the first bottom transistor includes a channel, a gate, a source, and a drain. The plurality of transistor components may also include a first contact on top of the first bottom transistor, where the first contact is proximately connected to the first bottom transistor. The plurality of transistor components may also include a first set of stacked transistors, where the first set of stacked transistors includes a second top transistor on top of a second bottom transistor.

Abstract: An apparatus includes a fin, a gate, and a gate contact. A portion of the fin is disposed in a first layer. The gate is disposed in the first layer and adjacent to the fin. The gate contact is disposed on the gate and in a second layer, wherein the second layer is disposed on the first layer such that the gate contact is above the fin.

Abstract: Disclosed is a multi-shaft pressurized rock mechanics tester, pertaining to the technical field of rock mechanics testing devices, comprising a base; the base is of an integral rectangular structure, and welded six vertical support plates symmetrically at the front and back ends, a -shaped bracket plate is horizontally welded at the top of the six vertical support plates (“” is a Chinese character, read as “Ri”), and a bracket plate is rotatably installed on the top section of the three rear vertical support plates, pressed against the -shaped bracket plate; the left and right sides of the base are symmetrically welded with four vertical bracing plates, an I-shaped installation plate is welded on the top of the four vertical bracing plates, four hydraulic cylinders are locked, fixed and hoisted on the bottom of the I-shaped installation plate with screws.

Abstract: An electronic device such as a speaker device may have a curved housing characterized by a vertical longitudinal axis. A layer of fabric may cover the curved housing. A touch sensor may be used to detect touch input on the layer of fabric. The touch sensor may include capacitive touch sensor electrodes including drive lines and sense lines. In some arrangements, the touch sensor is formed from conductive strands in the layer of fabric. In other arrangements, the touch sensor is formed from conductive traces on a substrate. The substrate may be formed from portions of the curved housing or may be formed from a layer that is separate from the housing. Light-emitting components and/or fabric with different visual characteristics may be used to mark where the touch-sensitive regions of the fabric are located. The touch-sensitive regions may be shaped as media control symbols.

Abstract: The present invention provides a multifunctional rock mechanics tester, pertaining to the technical field of mechanics tester, consisting of a base; wherein a power mechanism is mounted on the top of the base, two tension testing mechanisms are arranged on the power mechanism in an up-and-down symmetrical way, a clamping mechanism is mounted on each tension testing mechanism, a rock testing block is clamped between the two clamping mechanisms. The present invention realizes the tension and pressure testing of the rock test block through the arrangement of tension testing mechanism and pressure testing mechanism, thus improving the functionality of the present mechanics tester, which not only reduces the testing cost, but also effectively decreases the occupied space; the present invention solves the problem that the traditional mechanics tester can only complete one kind of test when it is used.

Abstract: A uniform moon-shaped bottom spacer for a VTFET device is provided utilizing a replacement bottom spacer that is epitaxially grown above a bottom source/drain region. After filling a trench that is formed into a substrate with a dielectric fill material that also covers the replacement bottom spacer, the replacement bottom spacer is accessed, removed and then replaced with a moon-shaped bottom spacer.

Abstract: A data encoding method includes obtaining to-be-encoded data; processing the to-be-encoded data by using a volume preserving flow model to obtain a hidden variable output, where the volume preserving flow model includes a target volume preserving flow layer, an operation corresponding to the target volume preserving flow layer is an invertible operation that meets a volume preserving flow constraint, the target volume preserving flow layer is used to perform a multiplication operation on a preset coefficient and first data input to the target volume preserving flow layer, and the preset coefficient is not 1; and encoding the hidden variable output to obtain encoded data.

Abstract: A method is presented for forming a nanosheet device. The method includes forming nanosheets stacks over a substrate, the nanosheet stacks separated by shallow trench isolation (STI) regions, forming a first hardmask material over the nanosheet stacks, depositing a sacrificial gate, recessing the sacrificial gate such that recesses are defined adjacent the first hardmask material, wherein a top surface of the sacrificial gate is below a top surface of the first hardmask material, forming a second hardmask material in the recesses, defining a uniform gate length in both the first and second hardmask materials, and selectively trimming the first hardmask material such that a gate length over the nanosheet stacks is less than a gate length over the STI regions.

Abstract: The present application discloses a warp execution method used for SPs of an SM of a GPU and an associated GPU.

Abstract: Provided is a method including: capturing, with at least one sensor of a robot, first data indicative of the position of the robot in relation to objects within the workspace and second data indicative of movement of the robot; recognizing, with a processor of the robot, a first area of the workspace based on observing at least one of: a first part of the first data and a first part of the second data; generating, with the processor of the robot, at least part of a map of the workspace based on at least one of: the first part of the first data and the first part of the second data; generating, with the processor of the robot, a first movement path covering at least part of the first recognized area; actuating, with the processor of the robot, the robot to move along the first movement path.

Abstract: A semiconductor device is provided. The semiconductor device includes a buried power rail, a buried oxide (BOX) layer formed on the buried power rail, a plurality of channel fins formed on the BOX layer, a bottom epitaxial layer formed on the BOX layer and between the channel fins such that the BOX layer is between the buried power rail and the bottom epitaxial layer, a gate stack formed over the bottom epitaxial layer and contacting the channel fins, the gate stack including a work function metal (WFM) layer and a high-x layer, and a top epitaxial layer formed on the gate stack. In the semiconductor device, between two adjacent ones of the channel fins the BOX layer has an opening so that the bottom epitaxial layer is electrically connected to the buried power rail.

Abstract: A power distribution system is provided in this application, which includes a plurality of power distribution equipments, and the plurality of power distribution equipments are configured to supply power to a plurality of powered devices respectively. First power distribution equipment in the plurality of power distribution equipments includes: a first power module, configured to perform voltage conversion on an input voltage to obtain an output voltage, where the output voltage is a supply voltage of the first power distribution equipment; and a first cascading circuit, configured to connect an output of the first power module to an output of a power module in power distribution equipment in the power distribution system other than the first power distribution equipment, where the first power distribution equipment is any power distribution equipment in the power distribution system. A server system which includes the power distribution system is also disclosed in this application.

Abstract: Disclosed are a compound of formula (I), a stereoisomer, a pharmaceutically acceptable salt, a solvate, and a eutectic or deuterated compound thereof, or a pharmaceutical composition comprising same, and a use thereof as an EZH2 inhibitor in the preparation of a medication for treating related diseases. The definition of each group in formula (I) is consistent with that in the description.

Abstract: The present application discloses a GPU and a method of the same. The GPU includes: a plurality of streaming multiprocessor (SMs), each including: a plurality of streaming processors (SPs), each including a register, wherein each SP has a predetermined upper bound of warp number, and the register has a predetermined upper bound of register capacity; and a global dispatcher, including: a register occupancy status table, for recording the warp number and an occupancy status of the register of each SP of each SM; a TB (TB) dispatch module, for dispatching the TB to a first SM of the SMs according to a warp type classification table and the register occupancy status table; and a warp dispatch module, for dispatching a plurality of warps to the plurality of SPs of the first SM according to the warp type classification table and the register occupancy status table.

Abstract: The invention provides a sampling device for geological fluid detection, relates to the technical field of fluid detection. The sampling device comprises a support frame, the support frame is of an L-shaped structure, and a second support plate is arranged above the support frame; the protection cover is mounted at the corner of the bottom of the support frame. The water fixing cone is clamped above the support frame; the locking inclined block is mounted at the upper part; and the detector is provided with a water inlet pipe. Fluid at different depths is detected through cooperation of the mounting sleeve and the lifting frame, a fluid drainage tube is wound through the winding wheel, the mounting sleeve is driven by the lifting frame to adjust the position through the arrangement of the gear and the rack, the fluid is sampled through the sampling test tube.

Abstract: Embodiments of the invention include a vertical field-effect transistor (VTFET) inverter. The VTFET inverter may include a p-channel field-effect transistor (P-FET) with a P-FET top source/drain and a P-FET bottom source/drain. The VTFET inverter may also include an n-channel field-effect transistor (N-FET) comprising an N-FET top source/drain and a N-FET bottom source/drain. The VTFET inverter may also include a buried contact located at a boundary between the P-FET bottom source/drain and the N-FET bottom source/drain. The VTFET inverter may also include a Vout contact electrically connected to one of the P-FET bottom source/drain and the N-FET bottom source/drain.