Patents by Inventor Cheng-Hung Chang

Cheng-Hung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180174017
    Abstract: The present invention provides a radio frequency identification and sensing device comprising an antenna module, a RFID sensing module, and battery module. The antenna module has a first flexible substrate having an antenna circuit formed thereon. The RFID sensing module comprises a second flexible substrate, a RFID chip, a sensor formed on the second flexible substrate and a memory module formed on the second flexible substrate, wherein the sensor is utilized to detecting an environmental status for generating a plurality of sensing data, and the memory module is utilized to store the plurality of sensing data. The RFID chip is utilized to transfer the plurality of data to a reading device. The battery module is utilized to provide electrical power for operating the RFID sensing module.
    Type: Application
    Filed: February 24, 2017
    Publication date: June 21, 2018
    Applicant: Securitag Assembly Group Co., Ltd
    Inventors: Tian lin Yan, Cheng hung Chang, Way Yu Chen
  • Publication number: 20180169917
    Abstract: The present invention provides an RFID device and manufacturing method. The RFID device comprises a first housing, an antenna module, and a second housing. The antenna module arranged on the first housing comprises a base substrate, and an antenna layer, sticking on an outer surface of the base substrate. The second housing is formed to couple to the first housing by an injection molding process so that the antenna module is arranged between the first and second housings.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 21, 2018
    Applicant: Securitag Assembly Group Co., Ltd
    Inventors: Cheng hung Chang, Ching Mei Chi, Chun Jun Chuang, Ya Chi Shen, Tian lin Yan
  • Patent number: 9935197
    Abstract: Semiconductor devices with low junction capacitances and methods of fabrication thereof are described. In one embodiment, a method of forming a semiconductor device includes forming isolation regions in a substrate to form active areas. The sidewalls of the active areas are enclosed by the isolation regions. The isolation regions are recessed to expose first parts of the sidewalls of the active areas. The first parts of the sidewalls of the active areas are covered with spacers. The isolation regions are etched to expose second parts of the sidewalls of the active area, the second parts being disposed below the first parts. The active areas are etched through the exposed second parts of the sidewalls to form lateral openings. The lateral openings are filled with a spin on dielectric.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: April 3, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Hung Chang, Yu-Rung Hsu, Chen-Hua Yu
  • Publication number: 20170330939
    Abstract: A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
    Type: Application
    Filed: July 31, 2017
    Publication date: November 16, 2017
    Inventors: Cheng-Hung Chang, Chen-Hua Yu, Chen-Nan Yeh
  • Patent number: 9735042
    Abstract: A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over the second portion of the semiconductor substrate, wherein the second FinFET includes a second fin having a second fin height different from the first fin height. A top surface of the first fin is substantially level with a top surface of the second fin. A punch-through stopper is underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: August 15, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Ting Hung, Cheng-Hung Chang, Chen-Yi Lee, Chen-Nan Yeh, Chen-Hua Yu
  • Patent number: 9735276
    Abstract: Non-planar transistors and methods of fabrication thereof are described. In an embodiment, a method of forming a non-planar transistor includes forming a channel region on a first portion of a semiconductor fin, the semiconductor fin having a top surface and sidewalls. A gate electrode is formed over the channel region of the semiconductor fin, and an in-situ doped semiconductor layer is grown on the top surface and the sidewalls of the semiconductor fin on opposing sides of the gate electrode using a selective epitaxial growth process. At least a part of the doped semiconductor layer is converted to form a dopant rich region.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: August 15, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hang Tung, Chin-Hsiang Lin, Cheng-Hung Chang, Sey-Ping Sun
  • Patent number: 9722025
    Abstract: A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: August 1, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Hung Chang, Chen-Hua Yu, Chen-Nan Yeh
  • Patent number: 9619743
    Abstract: The present invention provides a radio frequency identification device comprising an antenna module and a substrate module. The antenna module has a flexible substrate having an antenna circuit forming thereon. A first surface of the flexible substrate further has a first and a second electrical connecting pads coupled to the antenna circuit, wherein the antenna circuit does not pass through a space between the first and second electrical connecting pads. The substrate module comprises a RFID chip and at least one passive element electrically coupled to a substrate having a pair of third electrical connecting pads. A conductive adhesive formed between the first and second electrical connecting pads and the third electrical connecting pads is utilized to couple the antenna module with the substrate module.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: April 11, 2017
    Assignee: SECURITAG ASSEMBLY GROUP CO., LTD.
    Inventors: Tian-Lin Yan, Cheng-Hung Chang, Way-Yu Chen, Wen-Fan Chang
  • Patent number: 9553628
    Abstract: A phone case capable of measuring a distance to an object contains: an accommodating cover, a protective cover, and a cell. The accommodating cover includes a first orifice defined on a front end thereof and includes two locking tabs extending outwardly from two peripheral sides thereof and connecting with a smartphone. The protective cover connects with the accommodating cover and includes an aperture defined on a rear end thereof. A front end of the cell connects with a first printed circuit board (PCB) for measuring a distance to an object, and a rear end of the cell couples with a second printed circuit board (PCB) for controlling a power supply. The first PCB has an infrared ray (IR) receiver, and the second PCB has a charging connector electrically connected with the smartphone and has a button mounted on a bottom thereof.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: January 24, 2017
    Assignee: Comax Hardware Co., Ltd.
    Inventor: Cheng-Hung Chang
  • Publication number: 20160329245
    Abstract: A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner.
    Type: Application
    Filed: July 20, 2016
    Publication date: November 10, 2016
    Inventors: Chen-Hua YU, Cheng-Hung CHANG, Ebin LIAO, Chia-Lin YU, Hsiang-Yi WANG, Chun Hua CHANG, Li-Hsien HUANG, Darryl KUO, Tsang-Jiuh WU, Wen-Chih CHIOU
  • Patent number: 9418923
    Abstract: A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: August 16, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hua Yu, Cheng-Hung Chang, Ebin Liao, Chia-Lin Yu, Hsiang-Yi Wang, Chun Hua Chang, Li-Hsien Huang, Darryl Kuo, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Patent number: 9411070
    Abstract: A two-tier wireless soil measurement apparatus is disclosed, including a top head and a plurality of sensors, wherein the top head being placed on or above the ground and the plurality of sensors being buried under the soil for sensing soil conditions, generating soil data representing the sensed soil conditions, and transmitting generated soil conditions to the top head; the plurality of sensors able to be assembled into a pole and each of the plurality of sensors including a sensor unit for sensing a soil condition; a circuit module connected to the sensor unit for transmitting sensed soil condition to the top head, a sensor housing for housing the sensor unit and the circuit module; and an engaging element for engaging two sensors in a head-to-tail manner for form a pole.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: August 9, 2016
    Inventor: Cheng-Hung Chang
  • Publication number: 20160133703
    Abstract: A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
    Type: Application
    Filed: January 5, 2016
    Publication date: May 12, 2016
    Inventors: Cheng-Hung Chang, Chen-Hua Yu, Chen-Nan Yeh
  • Patent number: 9299785
    Abstract: A semiconductor structure includes a semiconductor fin on a top surface of a substrate, wherein the semiconductor fin includes a middle section having a first width; and a first and a second end section connected to opposite ends of the middle section, wherein the first and the second end sections each comprises at least a top portion having a second width greater than the first width. The semiconductor structure further includes a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin; and a gate electrode on the gate dielectric layer.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: March 29, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Yu-Rung Hsu, Chen-Nan Yeh, Cheng-Hung Chang
  • Patent number: 9230959
    Abstract: A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: January 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Hung Chang, Chen-Hua Yu, Chen-Nan Yeh
  • Publication number: 20150316497
    Abstract: A wireless subsoil tension meter is disclosed, including an upper housing part, a middle housing part, a lower housing part, and a sensor module. The upper, middle and lower housing parts are assembled to form a sealed space to house a sensor module and liquid. The upper housing part has a tubular body shape. The middle housing part has a funnel body shape, with a larger top and the smaller bottom, the top end of the middle housing part is slightly smaller than the inside the bottom end of the outer tube of the upper housing part for easy assembly and tight fit. The lower housing part is has an elongated dome shape. When assembled, the sensor module is housed inside the assembly, which can further be applied to an extendable wireless soil measurement apparatus.
    Type: Application
    Filed: April 30, 2014
    Publication date: November 5, 2015
    Inventor: Cheng-Hung CHANG
  • Publication number: 20150287784
    Abstract: A semiconductor structure includes a semiconductor fin on a top surface of a substrate, wherein the semiconductor fin includes a middle section having a first width; and a first and a second end section connected to opposite ends of the middle section, wherein the first and the second end sections each comprises at least a top portion having a second width greater than the first width. The semiconductor structure further includes a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin; and a gate electrode on the gate dielectric layer.
    Type: Application
    Filed: June 17, 2015
    Publication date: October 8, 2015
    Inventors: Chen-Hua Yu, Yu-Rung Hsu, Chen-Nan Yeh, Cheng-Hung Chang
  • Publication number: 20150262861
    Abstract: A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over the second portion of the semiconductor substrate, wherein the second FinFET includes a second fin having a second fin height different from the first fin height. A top surface of the first fin is substantially level with a top surface of the second fin. A punch-through stopper is underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate.
    Type: Application
    Filed: May 29, 2015
    Publication date: September 17, 2015
    Inventors: Shih-Ting Hung, Cheng-Hung Chang, Chen-Yi Lee, Chen-Nan Yeh, Chen-Hua Yu
  • Publication number: 20150204041
    Abstract: A two-tier wireless soil measurement apparatus is disclosed, including a top head and a plurality of sensors, wherein top head being placed above soil surface and the plurality of sensors being scattered under soil; each sensor including a sensor housing, first communication module, sensor unit and power module; the sensor unit sensing a soil condition and generating soil data representing the soil condition, the first communication module transmitting the soil data wirelessly to top head, and the power module providing power for sensor unit and first communication module; the top head including a first communication module, controller, second communication module and power module; the first communication module receiving soil data from first communication modules of sensors, the controller processing soil data, the second communication module transmitting the soil data wirelessly to a data station, and power module providing power to first communication module, controller and second communication module.
    Type: Application
    Filed: January 21, 2014
    Publication date: July 23, 2015
    Inventor: Cheng-Hung Chang
  • Patent number: 9076689
    Abstract: A semiconductor structure includes a semiconductor fin on a top surface of a substrate, wherein the semiconductor fin includes a middle section having a first width; and a first and a second end section connected to opposite ends of the middle section, wherein the first and the second end sections each comprises at least a top portion having a second width greater than the first width. The semiconductor structure further includes a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin; and a gate electrode on the gate dielectric layer.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: July 7, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Yu-Rung Hsu, Chen-Nan Yeh, Cheng-Hung Chang