Abstract: A photographing optical lens assembly includes five lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element has positive refractive power. The second lens element has negative refractive power. When specific conditions are satisfied, the requirements of compact size and high image quality can be met by the photographing optical lens assembly, simultaneously.

Abstract: A cooling system for a heat-generating electronic device includes a cold plate module, a flow channel, and a fin arrangement. The cold plate module includes a base plate and a top cover. The flow channel is for a liquid coolant and extends between an inlet connector and an outlet connector. The liquid coolant flows along a flow direction. The fin arrangement is located between the base plate and the top cover. The fin arrangement is thermally coupled to the flow channel and is eccentrically located relative to the cold plate module.

Abstract: Systems and methods that may be implemented to determine electrical characteristic/s of one or more power supply cable/s that are coupled to supply power from a power supply to a battery-powered information handling system, and to take one or more actions based on the determined electrical characteristic/s. The disclosed systems and methods may be so implemented to detect values of input voltage and input current that are provided from the power supply cable to a battery-powered information handling system, and to take one or more actions based on these detected values of input voltage and input current, such as power supply voltage compensation, protection of the power supply, alerts to the battery-powered information handling system, and/or warnings to a user of the battery-powered information handling system.

Abstract: A mold includes first and second disks, and a spindle connecting centers of first and second disks. The first disk has first linear grooves extending radially from the center to outer periphery of the first disk. The second disk has second linear grooves that extend radially from the center to outer periphery of the second disk and are respectively aligned with first linear grooves. The spindle has first and second end portions that protrude from the first and second disks, respectively. Methods using the mold for producing a semi-product and a hub assembly are also disclosed.

Abstract: A light emitting device including a substrate, a first pad, a second pad, a light emitting diode, a first connection structure, a second connection structure, and a patterned adhesive layer and a method for manufacturing the same are provided. The first pad and the second pad are located on the substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, a first electrode and a second electrode. The first electrode and the second electrode are respectively connected to the first semiconductor layer and the second semiconductor layer. The first connection structure electrically connects the first electrode to the first pad. The second connection structure electrically connects the second electrode to the second pad. The patterned adhesive layer is located between the substrate and the light emitting diode and does not contact the first connection structure and the second connection structure.

Abstract: Antenna arrays, antenna elements for said arrays, and methods of fabricating and using the same are provided. Antenna arrays can be operated at multiple frequencies, such as at two different frequencies for Radio Detection And Ranging (RADAR) communication and for imaging applications. Each antenna element can include a driven patch that is excited directly and a parasitic patch that is excited by the driven patch.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor, and a method for forming the image sensor, in which an inter-pixel trench isolation structure is defined by a low-transmission layer. In some embodiments, the image sensor comprises an array of pixels and the inter-pixel trench isolation structure. The array of pixels is on a substrate, and the pixels of the array comprise individual photodetectors in the substrate. The inter-pixel trench isolation structure is in the substrate. Further, the inter-pixel trench isolation structure extends along boundaries of the pixels, and individually surrounds the photodetectors, to separate the photodetectors from each other. The inter-pixel trench isolation structure is defined by a low-transmission layer with low transmission for incident radiation, such that the inter-pixel trench isolation structure has low transmission for incident radiation.

Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.

Abstract: The present disclosure provides an electronic device. The electronic device includes a first electronic component and a second electronic component. The first electronic component is configured to receive a radio frequency (RF) signal and amplify a power of the RF signal. The second electronic component is disposed under the first electronic component. The second electronic component includes an interconnection structure passing through the second electronic component. The interconnection structure is configured to provide a path for a transmission of the RF signal.

Abstract: The invention relates to a control unit for a fluid control device wherein the control unit comprises a pressure unit for providing positive and/or negative pressure, at least one first control unit outlet being fluidically connectable to a processing device comprising at least one receptacle for receiving a fluid sample, at least one second control unit outlet being fluidically connectable to a treatment device having a chamber for receiving the processing device, and a connection unit by means of which the pressure unit is fluidically connectable or connected with the first control unit outlet and/or with the second control unit outlet wherein the control unit is adapted to control the processing of the fluid sample in the processing device by applying a positive or negative pressure provided by the pressure unit to the first control unit outlet by means of the connection unit and to control a physical state in the chamber of the treatment device.

Abstract: A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.

Abstract: Apparatus and methods are provided for determining UE appropriate states by traffic type detection. In one novel aspect, a UE traffic type is determined based on a plurality of UE metrics. One or more UE settings for transmission and/or reception are adjusted based on the determined UE traffic type. The UE traffic type determination procedure and UE configuration adjustment procedure are iterated to balance performance and power saving. In one embodiment, the UE collects a plurality of UE metrics for a UE traffic profile matrix, wherein the UE traffic profile matrix is used to determine a plurality of UE traffic types based on the plurality of UE metrics. The UE determines a real-time UE traffic type based on the collected UE metrics using the UE traffic profile matrix and adjusts a set of UE configurations based on the UE traffic type when one or more predefined conditions are met.

Abstract: A three-dimensional flash memory device may be a AND flash memory device. The three-dimensional flash memory device includes: a substrate, a gate stack structure, a plurality of slit structures, a plurality of memory arrays, and a plurality of conductive pillars. The gate stack structure is located above the substrate. The plurality of slit structures extend through the gate stack structure and divide the gate stack structure into a plurality of blocks. The plurality of memory arrays are disposed in the gate stack structure of the plurality of blocks. The plurality of conductive pillars extends through the gate stack structure in the plurality of blocks, and disposed between the plurality of memory arrays and between the plurality of slit structures.

Abstract: Apparatus and methods are provided for determining AR filter coefficient and numbers of synchronization. In one novel aspect, the AR filter coefficient and times of synchronization are determined based on the temperatures of the oscillator. In one embodiment, the UE determines a temperature drift rate by collecting sets of temperatures before and after the UE in the sleep mode of the CDRX, generates one or more threshold look-up tables and performs an optimization selection based on the temperature drift rate and the one or more threshold of look-up tables, wherein the optimization selection comprising selecting an alpha coefficient and a number of subframes for synchronization. In another embodiment, the optimization selection is further determined based on a subcarrier spacing, and a channel type of being a static channel type and a fading channel type. The UE further performs an on-the-fly oscillator S-curve calibration based on the set of temperatures.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: The present disclosure relates to a polyphenol-modified hydrocarbon composition-based prepreg and a copper clad laminate prepared therefrom. The present disclosure uses polyarylether or polyolefin resin modified with hydroxyl end, amino end or mercapto end as the matrix resin and epoxy resin as the main curing agent to construct a hydrocarbon composition with excellent dielectric properties.

Abstract: A computer processing system is provided for enhancing video-based language learning. The system includes a video server for storing videos that use one or more languages to be learned. The system further includes a video metadata database for storing translations of sentences uttered in the videos, character profiles of characters appearing in the videos, and mappings between the sentences and a learner profile. The system also includes a learner profile database for storing learner profiles. The system additionally includes a semantic analyzer and matching engine for finding, for at least a given video and a given learner, alternative sentences for and responsive to the translations of the sentences uttered in the given video that conflict with a respective learner profile for the given learner. The computer processing system further includes a presentation system for playing back the given video and providing the alternative sentences to the given learner.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor device including a first image sensor element and a second image sensor element disposed within a substrate. An interconnect structure is disposed along a front-side surface of the substrate and comprises a plurality of conductive wires, a plurality of conductive vias, and a first absorption structure. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths. The second image sensor element is configured to generate electrical signals from the electromagnetic radiation within a second range of wavelengths that is different than the first range of wavelengths. The second image sensor element is laterally adjacent to the first image sensor element. Further, the first image sensor element overlies the first absorption structure and is spaced laterally between opposing sidewalls of the first absorption structure.

Abstract: A battery material is a core-shell structure, and the core-shell structure includes a core and a shell. The shell surrounds the core. A composition of the core is a silicon material. The shell includes a polymer, the polymer is linear, the polymer includes a first structure and a second structure, the first structure includes a siloxane group, and the second structure includes a carboxyl group or an ester group. The first structure is more adjacent to the core than the second structure.

Abstract: The present disclosure describes a three-chip complementary metal-oxide-semiconductor (CMOS) image sensor and a method for forming the image sensor. The image sensor a first chip including a plurality of image sensing elements, transfer transistors and diffusion wells corresponding to the plurality of image sensing elements, a ground node shared by the plurality of image sensing elements, and deep trench isolation (DTI) structures extending from the shared ground node and between adjacent image sensing elements of the plurality of image sensing elements. The image sensor further includes a second chip bonded to the first chip and including a source follower, a reset transistor, a row select transistor, and an in-pixel circuit, where the source follower is electrically coupled to the diffusion wells. The image sensor further includes a third chip bonded to the second chip and including an application-specific circuit, where the application-specific circuit is electrically coupled to the in-pixel circuit.