Patents by Inventor Cheng-Yu (Sean) Lin

Cheng-Yu (Sean) Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICE PACKAGE
    Publication number: 20230268638
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first antenna pattern disposed at a first elevation and a second antenna pattern disposed at a second elevation different from the first elevation. The first antenna pattern and the second antenna pattern define an air cavity. The semiconductor device package also includes a circuit layer. The air cavity is between the first antenna pattern, the second antenna pattern, and the circuit layer.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 24, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yu HO, Meng-Wei HSIEH
  • INTEGRATED CIRCUIT DEVICE, METHOD AND SYSTEM
    Publication number: 20230268910
    Abstract: An integrated circuit (IC) device includes a master latch circuit having a first clock input and a data output, a slave latch circuit having a second clock input and a data input electrically coupled to the data output of the master latch circuit, and a clock circuit. The clock circuit is electrically coupled to the first clock input by a first electrical connection configured to have a first time delay between the clock circuit and the first clock input. The clock circuit is electrically coupled to the second clock input by a second electrical connection configured to have a second time delay between the clock circuit and the second clock input. The first time delay is longer than the second time delay.
    Type: Application
    Filed: May 26, 2022
    Publication date: August 24, 2023
    Inventors: Cheng-Yu LIN, Yung-Chen CHIEN, Jia-Hong GAO, Jerry Chang Jui KAO, Hui-Zhong ZHUANG
  • Multi-piece pre-assembled raft foundation and construction method thereof
    Publication number: 20230265635
    Abstract: A multi-piece pre-assembled raft foundation is provided and includes pre-assemble bottom layer rebars of foundation slab, foundation steel columns, upper layer rebars of the foundation slab, and foundation rebars. The pre-assembled raft foundation is transported to a construction site for final assembly. A construction method of the multi-piece pre-assembled raft foundation is also provided.
    Type: Application
    Filed: February 17, 2023
    Publication date: August 24, 2023
    Inventors: Fu-Yuan Lu, Ju-Chuan Ko, Ying-Ying Lu, Chien-Hui Lu, Cheng-Yu Lee, Mei-Hua Chien, Guang-Le Su, Sen Taner
  • Caption service system for remote speech recognition
    Patent number: 11735185
    Abstract: The present invention provides a caption service system for remote speech recognition, which provides caption service for the hearing impaired. This system includes a speaker and a live broadcast equipment at A, a listener-typist and a computer at B, a hearing impaired and a live screen at C, and an automatic speech recognition (ASR) caption server at D. Connect the live broadcast equipment, the computer, the live screen and the ASR caption server with a network. The speaker's audio is sent to the automatic speech recognition (ASR) caption server to be converted into text, which is corrected by the listener-typist, and then the text caption is sent to the live screen of the hearing impaired together with the speaker's video and audio, so that the hearing impaired can see the text caption spoken by the speaker.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: August 22, 2023
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Sin Horng Chen, Yuan Fu Liao, Yih Ru Wang, Shaw Hwa Hwang, Bing Chih Yao, Cheng Yu Yeh, You Shuo Chen, Yao Hsing Chung, Yen Chun Huang, Chi Jung Huang, Li Te Shen, Ning Yun Ku
  • SEMICONDUCTOR DEVICE AND METHOD AND SYSTEM OF ARRANGING PATTERNS OF THE SAME
    Publication number: 20230259686
    Abstract: A semiconductor device, method, and system of arranging patterns of the same are provided. The method includes generating a plurality of gate patterns and conductive patterns, wherein each of the plurality of gate patterns and conductive patterns is located at a first horizontal level and extends along a first direction. The method also includes selecting one of the gate patterns as an input pin or one of the conductive patterns as an output pin. The method further includes generating, based on a selected gate pattern or a selected conductive pattern, a plurality of metallization patterns. Each of the plurality of metallization patterns is located at a second horizontal level overlying the first horizontal level and extends along a second direction substantially perpendicular to the first direction.
    Type: Application
    Filed: February 17, 2022
    Publication date: August 17, 2023
    Inventors: ANURAG VERMA, MENG-KAI HSU, JOHNNY CHIAHAO LI, SHENG-HSIUNG CHEN, CHENG-YU LIN, HUI-ZHONG ZHUANG, JERRY CHANG JUI KAO
  • Eccentric Heat Dissipation For Fin Cold Plate
    Publication number: 20230262926
    Abstract: A cooling system for a heat-generating electronic device includes a cold plate module, a flow channel, and a fin arrangement. The cold plate module includes a base plate and a top cover. The flow channel is for a liquid coolant and extends between an inlet connector and an outlet connector. The liquid coolant flows along a flow direction. The fin arrangement is located between the base plate and the top cover. The fin arrangement is thermally coupled to the flow channel and is eccentrically located relative to the cold plate module.
    Type: Application
    Filed: April 25, 2022
    Publication date: August 17, 2023
    Inventors: Chao-Jung CHEN, Yu-Nien HUANG, Cheng-Yu WEN, Hung-Yuan CHEN
  • IMAGE SENSOR WITH IMPROVED NEAR-INFRARED (NIR) RADIATION PHASE-DETECTION AUTOFOCUS (PDAF) PERFORMANCE
    Publication number: 20230261011
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first photodetector disposed in a first pixel region of a semiconductor substrate and a second photodetector disposed in a second pixel region of the semiconductor substrate. The second photodetector is laterally separated from the first photodetector. A first diffuser is disposed along a back-side of the semiconductor substrate and over the first photodetector. A second diffuser is disposed along the back-side of the semiconductor substrate and over the second photodetector. A first midline of the first pixel region and a second midline of the second pixel region are both disposed laterally between the first diffuser and the second diffuser.
    Type: Application
    Filed: April 24, 2023
    Publication date: August 17, 2023
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Kazuaki Hashimoto, Wei-Chieh Chiang, Cheng Yu Huang, Wen-Hau Wu, Chih-Kung Chang
  • System and method for increasing power supply peak power capacity
    Patent number: 11726536
    Abstract: A method for increasing power supply voltage in an information handling system in a normal mode with a first peak voltage comprises, in response to receiving a request for a higher peak voltage, an embedded controller (EC) receiving information associated with the application including a request for power at a higher peak voltage, a housekeeping IC communicating a signal to a PWM IC to increase voltage supplied to the information handling system to the higher peak voltage, the PWM IC converting from the PSU to the higher peak voltage and starting a timer with a defined time period. If no additional requests for operating at the higher peak voltage are received before the time period expires, the PWM IC communicates a signal that power will stop being supplied at the higher peak voltage, and the information handling system returns to operating in the normal mode at the first peak voltage.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: August 15, 2023
    Assignee: Dell Products L.P.
    Inventors: Wu Chi Che, Wei-Cheng Yu, Edward Douglas Knapton, Tsung-Cheng Liao, Yung-Chang Chang, Ya-Tang Hsieh
  • Semiconductor device and manufacturing method thereof
    Patent number: 11721694
    Abstract: A semiconductor device including fin field-effect transistors, includes a first gate structure extending in a first direction, a second gate structure extending the first direction and aligned with the first gate structure in the first direction, a third gate structure extending in the first direction and arranged in parallel with the first gate structure in a second direction crossing the first direction, a fourth gate structure extending the first direction, aligned with the third gate structure and arranged in parallel with the second gate structure, an interlayer dielectric layer disposed between the first to fourth gate electrodes, and a separation wall made of different material than the interlayer dielectric layer and disposed between the first and third gate structures and the second and fourth gate structures.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: August 8, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Chen Ho, Hung Chih Hu, Hung Cheng Yu, Ju Ru Hsieh
  • Indoor positioning system
    Patent number: 11721194
    Abstract: An indoor positioning system, for detecting a position of a target object located in a containing body, includes a tracking label, a plurality of positioning label groups, and a scanning device. The tracking label is disposed on the target object. Each positioning label groups is disposed on the containing body and has a plurality of label units. Each label unit defines a positioning interface, which forms a plurality of areas of the containing body. The scanning device senses and reads the tracking label and each label unit of each positioning label group. The scanning device obtains the positioning interface in which the tracking label is located through an analysis computation according to a signal relationship between the tracking label and each label unit, thereby identifying the positioning interface to obtain one of the areas of the target object in the containing body.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: August 8, 2023
    Assignee: NATIONAL CHIN-YI UNIVERSITY OF TECHNOLOGY
    Inventors: Cheng-Yu Peng, Dwen-Chen Wu
  • DIFFUSING PLATE, ETCHING EQUIPMENT AND HOLE CONFIGURING METHOD FOR DIFFUSING PLATE
    Publication number: 20230245860
    Abstract: A diffusing plate includes a plate body including a rectangular hole-configuring region, a plurality of holes arranged in the rectangular hole-configuring region and arranged concentrically to form a first to an N-th rectangular patterns from an inside to an outside sequentially. Scales of the first to the N-th rectangular patterns are incrementally increased, and N is a positive integer. One portion of the holes are located in an area near a center of the rectangular hole-configuring region, another portion of the holes are located in four corner areas of the rectangular hole-configuring region, each of the holes has a diameter, and the diameter of the one portion of the holes is smaller than the diameter of the another portion of the holes.
    Type: Application
    Filed: April 12, 2023
    Publication date: August 3, 2023
    Inventors: Yi-Yuan HUANG, Cheng-Yu TSAO, Cheng-Sheng LIN, Tsung-Wei CHANG, Yi-Cheng LIU
  • Integrated circuit device and method
    Patent number: 11715733
    Abstract: An integrated circuit (IC) device includes a substrate, and a cell over the substrate. The cell includes at least one active region and at least one gate region extending across the at least one active region. The cell further includes at least one input/output (IO) pattern configured to electrically couple one or more of the at least one active region and the at least one gate region to external circuitry outside the cell. The at least one IO pattern extends obliquely to both the at least one active region and the at least one gate region.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: August 1, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Ren Chen, Cheng-Yu Lin, Hui-Zhong Zhuang, Yung-Chen Chien, Jerry Chang Jui Kao, Huang-Yu Chen, Chung-Hsing Wang
  • POLYMER, ELECTROLYTE AND BATTERY
    Publication number: 20230238576
    Abstract: A polymer, which is a composition of a battery, is polymerized by a polymeric precursor, and the polymeric precursor includes at least two or at least three monomers. Each of the monomers is a lactone, a lactone cyclic ester or a carbonate ester. The polymer includes a polyester, and the polyester is a straight chain.
    Type: Application
    Filed: January 18, 2023
    Publication date: July 27, 2023
    Inventors: Wei-Yuan CHEN, Po-Tsun CHEN, Rih-Sian CHEN, Yi-Rou LU, Cheng-Yu TSAI, Chun-Hung TENG
  • HIGH PERFORMANCE SINGLE BARREL POWER CONNECTION
    Publication number: 20230238750
    Abstract: A high-performance single barrel power connector for receiving electric power may be capable of receiving more than 330 W up to approximately 600 W of power. The V+ pin and V? pin may each be configured with a large plurality of contact points for connecting to a power plug. A connector body retaining the V+ pin and V? pin may configured with openings to expose more of the V+ pin and V? pin to air and allow the V+ pin and V? pin to extend out of the power connector for convective and conductive heat transfer. A shell having a high thermal conductivity may be connected to the V? pin and V? pin and further connected to a bracket for increased heat transfer away from the V+ and V? pins.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 27, 2023
    Inventors: Andrew Thomas Sultenfuss, Tsung-Cheng Liao, Wei-Cheng Yu, Chi-Che Wu
  • IMAGING OPTICAL SYSTEM LENS ASSEMBLY, IMAGING APPARATUS AND ELECTRONIC DEVICE
    Publication number: 20230228973
    Abstract: An imaging optical system lens assembly includes six lens elements, which is, in order from an object side to an image side along an optical path, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. The first lens element has negative refractive power, the object-side surface of the first lens element is concave in a paraxial region thereof, the image-side surface of the first lens element is convex in a paraxial region thereof. The second lens element has positive refractive power, the object-side surface of the second lens element is convex in a paraxial region thereof, the image-side surface of the second lens element is concave in a paraxial region thereof. The fifth lens element has positive refractive power.
    Type: Application
    Filed: December 2, 2022
    Publication date: July 20, 2023
    Inventors: Kuan-Ting YEH, Meng-Kuan CHO, Cheng-Yu TSAI
  • Interconnect for fuel cell stack
    Patent number: 11705557
    Abstract: Various embodiments include fuel cell interconnects having a fuel distribution portion having an inlet opening, a fuel collection portion having an outlet opening, and a primary fuel flow field containing channels, wherein the fuel distribution portion comprises at least one raised feature defining a fuel distribution flow path, and the fuel distribution flow path is not continuous with the channels in the primary fuel flow field. The at least one raised feature may include, for example, a network of ribs and/or dots. Further embodiments include interconnects having a fuel distribution portion with a variable surface depth to provide variable flow restriction and/or a plenum with variable surface depth and raised a raised relief feature on the cathode side, and/or varying flow channel depths and/or rib heights adjacent a fuel hole.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: July 18, 2023
    Assignee: BLOOM ENERGY CORPORATION
    Inventors: Daniel Darga, Cheng-Yu Lin, Vijay Srivatsan
  • METHOD FOR GENERATING ROUTING STRUCTURE OF SEMICONDUCTOR DEVICE
    Publication number: 20230222278
    Abstract: The present disclosure provides a method and an apparatus for generating a layout of a semiconductor device. The method includes placing a first cell and a second cell adjacent to the first cell, placing a first conductive pattern in a first track of the first cell extending in a first direction, wherein the first conductive pattern is configured as an input terminal or an output terminal of the first cell, placing a second conductive pattern in a first track of the second cell extending in the first direction, wherein the second conductive pattern is configured as an input terminal or an output terminal of the second cell, and aligning the first conductive pattern with the second conductive pattern.
    Type: Application
    Filed: January 12, 2022
    Publication date: July 13, 2023
    Inventors: ANURAG VERMA, CHI-CHUN LIANG, MENG-KAI HSU, CHENG-YU LIN, POCHUN WANG, HUI-ZHONG ZHUANG
  • Method for establishing three-dimensional medical imaging model
    Patent number: 11699231
    Abstract: A method for establishing a 3D medical imaging model of a subject is to be implemented by an X-ray computed tomography (CT) scanner and a processor. The method includes: emitting X-rays on the subject sequentially from plural angles with respect to the subject to obtain M number of X-ray images of the subject in sequence; obtaining, for each pair of consecutive X-ray images, K number of intermediate image(s) by using the pair of consecutive X-ray images as inputs to a convolutional neural network (CNN) model that has been trained for frame interpolation; and establishing the 3D medical imaging model by using a 3D reconstruction technique based on the M number of X-ray images and the intermediate images obtained for the M number of X-ray images.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: July 11, 2023
    Assignee: CHANG GUNG MEMORIAL HOSPITAL, LINKOU
    Inventors: Tiing-Yee Siow, Cheng-Hong Toh, Cheng-Yu Ma, Chang-Fu Kuo
  • 3D AND FLASH MEMORY DEVICE
    Publication number: 20230217655
    Abstract: A three-dimensional AND flash memory device includes a gate stack structure and a silt. The silt extends along a first direction and divides the gate stack structure into a plurality of sub-blocks. Each sub-block includes a plurality of rows, and each row includes a plurality of channel pillars, a plurality of charge storage structures, and a plurality of pairs of conductive pillars. The plurality of pairs of conductive pillars are arranged in the plurality of channel pillars and penetrate the gate stack structure, and are respectively connected to the plurality of channel pillars. Each pair of conductive pillars includes a first conductive pillar and a second conductive pillar separated from each other along a second direction. There is an acute angle between the second direction and the first direction.
    Type: Application
    Filed: January 6, 2022
    Publication date: July 6, 2023
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Cheng-Yu Lee, Teng-Hao Yeh
  • PRODUCTION OF EXOSOMES AND USES THEREOF
    Publication number: 20230211009
    Abstract: A method for producing exosomes in a large-scale by using a cyclic tensile bioreactor to stimulate cells to release exosomes. In addition, the exosome having an anti-HLA-G protein specific for cancer is used as a delivery vehicle to deliver therapeutic agents for treating cancer.
    Type: Application
    Filed: December 2, 2022
    Publication date: July 6, 2023
    Applicants: CHINA MEDICAL UNIVERSITY, China Medical University Hospital, Shine-On Biomedical Co., Ltd.
    Inventors: Yi-Wen Chen, Der-Yang Cho, Hsin-Yuan Fang, Ming-You Shie, Chih-Ming Pan, Kai-Wen Kan, Cheng-Yu Chen, Min-Hua Yu, Shao-Chih Chiu