Patents by Inventor Chia-Ta Hsieh

Chia-Ta Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10964050
    Abstract: A method for identifying a foreground object in an image and an electronic device are provided. The method includes: dividing a first image and a second image to obtain first image blocks in the first image and second image blocks in the second image; comparing the first image blocks with the second image blocks to obtain a plurality of disparity values respectively corresponding to the first image blocks, and generating a disparity image including the disparity values; comparing each disparity value in the disparity image with a first threshold to form a disparity depth image, and selecting a selected block from the disparity depth image to form a first region; and mapping the first region into the first image to identify a mapped object and identify the object as a foreground object.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: March 30, 2021
    Assignee: Wistron Corporation
    Inventors: Chia-Ta Hsieh, Yu-Yen Chen
  • Patent number: 10884506
    Abstract: A gesture recognition method and a gesture recognition device are provided. The gesture recognition method includes the steps of: obtaining a hand image including a gesture graphic; determining a reference point in the gesture graphic; determining circular arc reference lines by using the reference point as a center; determining intersection points of each of the circular arc reference lines intersecting with a boundary of the gesture graphic; determining whether at least two finger blocks of a plurality of finger blocks of the gesture graphic conform to an approaching trend according to the circular arc reference lines and the intersection points, and determining whether the at least two finger blocks in a selected range of the gesture graphic forms a continuous graphic block; and when the at least two finger blocks of the gesture graphic conform to the approaching trend and form the continuous graphic block, determining the hand image as a hand pinch image.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: January 5, 2021
    Assignee: Wistron Corporation
    Inventors: Chia-Ta Hsieh, Ting-Feng Ju
  • Patent number: 10810417
    Abstract: A gesture recognition method includes performing a binarization process on an image to obtain a binarized image, wherein the binarized image includes a plurality of foreground pixels and a plurality of background pixels; determining whether the plurality of foreground pixels surrounds at least a first background pixel; and determining a gesture complying with a predefined gesture in response to determination that the plurality of foreground pixels surrounds the at least a first background pixel.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: October 20, 2020
    Assignee: Wistron Corporation
    Inventors: Chia-Ta Hsieh, Ting-Feng Ju, Kuo-Hsien Lu, Chih-Hao Chiu
  • Publication number: 20200285320
    Abstract: A gesture recognition method and a gesture recognition device are provided. The gesture recognition method includes the steps of: obtaining a hand image including a gesture graphic; determining a reference point in the gesture graphic; determining circular arc reference lines by using the reference point as a center; determining intersection points of each of the circular arc reference lines intersecting with a boundary of the gesture graphic; determining whether at least two finger blocks of a plurality of finger blocks of the gesture graphic conform to an approaching trend according to the circular arc reference lines and the intersection points, and determining whether the at least two finger blocks in a selected range of the gesture graphic forms a continuous graphic block; and when the at least two finger blocks of the gesture graphic conform to the approaching trend and form the continuous graphic block, determining the hand image as a hand pinch image.
    Type: Application
    Filed: May 6, 2019
    Publication date: September 10, 2020
    Applicant: Wistron Corporation
    Inventors: Chia-Ta Hsieh, Ting-Feng Ju
  • Publication number: 20200227425
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip having a flash gate structure disposed over a substrate and including a control gate separated from a floating gate by an inter-electrode dielectric. One or more first sidewall spacers laterally surround the flash gate structure. The inter-electrode dielectric is directly between the one or more first sidewall spacers. A logic gate structure is disposed over the substrate and is laterally surrounded by one or more second sidewall spacers having a smaller height than the one or more first sidewall spacers.
    Type: Application
    Filed: March 25, 2020
    Publication date: July 16, 2020
    Inventors: Josh Lin, Chia-Ta Hsieh, Chen-Ming Huang, Chi-Wei Ho
  • Publication number: 20200184673
    Abstract: A method for identifying a foreground object in an image and an electronic device are provided. The method includes: dividing a first image and a second image to obtain first image blocks in the first image and second image blocks in the second image; comparing the first image blocks with the second image blocks to obtain a plurality of disparity values respectively corresponding to the first image blocks, and generating a disparity image including the disparity values; comparing each disparity value in the disparity image with a first threshold to form a disparity depth image, and selecting a selected block from the disparity depth image to form a first region; and mapping the first region into the first image to identify a mapped object and identify the object as a foreground object.
    Type: Application
    Filed: March 7, 2019
    Publication date: June 11, 2020
    Applicant: Wistron Corporation
    Inventors: Chia-Ta Hsieh, Yu-Yen Chen
  • Patent number: 10629605
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first gate disposed over a substrate and having a first height measured between an upper surface of the substrate and a first uppermost surface of the first gate structure. A second gate structure is disposed over the substrate and has a second height measured between the upper surface of the substrate and a second uppermost surface of the second gate structure. The second height is smaller than the first height. A first sidewall spacer laterally surrounds the first gate structure and is recessed below the first uppermost surface. A second sidewall spacer laterally surrounds the second gate structure. A top of the first sidewall spacer is arranged along a horizontal plane that is vertically between the first uppermost surface and the second uppermost surface.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: April 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Josh Lin, Chia-Ta Hsieh, Chen-Ming Huang, Chi-Wei Ho
  • Publication number: 20200050841
    Abstract: A gesture recognition method includes performing a binarization process on an image to obtain a binarized image, wherein the binarized image includes a plurality of foreground pixels and a plurality of background pixels; determining whether the plurality of foreground pixels surrounds at least a first background pixel; and determining a gesture complying with a predefined gesture in response to determination that the plurality of foreground pixels surrounds the at least a first background pixel.
    Type: Application
    Filed: January 29, 2019
    Publication date: February 13, 2020
    Inventors: Chia-Ta Hsieh, Ting-Feng Ju, Kuo-Hsien Lu, Chih-Hao Chiu
  • Patent number: 10488989
    Abstract: A touch input system includes a touch surface, a reflective structure, and a touch-position generating device. The reflective structure is disposed to surround the touch surface and protrude out the touch surface. The touch-position generating device includes a pen-like body, a lighting and receiving module disposed in the pen-like body, and a processing module. The lighting and receiving module and the processing module are connected in communication. When the touch input system is in operation, the lighting and receiving module emits light toward the reflective structure and receives the light that is reflected by the reflective structure relative to the touch surface. Then, the processing module determines a touch position of the pen-like body on the touch surface according to the received light. Thereby, the touch-position generating device can perform the determination of the touch position independently from the operation of a touch panel or device providing the touch surface.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: November 26, 2019
    Assignee: Wistron Corporation
    Inventors: Chia-Ta Hsieh, Yu-Yen Chen
  • Patent number: 10360943
    Abstract: A video editing method, a video editing device, and a video editing system are provided. A target is obtained from an original video. Relative position relations respectively between each frame and a previous frame and a next frame adjacent to it are obtained based on multiple image feature points of each frame. An adjustment process is executed respectively for each frame. The adjustment process includes: obtaining a frame N; identifying the target in the frame N; adjusting the frame N to obtain a new frame, wherein the target is located on a center of the new frame; and modifying the new frame based on the relative position relations to obtain a postproduction frame. A processed video is outputted based on multiple postproduction frames.
    Type: Grant
    Filed: November 24, 2017
    Date of Patent: July 23, 2019
    Assignee: Wistron Corporation
    Inventors: Chia-Ta Hsieh, Ching-An Cho, Zhen-Te Liu
  • Patent number: 10263004
    Abstract: The present disclosure relates to a method of forming sidewall spacers configured to improve dielectric fill between adjacent gate structures. In some embodiments, the method may be performed by depositing a sidewall spacer material over a first gate structure and a second gate structure. A first etching process is performed on the sidewall spacer material to form a first intermediate sidewall spacer surrounding the first gate structure and a second sidewall spacer surrounding the second gate structure. A masking material is formed over the substrate. Parts of the first intermediate sidewall spacer protrude outward from the masking material, while the second sidewall spacer is completely covered by the masking material. A second etching process is then performed on the parts of the first intermediate sidewall spacer protruding outward from the masking material to form a first sidewall spacer recessed below an uppermost surface of the first gate structure.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: April 16, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Josh Lin, Chia-Ta Hsieh, Chen-Ming Huang, Chi-Wei Ho
  • Publication number: 20190109146
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first gate disposed over a substrate and having a first height measured between an upper surface of the substrate and a first uppermost surface of the first gate structure. A second gate structure is disposed over the substrate and has a second height measured between the upper surface of the substrate and a second uppermost surface of the second gate structure. The second height is smaller than the first height. A first sidewall spacer laterally surrounds the first gate structure and is recessed below the first uppermost surface. A second sidewall spacer laterally surrounds the second gate structure. A top of the first sidewall spacer is arranged along a horizontal plane that is vertically between the first uppermost surface and the second uppermost surface.
    Type: Application
    Filed: November 28, 2018
    Publication date: April 11, 2019
    Inventors: Josh Lin, Chia-Ta Hsieh, Chen-Ming Huang, Chi-Wei Ho
  • Publication number: 20190080718
    Abstract: A video editing method, a video editing device, and a video editing system are provided. A target is obtained from an original video. Relative position relations respectively between each frame and a previous frame and a next frame adjacent to it are obtained based on multiple image feature points of each frame. An adjustment process is executed respectively for each frame. The adjustment process includes: obtaining a frame N; identifying the target in the frame N; adjusting the frame N to obtain a new frame, wherein the target is located on a center of the new frame; and modifying the new frame based on the relative position relations to obtain a postproduction frame. A processed video is outputted based on multiple postproduction frames.
    Type: Application
    Filed: November 24, 2017
    Publication date: March 14, 2019
    Applicant: Wistron Corporation
    Inventors: Chia-Ta Hsieh, Ching-An Cho, Zhen-Te Liu
  • Publication number: 20190043870
    Abstract: The present disclosure relates to a method of forming sidewall spacers configured to improve dielectric fill between adjacent gate structures. In some embodiments, the method may be performed by depositing a sidewall spacer material over a first gate structure and a second gate structure. A first etching process is performed on the sidewall spacer material to form a first intermediate sidewall spacer surrounding the first gate structure and a second sidewall spacer surrounding the second gate structure. A masking material is formed over the substrate. Parts of the first intermediate sidewall spacer protrude outward from the masking material, while the second sidewall spacer is completely covered by the masking material. A second etching process is then performed on the parts of the first intermediate sidewall spacer protruding outward from the masking material to form a first sidewall spacer recessed below an uppermost surface of the first gate structure.
    Type: Application
    Filed: September 1, 2017
    Publication date: February 7, 2019
    Inventors: Josh Lin, Chia-Ta Hsieh, Chen-Ming Huang, Chi-Wei Ho
  • Patent number: 10073561
    Abstract: A touch apparatus and a correction method thereof are provided. Whether to divide a correction block is determined by calculating distortion error quantity of the correction block, so as to make the distortion error quantity of each divided correction block is less than or equal to a preset threshold. A correction parameter set of each correction block is obtained. Accordingly, in an operation procedure, correction for a touch behavior of a user is executed based on the correction parameter set.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: September 11, 2018
    Assignee: Wistron Corporation
    Inventors: Wei-Kuo Kan, Kuo-Ting Huang, Yu-Yen Chen, Chia-Ta Hsieh
  • Patent number: 10061440
    Abstract: An optical touch sensing system, an optical touch sensing device, and a touch detection method thereof are provided. The optical touch sensing system includes an optical touch sensing device and a stylus. The optical touch sensing device includes a touch panel, multiple optical sensors, a first light source, and a processor. The touch panel has a touch surface. The first light source generates a first light periodically. The stylus includes a switch module and a second light source. The switch module enables the second light source to generate a second light when the stylus touches the touch surface. The processor determines a position touched by the stylus according to the first light and the second light received by the optical sensors.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: August 28, 2018
    Assignee: Wistron Corporation
    Inventors: Chia-Ta Hsieh, Yu-Yen Chen
  • Patent number: 9947678
    Abstract: A flash memory device is disposed on a semiconductor substrate. The flash memory device includes flash memory cells arranged in rows and columns. Respective flash memory cells include respective access transistors and respective floating gate transistors. The respective access transistors have respective access gates, and the respective floating gate transistors have respective control gates arranged over respective floating gates. First and second wordlines extend substantially in parallel with one another and correspond to first and second rows which neighbor one another. The first wordline is coupled to access gates of access transistors along the first row. The second wordline is coupled to access gates of access transistors along the second row. Nearest edges of the first and second wordlines include at least one wing which extends laterally outward from a sidewall of one of the first and second wordlines towards a sidewall the other of the first and second wordlines.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: April 17, 2018
    Assignee: Taiwan Semiductor Manufacturing Co., Ltd.
    Inventors: Chia-Ta Hsieh, Chi-Wei Ho, Kao-Chao Lin, Josh Lin, Nai-Chao Su, Shih-Jung Tu, Po-Kai Hsu, Shih-Ching Lee, Chen-Ming Huang
  • Publication number: 20170212639
    Abstract: An optical touch sensing system, an optical touch sensing device, and a touch detection method thereof are provided. The optical touch sensing system includes an optical touch sensing device and a stylus. The optical touch sensing device includes a touch panel, multiple optical sensors, a first light source, and a processor. The touch panel has a touch surface. The first light source generates a first light periodically. The stylus includes a switch module and a second light source. The switch module enables the second light source to generate a second light when the stylus touches the touch surface. The processor determines a position touched by the stylus according to the first light and the second light received by the optical sensors.
    Type: Application
    Filed: March 29, 2016
    Publication date: July 27, 2017
    Inventors: Chia-Ta Hsieh, Yu-Yen Chen
  • Patent number: 9646980
    Abstract: A method includes forming a first pad oxide layer and a second pad oxide layer over a first active region and a second active region, respectively, of a semiconductor substrate, forming a dielectric protection layer overlapping the first pad oxide layer, removing the second pad oxide layer, and forming a floating gate dielectric over the second active region. A floating gate layer is then formed to include a first portion over the dielectric protection layer, and a second portion over the floating gate dielectric. A planarization is performed on the first portion and the second portion of the floating gate layer. A blocking layer, a control gate layer, and a hard mask layer are formed over the second portion of the floating gate layer. The hard mask layer, the control gate layer, and the blocking layer are patterned to form a gate stack for a flash memory cell.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: May 9, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Ta Hsieh, Po-Wei Liu, Yong-Shiuan Tsair, Chieh-Fei Chiu
  • Publication number: 20160358930
    Abstract: A flash memory device is disposed on a semiconductor substrate. The flash memory device includes flash memory cells arranged in rows and columns. Respective flash memory cells include respective access transistors and respective floating gate transistors. The respective access transistors have respective access gates, and the respective floating gate transistors have respective control gates arranged over respective floating gates. First and second wordlines extend substantially in parallel with one another and correspond to first and second rows which neighbor one another. The first wordline is coupled to access gates of access transistors along the first row. The second wordline is coupled to access gates of access transistors along the second row. Nearest edges of the first and second wordlines include at least one wing which extends laterally outward from a sidewall of one of the first and second wordlines towards a sidewall the other of the first and second wordlines.
    Type: Application
    Filed: August 16, 2016
    Publication date: December 8, 2016
    Inventors: Chia-Ta Hsieh, Chi-Wei Ho, Kao-Chao Lin, Josh Lin, Nai-Chao Su, Shih-Jung Tu, Po-Kai Hsu, Shih-Ching Lee, Chen-Ming Huang