Abstract: A flash memory device is disposed on a semiconductor substrate. The flash memory device includes flash memory cells arranged in rows and columns. Respective flash memory cells include respective access transistors and respective floating gate transistors. The respective access transistors have respective access gates, and the respective floating gate transistors have respective control gates arranged over respective floating gates. First and second wordlines extend substantially in parallel with one another and correspond to first and second rows which neighbor one another. The first wordline is coupled to access gates of access transistors along the first row. The second wordline is coupled to access gates of access transistors along the second row. Nearest edges of the first and second wordlines include at least one wing which extends laterally outward from a sidewall of one of the first and second wordlines towards a sidewall the other of the first and second wordlines.

Abstract: A method includes forming a first pad oxide layer and a second pad oxide layer over a first active region and a second active region, respectively, of a semiconductor substrate, forming a dielectric protection layer overlapping the first pad oxide layer, removing the second pad oxide layer, and forming a floating gate dielectric over the second active region. A floating gate layer is then formed to include a first portion over the dielectric protection layer, and a second portion over the floating gate dielectric. A planarization is performed on the first portion and the second portion of the floating gate layer. A blocking layer, a control gate layer, and a hard mask layer are formed over the second portion of the floating gate layer. The hard mask layer, the control gate layer, and the blocking layer are patterned to form a gate stack for a flash memory cell.

Abstract: An optical touch apparatus and an optical touch method are disclosed. The optical touch apparatus comprises a touch panel, a first optical sensor, a second optical sensor and a processor. The first optical sensor senses a light pen to output a first sensing signal. The second optical sensor senses the light pen to output a second sensing signal. The processor decides a threshold value according to the second sensing signal, and determines whether the first sensing signal is greater than the threshold value. The processor determines that the light pen touches the touch panel if the first sensing signal is greater than the threshold value.

Abstract: A touch apparatus and a correction method thereof are provided. Whether to divide a correction block is determined by calculating distortion error quantity of the correction block, so as to make the distortion error quantity of each divided correction block is less than or equal to a preset threshold. A correction parameter set of each correction block is obtained. Accordingly, in an operation procedure, correction for a touch behavior of a user is executed based on the correction parameter set.

Abstract: A flash memory device is disposed on a semiconductor substrate. The flash memory device includes flash memory cells arranged in rows and columns. Respective flash memory cells include respective access transistors and respective floating gate transistors. The respective access transistors have respective access gates, and the respective floating gate transistors have respective control gates arranged over respective floating gates. First and second wordlines extend substantially in parallel with one another and correspond to first and second rows which neighbor one another. The first wordline is coupled to access gates of access transistors along the first row. The second wordline is coupled to access gates of access transistors along the second row. Nearest edges of the first and second wordlines include at least one wing which extends laterally outward from a sidewall of one of the first and second wordlines towards a sidewall the other of the first and second wordlines.

Abstract: An optical touch system includes a touch screen; a plurality of light sources for periodically emitting light; a light-emitting element for periodically emitting light when the plurality of light sources are not emitting light; a light-reflecting element, for reflecting light emitted by the plurality of light sources; a plurality of lenses, for capturing a first image during a period when the plurality of light sources are emitting light and capturing a second image during a period when the plurality of light sources are not emitting light; and a processing unit. The processing unit includes a control unit for controlling the plurality of light sources and the light-emitting element; and a computation unit for computing a first location in which the light-emitting element is located and a second location in which the light-reflecting element is located on the touch screen according to the first image and the second image.

Abstract: A method includes forming a first pad oxide layer and a second pad oxide layer over a first active region and a second active region, respectively, of a semiconductor substrate, forming a dielectric protection layer overlapping the first pad oxide layer, removing the second pad oxide layer, and forming a floating gate dielectric over the second active region. A floating gate layer is then formed to include a first portion over the dielectric protection layer, and a second portion over the floating gate dielectric. A planarization is performed on the first portion and the second portion of the floating gate layer. A blocking layer, a control gate layer, and a hard mask layer are formed over the second portion of the floating gate layer. The hard mask layer, the control gate layer, and the blocking layer are patterned to form a gate stack for a flash memory cell.

Abstract: A touch input system includes a touch surface, a reflective structure, and a touch-position generating device. The reflective structure is disposed to surround the touch surface and protrude out the touch surface. The touch-position generating device includes a pen-like body, a lighting and receiving module disposed in the pen-like body, and a processing module. The lighting and receiving module and the processing module are connected in communication. When the touch input system is in operation, the lighting and receiving module emits light toward the reflective structure and receives the light that is reflected by the reflective structure relative to the touch surface. Then, the processing module determines a touch position of the pen-like body on the touch surface according to the received light. Thereby, the touch-position generating device can perform the determination of the touch position independently from the operation of a touch panel or device providing the touch surface.

Abstract: An optical touch system includes a touch screen; a plurality of light sources for periodically emitting light; a light-emitting element for periodically emitting light when the plurality of light sources are not emitting light; a light-reflecting element, for reflecting light emitted by the plurality of light sources; a plurality of lenses, for capturing a first image during a period when the plurality of light sources are emitting light and capturing a second image during a period when the plurality of light sources are not emitting light; and a processing unit. The processing unit includes a control unit for controlling the plurality of light sources and the light-emitting element; and a computation unit for computing a first location in which the light-emitting element is located and a second location in which the light-reflecting element is located on the touch screen according to the first image and the second image.

Abstract: An optical touch apparatus and an optical touch method are disclosed. The optical touch apparatus comprises a touch panel, a first optical sensor, a second optical sensor and a processor. The first optical sensor senses a light pen to output a first sensing signal. The second optical sensor senses the light pen to output a second sensing signal. The processor decides a threshold value according to the second sensing signal, and determines whether the first sensing signal is greater than the threshold value. The processor determines that the light pen touches the touch panel if the first sensing signal is greater than the threshold value.

Abstract: A frame with a sensing function includes a frame structure, a sensor and a processing unit. The processing unit is electrically connected to the sensor. The frame structure is configured for hanging on a display unit. The sensor senses a touched position set of the display unit for position setting. The processing unit includes a parameter calculating module and a parameter providing module. The parameter calculating module calculates a position transformation parameter between the hanged frame structure and the display unit according to the touched position set. The parameter providing module provides the position transformation parameter, such that a display content displayed on the display unit is controlled according to at least one touched position for operation sensed by the sensor and the position transformation parameter.

Abstract: A method includes forming a first pad oxide layer and a second pad oxide layer over a first active region and a second active region, respectively, of a semiconductor substrate, forming a dielectric protection layer overlapping the first pad oxide layer, removing the second pad oxide layer, and forming a floating gate dielectric over the second active region. A floating gate layer is then formed to include a first portion over the dielectric protection layer, and a second portion over the floating gate dielectric. A planarization is performed on the first portion and the second portion of the floating gate layer. A blocking layer, a control gate layer, and a hard mask layer are formed over the second portion of the floating gate layer. The hard mask layer, the control gate layer, and the blocking layer are patterned to form a gate stack for a flash memory cell.

Abstract: A frame with a sensing function includes a frame structure, a sensor and a processing unit. The processing unit is electrically connected to the sensor. The frame structure is configured for hanging on a display unit. The sensor senses a touched position set of the display unit for position setting. The processing unit includes a parameter calculating module and a parameter providing module. The parameter calculating module calculates a position transformation parameter between the hanged frame structure and the display unit according to the touched position set. The parameter providing module provides the position transformation parameter, such that a display content displayed on the display unit is controlled according to at least one touched position for operation sensed by the sensor and the position transformation parameter.

Abstract: A new structure is disclosed for source/drain bit lines in arrays of MOSFET devices. Rows of conducting regions are formed by ion implantation through openings adjacent to gate structures and in isolation regions separating columns of active areas of the arrays. The openings are filled with insulating material.

Abstract: A method of performing a reading operation to a memory device including a plurality of flash memory cells. The method includes applying a first voltage bias to a control gate of a selected memory cell in the flash memory array and applying a second voltage bias to a word line of the selected memory cell. A control gate of an unselected memory cell in the flash memory array is grounded and a third voltage bias is applied to a word line of the unselected cell to turn off a word line channel of the unselected memory cell. The selected memory cell and unselected memory cell are configured in the memory device and are connected to different word lines. The first voltage bias and the second voltage bias have a same polarity. The third voltage bias and the second voltage bias have opposite polarities.

Abstract: A non-volatile memory device includes a first metal-oxide-semiconductor (CMOS) device coupled to a bit line and a word line and a second CMOS device coupled to the first CMOS device. The second CMOS device is also coupled to a complementary bit line and a complementary word line. The first and second CMOS devices are complementary to one another. An output node is coupled between the first CMOS device and the second CMOS device. A method of programming a non-volatile field programmable gate array (NV-FPGA) includes coupling an information handling system to the FPGA, performing a block erase of a plurality of memory cells in the FPGA, verifying that the block erase is successful, programming an upper page of the FPGA, verifying that the upper page programming is successful, programming a lower page of the FPGA and verifying that the lower page programming is successful.

Abstract: A method of performing a reading operation to a memory device including a plurality of flash memory cells. The method includes applying a first voltage bias to a control gate of a selected memory cell in the flash memory array and applying a second voltage bias to a word line of the selected memory cell. A control gate of an unselected memory cell in the flash memory array is grounded and a third voltage bias is applied to a word line of the unselected cell to turn off a word line channel of the unselected memory cell. The selected memory cell and unselected memory cell are configured in the memory device and are connected to different word lines. The first voltage bias and the second voltage bias have a same polarity. The third voltage bias and the second voltage bias have opposite polarities.

Abstract: A non-volatile memory device includes a first metal-oxide-semiconductor (CMOS) device coupled to a bit line and a word line and a second CMOS device coupled to the first CMOS device. The second CMOS device is also coupled to a complementary bit line and a complementary word line. The first and second CMOS devices are complementary to one another. An output node is coupled between the first CMOS device and the second CMOS device. A method of programming a non-volatile field programmable gate array (NV-FPGA) includes coupling an information handling system to the FPGA, performing a block erase of a plurality of memory cells in the FPGA, verifying that the block erase is successful, programming an upper page of the FPGA, verifying that the upper page programming is successful, programming a lower page of the FPGA and verifying that the lower page programming is successful.

Abstract: A non-volatile memory device includes a first metal-oxide-semiconductor (CMOS) device coupled to a bit line and a word line and a second CMOS device coupled to the first CMOS device. The second CMOS device is also coupled to a complementary bit line and a complementary word line. The first and second CMOS devices are complementary to one another. An output node is coupled between the first CMOS device and the second CMOS device. A method of programming a non-volatile field programmable gate array (NV-FPGA) includes coupling an information handling system to the FPGA, performing a block erase of a plurality of memory cells in the FPGA, verifying that the block erase is successful, programming an upper page of the FPGA, verifying that the upper page programming is successful, programming a lower page of the FPGA and verifying that the lower page programming is successful.

Abstract: The present disclosure provides a method of manufacturing a microelectronic device. The method includes forming recessed shallow trench isolation (STI) features in a semiconductor substrate, defining a semiconductor region between adjacent two of the recessed STI features; forming a tunnel dielectric feature within the semiconductor region; forming a nitride layer on the recessed STI features and the tunnel dielectric feature; etching the nitride layer to form nitride openings within the recessed STI features; partially removing the recessed STI features through the nitride openings, resulting in gaps between the nitride layer and the recessed STI features; and forming a first dielectric material on surfaces of the nitride layer, sealing the nitride openings.