Abstract: A physiological signal sensor to measure life signs includes at least one first and one second Doppler detectors, at least one first amplification filter, at least one second amplification filter, a processor, and a transceiver. Data from the physiological signal sensor is sent to the first and second Doppler detectors to detect first and second physiological signals from different locations on a living body. The two physiological signals are sent to the first and second amplification filters and amplified and filtered, and converted to obtain a first and second digital sensed signal. Digital signal processing is carried out on the digital sensed signals to obtain first and second physiological information which are outputted via the transceiver.

Abstract: An apparatus for buffing a shoe part includes a housing adapted to be articulated around at least a portion of the footwear part. A rotating spindle is positioned in the housing and has a buffing surface for engagement with the footwear part. A carriage is slideably connected to the housing and holds the spindle such that the buffing surface can be moved closer to and further away from the footwear part. An actuator is in the housing and in contact with the carriage. The actuator applies force to the carriage to increase the force of the buffing surface onto the footwear part. A biasing member is in the housing and in contact with the carriage. The biasing member exerts force onto the carriage in a direction opposite the force exerted by the actuator.

Abstract: A thin fan-out multi-chip stacked package structure including a plurality of stacked chips is provided. The electrodes of the stacked chips and the active surface of the top chip are exposed. A dummy spacer and an alignment structure are disposed over the active surface. Each bonding wire has a bonding thread bonded to a chip electrode and an integrally-connected vertical wire segment. A flat encapsulant encapsulates the chip stacked structure and the bonding wires. Polished cross-sectional surfaces of the bonding wires and a surface of the alignment structure are exposed by the flat surface of the encapsulant. A redistribution layer structure is formed on the flat surface. A passivation layer covers the flat surface and exposes the polished cross-sectional surfaces and the alignment structure. Fan-out circuits are formed on the passivation layer and are connected to the polished cross-sectional surfaces of the bonding wires and the alignment structure.

Abstract: A method of fabricating a packaging layer of an fan-out chip package comprising: disposing a chip on a temporary carrier; forming an encapsulation on the temporary carrier to encapsulate the chip; grinding the encapsulation and the chip to form a back surface of the chip and a back surface of the encapsulation; debonding the encapsulation and the chip from the temporary carrier; forming a first passivation layer on the active surface of the chip and the peripheral surface of the encapsulation; patterning the first passivation layer to form fan-in openings and fan-out openings on the first passivation layer; forming a redistribution layer on the first passivation layer; forming a second passivation layer on the first passivation layer and the redistribution wiring layer; forming vertical connectors within the encapsulation to correspondingly couple to the fan-out pads; and disposing a plurality of dummy terminals on the dummy pattern.

Abstract: A thin fan-out multi-chip stacked package structure including a plurality of stacked chips is provided. The electrodes of the stacked chips and the active surface of the top chip are exposed. A dummy spacer and an alignment structure are disposed over the active surface. Each bonding wire has a bonding thread bonded to a chip electrode and an integrally-connected vertical wire segment. A flat encapsulant encapsulates the chip stacked structure and the bonding wires. Polished cross-sectional surfaces of the bonding wires and a surface of the alignment structure are exposed by the flat surface of the encapsulant. A redistribution layer structure is formed on the flat surface. A passivation layer covers the flat surface and exposes the polished cross-sectional surfaces and the alignment structure. Fan-out circuits are formed on the passivation layer and are connected to the polished cross-sectional surfaces of the bonding wires and the alignment structure.

Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.

Abstract: An integrated circuit for driving a display panel is provided. The integrated circuit includes a gamma mapping circuit and a mura compensation circuit. The gamma mapping circuit is configured to receive a gray level of an image data, map the gray level to a gamma code according to at least one gamma table, and output the gamma code. The mura compensation circuit is configured to receive the gamma code, and compensate the gamma code according to at least one de-mura table to generate a compensation result after the gamma mapping circuit performs the step of mapping the gray level to the gamma code. The integrated circuit drives the display panel according to the compensation result. In addition, a method for driving a display panel is also provided.

Abstract: A method of fabricating a packaging layer of an fan-out chip package comprising: disposing a chip on a temporary carrier; forming an encapsulation on the temporary carrier to encapsulate the chip; grinding the encapsulation and the chip to form a back surface of the chip and a back surface of the encapsulation; debonding the encapsulation and the chip from the temporary carrier; forming a first passivation layer on the active surface of the chip and the peripheral surface of the encapsulation; patterning the first passivation layer to form fan-in openings and fan-out openings on the first passivation layer; forming a redistribution layer on the first passivation layer; forming a second passivation layer on the first passivation layer and the redistribution wiring layer; forming vertical connectors within the encapsulation to correspondingly couple to the fan-out pads; and disposing a plurality of dummy terminals on the dummy pattern.

Abstract: An integrated circuit device includes a semiconductor substrate, and a semiconductor strip extending into the semiconductor substrate. A first and a second dielectric region are on opposite sides of, and in contact with, the semiconductor strip. Each of the first dielectric region and the second dielectric region includes a first portion level with the semiconductor strip, and a second portion lower than the semiconductor strip. The second portion further includes a portion overlapped by the semiconductor strip.

Abstract: An electronic device having a removable handle is provided and includes a handle, two connecting elements, and a body. The handle is coupled to the body through the connecting elements to allow a user to change the handle through the connecting elements as needed, thereby rendering the use of the handle highly flexible. Bumps of the connecting elements are disposed at concave portions on the body, respectively. The fastening components fasten the connecting elements to the body. Therefore, the connecting elements are firmly coupled to the body to enhance overall structural stability after assembly and usage safety of using the handle to carry the body.

Abstract: An integrated circuit for driving a display panel is provided. The integrated circuit includes a gamma mapping unit and a mura compensation unit. The gamma mapping unit is configured to receive a gray level of an image data, map the gray level to a gamma code according to at least one gamma table, and output the gamma code. The mura compensation unit is configured to receive the gamma code, and compensate the gamma code according to at least one de-mura table to generate a compensation result after the gamma mapping unit performs the step of mapping the gray level to the gamma code. The integrated circuit drives the display panel according to the compensation result. In addition, a method for driving a display panel is also provided.

Abstract: A fan-out chip package comprises a chip, an encapsulating layer, a first passivation layer, a redistribution wiring layer, a second passivation layer, and a plurality of vertical connectors. The encapsulation encapsulates the sides of the chip. The thickness of the encapsulation is the same as the thickness of the chip. The first passivation layer covers the active surface of the chip and the peripheral surface of the encapsulation. The redistribution layer is formed on the first passivation layer to extend the electrical connection of the chip to the peripheral surface of the encapsulation. The second passivation layer is formed on the first passivation layer. The vertical connectors are embedded in the encapsulation and the redistribution layer. The vertical connectors are only penetrate through the encapsulation protect the redistribution layer from damages.

Abstract: A method of making a semiconductor structure, the method including forming a conductive layer over a substrate. The method further includes forming a first imaging layer over the conductive layer, where the first imaging layer comprises a plurality of layers. The method further includes forming openings in the first imaging layer to expose a first set of areas of the conductive layer. The method further includes implanting ions into each area of the first set of area. The method further includes forming a second imaging layer over the conductive layer. The method further includes forming openings in the second imaging layer to expose a second set of areas of the conductive layer, wherein the second set of areas is different from the first set of areas. The method further includes implanting ions into the each area of the second set of areas.

Abstract: An electronic device having a removable handle is provided and includes a handle, two connecting elements, and a body. The handle is coupled to the body through the connecting elements to allow a user to change the handle through the connecting elements as needed, thereby rendering the use of the handle highly flexible. Bumps of the connecting elements are disposed at concave portions on the body, respectively. The fastening components fasten the connecting elements to the body. Therefore, the connecting elements are firmly coupled to the body to enhance overall structural stability after assembly and usage safety of using the handle to carry the body.