Abstract: A package component is free from active devices therein. The package component includes a substrate, a through-via in the substrate, a top dielectric layer over the substrate, and a metal pillar having a top surface over a top surface of the top dielectric layer. The metal pillar is electrically coupled to the through-via. A diffusion barrier is over the top surface of the metal pillar. A solder cap is disposed over the diffusion barrier.

Abstract: One or more heat pipes are utilized along with a substrate in order to provide heat dissipation through the substrate for heat that can build up at an interface between the substrate and one or more semiconductor chips in a package. In an embodiment the heat pipe may be positioned on a side of the substrate opposite the semiconductor chip and through-substrate vias may be utilized to dissipate heat through the substrate. In an alternative embodiment, the heat pipe may be positioned on a same side of the substrate as the semiconductor chip and may be thermally connected to the one or more semiconductor chips.

Abstract: A package component is free from active devices therein. The package component includes a substrate, a through-via in the substrate, a top dielectric layer over the substrate, and a metal pillar having a top surface over a top surface of the top dielectric layer. The metal pillar is electrically coupled to the through-via. A diffusion barrier is over the top surface of the metal pillar. A solder cap is disposed over the diffusion barrier.

Abstract: Keep out zones (KOZ) are formed for a through silicon via (TSV). A device can be placed outside a first KOZ of a TSV determined by a first performance threshold so that a stress impact caused by the TSV to the device is less than a first performance threshold while the first KOZ contains only those points at which a stress impact caused by the TSV is larger than or equal to the first performance threshold. A second KOZ for the TSV can be similarly formed by a second performance threshold. A plurality of TSVs can be placed in a direction that the KOZ of the TSV has smallest radius to a center of the TSV, which may be in a crystal orientation [010] or [100]. A plurality of TSV stress plug can be formed at the boundary of the overall KOZ of the plurality of TSVs.

Abstract: A plane-parallel optical window is the spacer of single-cavity filters in the stack used for DWDM applications. Highly reflective quarter-wave stacks are deposited on each side of the optical window and the single-cavity structure so obtained is diced to produce a plurality of filters. Each single-cavity filter so fabricated from the optical window has the same transmission wavelength and is therefore readily stackable for DWDM applications. Alternatively, an optical window with a thickness equal to one half that required for the spacer of a single-cavity filter is coated on a single side. The window is then divided in multiple identical components that can be combined in pairs by placing them in optical contact so as to form individual single-cavity filters with the same transmission-peak wavelength. The transmission peak of the filter can be fine tuned by controlling the temperature of the solid spacer material.

Abstract: A method includes forming a first oxide layer on a surface of an integrated heat spreader, and forming a second oxide layer on top surfaces of fins, wherein the fins are parts of a heat sink. The integrated heat spreader is bonded to the heat sink through the bonding of the first oxide layer to the second oxide layer.

Abstract: A method includes attaching a wafer on a carrier through an adhesive, and forming trenches in the carrier to convert the carrier into a heat sink. The heat sink, the carrier, and the adhesive are sawed into a plurality of packages.

Abstract: The present disclosure relates to a method for fast and precise alignment and mounting of a top die onto an interposer wafer. The method is performed by applying a hydrophobic self assembled monolayer to a carrier wafer in a pattern defining a top die placement region correlating to an arrangement of a top die on an interposer wafer. A liquid is provided into the top die placement region and a top die is placed into contact with the liquid. The surface tension of the liquid automatically aligns the top die by generating a force causing the top die to overlap with the top die placement region. The liquid is then eliminated and the top die is affixed to the carrier wafer. The carrier wafer is bonded to the interposer wafer, bringing the top die into contact with an interposer.

Abstract: A semiconductor device and fabrication method thereof are provided, wherein the fabrication method of the semiconductor device includes the following steps. Forming a semiconductor layer on a substrate, wherein the semiconductor layer has a top surface and a bottom surface that is opposite to the top surface. The bottom surface is in contact with the substrate, and the top surface has a plurality of pits, the pits are extended from the top surface toward the bottom surface. Preparing a solution, wherein the solution includes a plurality of nanoparticles. Filling the nanoparticles into the pits. Forming a conducting layer on the semiconductor layer after filling the nanoparticles into the pits.

Abstract: A 3D semiconductor package using an interposer is provided. In an embodiment, an interposer is provided having a first die electrically coupled to a first side of the interposer and a second die electrically coupled to a second side of the interposer. The interposer is electrically coupled to an underlying substrate, such as a packaging substrate, a high-density interconnect, a printed circuit board, or the like. The substrate has a cavity such that the second die is positioned within the cavity. The use of a cavity may allow smaller conductive bumps to be used, thereby allowing a higher number of conductive bumps to be used. A heat sink may be placed within the cavity to aid in the dissipation of the heat from the second die.

Abstract: A solar string includes first and second solar modules coupled to first and second filters by an electric transmission line. The second solar module includes a solar panel including a plurality of photovoltaic cells configured to convert photon energy to electrical energy. A processor is coupled to the solar panel and is in communication with the first solar module. The processor is configured to monitor an output of the solar panel and to transmit a status signal including an environmental condition of the second solar module to the first solar module by way of the electric transmission line. The first and second filters are configured to pass electrical power to a central inverter of a solar array in which the solar string is disposed and to prevent the status signal transmitted from the second solar module to the first solar module from being transmitted to the central inverter.

Abstract: A 3D semiconductor package using an interposer is provided. In an embodiment, an interposer is provided having a first die electrically coupled to a first side of the interposer and a second die electrically coupled to a second side of the interposer. The interposer is electrically coupled to an underlying substrate, such as a packaging substrate, a high-density interconnect, a printed circuit board, or the like. The substrate has a cavity such that the second die is positioned within the cavity. The use of a cavity may allow smaller conductive bumps to be used, thereby allowing a higher number of conductive bumps to be used. A heat sink may be placed within the cavity to aid in the dissipation of the heat from the second die.

Abstract: A method for reducing dark current in image sensors comprises providing a backside illuminated image sensor wafer, depositing a first passivation layer on a backside of the backside illuminated image sensor wafer, depositing a plasma enhanced passivation layer on the first passivation layer and depositing a second passivation layer on the plasma enhanced passivation layer.

Abstract: The present invention discloses a method of cooling an ultramobile device with microfins attached to an external wall of an enclosure surrounding the ultramobile device.

Abstract: A plane-parallel optical window is the spacer of single-cavity filters in the stack used for DWDM applications. Highly reflective quarter-wave stacks are deposited on each side of the optical window and the single-cavity structure so obtained is diced to produce a plurality of filters. Because the single-cavity structure has the same thickness over the entire window area and the quarter-wave-stack deposition process is carried out throughout under the same conditions, each single-cavity filter fabricated from the optical window has the same transmission wavelength and is therefore readily stackable for DWDM applications. Alternatively, an optical window with a thickness equal to one half that required for the spacer of a single-cavity filter is coated on a single side. The window is then divided in multiple identical components that can be combined in pairs by placing them in optical contact so as to form individual single-cavity filters with the same transmission wavelength.

Abstract: The present disclosure relates to a method for fast and precise alignment and mounting of a top die onto an interposer wafer. The method is performed by applying a hydrophobic self assembled monolayer to a carrier wafer in a pattern defining a top die placement region correlating to an arrangement of a top die on an interposer wafer. A liquid is provided into the top die placement region and a top die is placed into contact with the liquid. The surface tension of the liquid automatically aligns the top die by generating a force causing the top die to overlap with the top die placement region. The liquid is then eliminated and the top die is affixed to the carrier wafer. The carrier wafer is bonded to the interposer wafer, bringing the top die into contact with an interposer.

Abstract: A conventional interference tunable filter is combined with a pair of shaping prisms to enlarge the circular input beam in the direction orthogonal to the direction of beam propagation and to the axis of rotation of the tunable filter. The degree of expansion is tailored to minimize the walk-off losses produced by successive reflections in the cavity of the tunable filter. By appropriately sizing the enlargement, the substantially elliptical beam produced by the shaping prisms encompasses sufficient reflected beams after passing through the tunable filter to produce substantially the same filter output that in a conventional filter would require a materially larger input beam. The input beam is preferably first converted to two parallel beams of the same polarization state. Both beams are then expanded by the prisms and processed by the tunable filter.

Abstract: Keep out zones (KOZ) are formed for a through silicon via (TSV). A device can be placed outside a first KOZ of a TSV determined by a first performance threshold so that a stress impact caused by the TSV to the device is less than a first performance threshold while the first KOZ contains only those points at which a stress impact caused by the TSV is larger than or equal to the first performance threshold. A second KOZ for the TSV can be similarly formed by a second performance threshold. A plurality of TSVs can be placed in a direction that the KOZ of the TSV has smallest radius to a center of the TSV, which may be in a crystal orientation [010] or [100]. A plurality of TSV stress plug can be formed at the boundary of the overall KOZ of the plurality of TSVs.

Abstract: A data storage device, a stacking method thereof, and a data storage device assembly are provided. The data storage device assembly includes a first data storage device and a second data storage device respectively having a body, a magnetic element, and a storage device. Each body has a first containing space and a second containing space. Each magnetic element is disposed in the corresponding first containing space. At least one of the magnetic elements of the first and the second data storage device is a magnet. Each storage device is disposed in the corresponding second containing space and includes an electrical connector terminal, a memory chip, and a memory controller with no crystal oscillator. The magnetic elements of the first and the second data storage device attract each other so that the body of the first data storage device is stacked on the body of the second data storage device.

Abstract: A system and method for conductive pillars is provided. An embodiment comprises a conductive pillar having trenches located around its outer edge. The trenches are used to channel conductive material such as solder when a conductive bump is formed onto the conductive pillar. The conductive pillar may then be electrically connected to another contact through the conductive material.