Patents by Inventor Chien-hung Chen

Chien-hung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10120255
    Abstract: A display panel is disclosed, which includes: a first substrate; plural scan lines disposed on the first substrate and extending along a first direction; plural data lines disposed on the first substrate and extending along a second direction, wherein at least one pixel region is defined by the scan lines and the data lines, and the first direction and the second direction are different; a common electrode disposed in the pixel region; and a metal line electrically connecting to the common electrode and extending along the first direction, wherein the metal line has a first portion overlapping the common electrode and a second portion overlapping one of the data lines; wherein the first portion has a first maximum width along the second direction, the second portion has a second maximum with along the second direction, and the first maximum width is greater than the second maximum width.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: November 6, 2018
    Assignee: INNOLUX CORPORATION
    Inventors: Chien-Hung Chen, Hsia-Ching Chu, Ming-Chien Sun
  • Publication number: 20180314773
    Abstract: A method for analyzing a process output and a method for creating an equipment parameter model are provided. The method for analyzing the process output includes the following steps: A plurality of process steps are obtained. A processor obtains a step model set including a plurality of first step regression models, each of which represents a relationship between N of the process steps and a process output. The processor calculates a correlation of each of the first step regression models. The processor picks up at least two of the first step regression models to be a plurality of second step regression models whose correlations are ranked at top among the correlations of the first step regression models. The processor updates the step model set by a plurality of third step regression models, each of which represents a relationship between M of the process steps and the process output.
    Type: Application
    Filed: April 26, 2017
    Publication date: November 1, 2018
    Inventors: Ya-Ching Cheng, Chun-Liang Hou, Chien-Hung Chen, Wen-Jung Liao, Min-Chin Hsieh, Da-Ching Liao, Li-Chin Wang
  • Patent number: 10103560
    Abstract: A charger with a wide range output voltage includes a voltage output side, a first constant voltage output unit, a voltage modulation unit and a load voltage detection unit. The first constant voltage output unit generates a first constant voltage. The load voltage detection unit detects a load voltage and transmits the load voltage to the voltage modulation unit. According to the load voltage and a load charging voltage requirement, the voltage modulation unit generates a modulation voltage and transmits the modulation voltage to the first constant voltage output unit. The first constant voltage output unit transmits the first constant voltage and the modulation voltage to the voltage output side. Moreover, the modulation voltage is an n times of a second constant voltage. The n is a positive number.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: October 16, 2018
    Assignee: CHICONY POWER TECHNOLOGY CO., LTD.
    Inventors: Chien-Hung Chen, Chao-Ching Hsu, Chih-Feng Shen, Chung-Shu Lee
  • Publication number: 20180294359
    Abstract: A semiconductor device includes a semiconductor substrate, a tunnel dielectric disposed on the semiconductor substrate, a floating gate disposed on the tunnel dielectric, a control gate disposed on the floating gate, and an insulation layer disposed between the floating gate and the control gate. The semiconductor device further includes a spacer continuously distributed on the sidewall surfaces of the floating gate and the control gate, and the spacer overlaps portions of the top surface of the floating gate.
    Type: Application
    Filed: May 9, 2017
    Publication date: October 11, 2018
    Inventors: Tzu-Ping Chen, Chien-Hung Chen
  • Patent number: 10096505
    Abstract: A wafer cassette includes a case, a plurality of wafer trays, and a plurality of transmission mechanisms. The wafer trays are disposed in the case. Each of the wafer trays includes a central opening, a first groove, and a second groove. The diameter of the second groove is greater than that of the first groove. A bottom surface of the second groove is higher than that of the first groove. The first and second grooves surround the central opening. Each of the transmission mechanisms is connected to the corresponding wafer tray to move the wafer tray between a pick-up position and a received position. Since the wafer tray has grooves with different diameters, the wafer tray is capable of receiving wafers with different sizes.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: October 9, 2018
    Assignee: MPI CORPORATION
    Inventors: Lin-Lin Chih, Chien-Hung Chen, Cheng-Rong Yang, Stojan Kanev
  • Publication number: 20180286872
    Abstract: A semiconductor memory device having a memory cell including a plurality of memory cells, a first P-type well region, a second P-type well region, and an N-type well region disposed between the first P-Type well region and the second P-type well region. The semiconductor memory element defines a plurality of first regions, a plurality of second regions, a plurality of third regions, and a plurality of fourth regions, and each first region includes the memory cell. Each second region, each third region and each fourth region include a voltage contact to provide a voltage to the first P-type well region, the second P-type well region, and the N-type well region. The first region to the fourth region do not overlap with each other.
    Type: Application
    Filed: April 26, 2017
    Publication date: October 4, 2018
    Inventors: Chien-Hung Chen, Meng-Ping Chuang, Hsueh-Hao Shih
  • Publication number: 20180286474
    Abstract: A semiconductor memory device including a memory cell having a plurality of memory cells, a first P-type well region, a second P-type well region, and an N-type well region disposed between the first P-Type well region and the second P-type well region. The semiconductor memory element defines a plurality of first regions and a plurality of second regions, each of the first regions and each of the second regions including one of the memory cells, each of the second regions further includes at least two first voltage providing contacts, and at least one second voltage providing contact, wherein the first voltage providing contacts and the second voltage providing contact are not located within each first region.
    Type: Application
    Filed: May 8, 2017
    Publication date: October 4, 2018
    Inventors: Chien-Hung Chen, Meng-Ping Chuang, Tong-Yu Chen, Yu-Tse Kuo
  • Patent number: 10090308
    Abstract: A semiconductor memory device having a memory cell including a plurality of memory cells, a first P-type well region, a second P-type well region, and an N-type well region disposed between the first P-Type well region and the second P-type well region. The semiconductor memory element defines a plurality of first regions, a plurality of second regions, a plurality of third regions, and a plurality of fourth regions, and each first region includes the memory cell. Each second region, each third region and each fourth region include a voltage contact to provide a voltage to the first P-type well region, the second P-type well region, and the N-type well region. The first region to the fourth region do not overlap with each other.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: October 2, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chien-Hung Chen, Meng-Ping Chuang, Hsueh-Hao Shih
  • Patent number: 10068963
    Abstract: Provided is a FinFET including a substrate, at least one fin and at least one gate. A portion of the at least one fin is embedded in the substrate. The at least one fin includes, from bottom to top, a seed layer, a stress relaxation layer and a channel layer. The at least one gate is across the at least one fin. A method of forming a FinFET is further provided.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: September 4, 2018
    Assignee: United Microelectronics Corp.
    Inventors: Huai-Tzu Chiang, Sheng-Hao Lin, Hao-Ming Lee, Yu-Ru Yang, Shih-Hsien Huang, Chien-Hung Chen, Chun-Yuan Wu, Cheng-Tzung Tsai
  • Patent number: 10068909
    Abstract: The present invention provides a layout pattern of a memory device composed of static random access memory (SRAM), comprising four memory units located on a substrate, each memory unit being located in a non-rectangular region, the four non-rectangular regions combine a rectangular region, wherein each memory unit comprises a first inverter comprising a first pull-up transistor (PL1) and a first pull-down transistor (PD1), a second inverter comprises a second pull-up transistor (PL2) and a second pull-down transistor (PD2), an access transistor (PG) and a switching transistor (SW), wherein the source of the PG is coupled to an input terminal of the first inverter and a drain of the SW, a source of the SW is coupled to an output of the second inverter, wherein the PD1, the PD2, the SW, and the PG comprise a first diffusion region, the PL1 and the PL2 comprise a second diffusion region.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: September 4, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Ching-Cheng Lung, Yu-Tse Kuo, Chun-Hsien Huang, Chien-Hung Chen
  • Patent number: 10067315
    Abstract: A lens assembly includes a first lens, a second lens, a third lens, a fourth lens and a fifth lens, all of which are arranged in sequence from an object side to an image side along an optical axis. The first lens is with refractive power and includes a convex surface facing the object side. The second and third lenses are with refractive power. The fourth lens is with refractive power and includes a convex surface facing the image side. The fifth lens is with negative refractive power. The lens assembly satisfies: 0?f1/f2?6, (Vd1+Vd2)/2>40, Vd1?Vd3, Vd2?Vd3, Vd5?Vd3 wherein f1 is an effective focal length of the first lens, f2 is an effective focal length of the second lens and Vd1, Vd2, Vd3, Vd5 are Abbe numbers of the first, second, third, fifth lenses.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: September 4, 2018
    Assignees: SINTAI OPTICAL (SHENZHEN) CO., LTD., AO ETHER CORPORATION
    Inventors: Po-Yuan Shih, Chien-Hung Chen, Hsi-Ling Chang
  • Publication number: 20180246272
    Abstract: A back plate assembly and a backlight module are provided. The back plate assembly includes a back plate, at least one optical film and at least one fixing member. The back plate includes a bottom plate and a sidewall. The optical film is disposed on the bottom plate. The fixing member includes a main body and a protruding member. At least one portion of the main body overlaps with the sidewall. The protruding member is disposed on the main body and is combined with the optical film.
    Type: Application
    Filed: May 2, 2018
    Publication date: August 30, 2018
    Inventors: Min-Jui KAO, Yung-Chieh CHAO, Teng-Yi HUANG, Chien-Hung CHEN
  • Publication number: 20180241161
    Abstract: A transmission cable including a signal wire and a shielding layer is provided. The signal wire is configured to transmit a differential signal provided by an eDP interface or a V-by-one interface. The shielding layer is configured to cover the signal wire. An end of the signal wire receives the differential signal provided by the eDP interface or the V-by-one interface, and another end of the signal wire outputs the differential signal provided by the eDP interface or the V-by-one interface. In addition, a display system is also provided.
    Type: Application
    Filed: January 15, 2018
    Publication date: August 23, 2018
    Applicant: Innolux Corporation
    Inventors: Chih-Yang Hsu, Chien-Hung Chen, Heng-Chang Chang, Chin-Lung Ting, Cheng-Te Wang
  • Publication number: 20180228818
    Abstract: The present invention is based on the unexpected discovery that a combination of certain known drugs exhibits synergistic effects in treating metabolic syndrome and various other diseases. In particular, the invention comprises a pharmaceutical composition comprising: (1) a therapeutically effective quantity of a first agent that is Metformin or a salt thereof; (2) a therapeutically effective quantity of a second agent that is Aspirin; (3) a therapeutically effective quantity of a third agent that serotonin creatinine sulfate complex; (4) a non-ionic surfactant; and (5) a solvent that is a lower alkanol. A preferred composition comprises metformin hydrochloride, aspirin, and serotonin creatinine sulfate complex for the first, second, and third agents. The invention further comprises methods for the use of these compositions for the treatment of metabolic syndrome, hyperproliferative diseases including cancer, and other diseases and conditions.
    Type: Application
    Filed: October 1, 2015
    Publication date: August 16, 2018
    Inventor: Chien-Hung CHEN
  • Patent number: 10020133
    Abstract: A power switching apparatus includes a detection circuit, a control circuit and an auxiliary power circuit. The detection circuit comprises a voltage adjusting unit, a delay unit, a first switch unit and an isolation unit. The auxiliary power circuit comprises an auxiliary power input side and an output side. When a main power supplies power normally or the main power stops supplying power but the delay unit continues working in a setting time, the first switch unit is turned on. The isolation unit sends a first signal to the control circuit. The auxiliary power input side does not conduct to the output side. When the main power stops supplying power and the delay unit stops working, the first switch unit is turned off. The isolation unit does not send the first signal to the control circuit. The auxiliary power input side conducts to the output side.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: July 10, 2018
    Assignee: Chicony Power Technology Co., Ltd.
    Inventors: Jhe-Yu Lin, Chin-Hsing Tsai, Chien-Hung Chen, Chung-Shu Lee
  • Publication number: 20180166899
    Abstract: A charger with a wide range output voltage includes a voltage output side, a first constant voltage output unit, a voltage modulation unit and a load voltage detection unit. The first constant voltage output unit generates a first constant voltage. The load voltage detection unit detects a load voltage and transmits the load voltage to the voltage modulation unit. According to the load voltage and a load charging voltage requirement, the voltage modulation unit generates a modulation voltage and transmits the modulation voltage to the first constant voltage output unit. The first constant voltage output unit transmits the first constant voltage and the modulation voltage to the voltage output side. Moreover, the modulation voltage is an n times of a second constant voltage. The n is a positive number.
    Type: Application
    Filed: March 3, 2017
    Publication date: June 14, 2018
    Inventors: Chien-Hung CHEN, Chao-Ching HSU, Chih-Feng SHEN, Chung-Shu LEE
  • Patent number: 9989695
    Abstract: A back plate assembly and a backlight module are provided. The back plate assembly includes a back plate, at least one optical film and at least one fixing member. The back plate includes a bottom plate and a sidewall. The optical film is disposed on the bottom plate. The fixing member includes a main body and a protruding member. At least one portion of the main body overlaps with the sidewall. The protruding member is disposed on the main body and is combined with the optical film.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: June 5, 2018
    Assignee: Radiant Opto-Electronics Corporation
    Inventors: Min-Jui Kao, Yung-Chieh Chao, Teng-Yi Huang, Chien-Hung Chen
  • Publication number: 20180120634
    Abstract: A display device includes a backlight structure, a first liquid-crystal layer, a second liquid-crystal layer, and polarized layers. The first liquid-crystal layer is disposed on the backlight structure. The second liquid-crystal layer is disposed on the first liquid-crystal layer. The polarized layers are located between the backlight structure and the first liquid-crystal layer, between the first liquid-crystal layer and the second liquid-crystal layer, and located on the second liquid-crystal layer. The extinction ratio of the polarized layers is in a range from about 5000 to 50000.
    Type: Application
    Filed: October 27, 2017
    Publication date: May 3, 2018
    Inventor: Chien-Hung CHEN
  • Patent number: 9946247
    Abstract: A system for managing real-time work information of a motor fitting provides a sensor set at the motor fitting to transmit the real-time work information to a processing module. A processing unit of the processing module sends type information and a real-time work parameter according to the real-time work information. When a detection unit determines the real-time work parameter is fallen outside a normal work parameter according to a lookup table stored in a database and the type information, the detection unit generates an abnormal-notification signal for transmission. When an application procedure of the application-processing unit is triggered, the application-processing unit activates a play unit to play the normal work parameter, and further the activated play unit plays notification information upon receiving the abnormal-notification signal.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: April 17, 2018
    Assignee: Teco Electric & Machinery Co., Ltd.
    Inventors: Chao-Kai Liu, Ji-Hung Kang, Hung-Chun Chang, Chen-Shun Hung, Chun-Hung Chen, Chien-Hung Chen
  • Patent number: 9927595
    Abstract: A lens assembly includes a first lens, a second lens, a third lens, a fourth lens and a fifth lens. The first lens is with positive refractive power. The second lens is with negative refractive power. The third lens is with positive refractive power. The fourth lens is a meniscus lens and includes a concave surface facing the object side and a convex surface facing the image side. The fifth lens includes a concave surface facing the image side. The first lens and the third lens are made of the same material and an Abbe number of the first lens is the same as an Abbe number of the third lens. An Abbe number of the first lens, an Abbe number of the third lens and an Abbe number of the fifth lens are greater than an Abbe number of the second lens.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: March 27, 2018
    Assignees: SINTAI OPTICAL (SHENZHEN) CO., LTD., ASIA OPTICAL INTERNATIONAL LTD.
    Inventors: Po-Yuan Shih, Hsi-Ling Chang, Chien-Hung Chen