Abstract: An enclosure of an electronic device includes a plate. The plate defines a number of through holes. Each through hole has a pair of tabs connected to each other and with the through hole. Each pair of tabs are slantingly bent towards an inside of the enclosure. The enclosure with the shields can shield the electronic device from electro-magnetic interference.

Abstract: A method of enhancing a contrast ratio of a picture of a display device, comprising steps of providing the display device having a light source; continuously receiving plural display signals; and turning off the light source when the display device has a buffer time during which each of the continuously received plural display signals has a picture brightness equal to zero.

Abstract: An enclosure of an electronic device includes a ventilation plate. The ventilation plate is a grid including a number of crisscrossed connection bars and a number of through holes defined by the connection bars. A tab is formed at each of the connection bars bounding each of the through holes. The tabs are substantially angled from a plane of the grid to elongate a path electromagnetic signals must travel to pass through the ventilation plate. The enclosure with the shields can shield the electronic device from EMI.

Abstract: An electronic device with EMI screen and packaging process thereof to provide even active EMI prevention means includes adhesion of a transit substrate to a soldering surface of the electronic device, a protection circuit layer functioning as EMI screen being paved on the bottom of the transit substrate; a packaging circuit layer being laid; protection circuit layer and the transit substrate as well as the packaging and protection circuit layers being segregated with an insulation material; and solder balls provided with electric continuity to the protection circuit layer and the packaging circuit layer being respectively implanted as soldering points respectively for EMI grounding and linkage between the electronic device and a printed circuit.

Abstract: A package structure which includes a non-conductive substrate, a conductive element, a passivation, a jointed side, a conductive layer, a solder and a solder mask is disclosed. The conductive element is disposed on a surface of the non-conductive substrate and consists of a passive element and a corresponding circuit. The passivation completely covers the conductive element and the non-conductive substrate so that the conductive element is sandwiched between the passivation and the non-conductive substrate. The conductive layer covers the jointed side which exposes part of the corresponding circuit, extends beyond the jointed side and is electrically connected to the corresponding circuit. The solder mask which completely covers the jointed side and the conductive layer selectively exposes the solder which is disposed outside the jointed side and electrically connected to the conductive layer.

Abstract: A performance evaluation system for a multiple-input multiple-output (MIMO) antenna system receives simulation parameters from an input device, and simulates a MIMO antenna system accordingly. A method, also provided, further evaluates performance of the simulated MIMO antenna system when a series of radio frequency (RF) signals are transmitted through the MIMO antenna system, and displays a performance analysis result of the MIMO antenna system on a display device for evaluation of the performance of the simulated MIMO antenna system.

Abstract: A printed circuit board (200) includes at least one via (280) defined therein, the via has an upper cap (220) formed on a top surface of the PCB, and a lower cap (240) formed on a bottom surface of the PCB. A conductive hole (290) is defined in the PCB having a plated sidewall (230) plated on its inner surface, and a first clearance hole (271) is defined in a first inner layer (260) of the PCB around the sidewall. A first transmission line (210) defined on the top surface of the PCB is coupled to the upper cap, a first void (273) extending from a boundary of the first clearance hole being disposed along the layout direction of the first transmission line.

Abstract: An exemplary PCB includes a first reference layer, a first signal layer, a second signal layer, and a third signal layer in that order, a first differential pair is arranged in the first signal layer in edge-coupled structure and references the first reference layer, a distance between the first signal layer and the second signal layer is greater than a distance between the first reference layer and the first signal layer, a second differential pair is arranged in the second signal layer and the third signal layer in broad-coupled structure. The PCB has a high density layout of transmission lines.

Abstract: A printed circuit board includes a signal layer and a ground layer adjacent to the signal layer. The signal layer includes a pair of differential transmitting lines. The ground layer includes a common mode filter formed by hollowing patterns on the ground layer. The common mode filter includes two filter portions respectively arranged at opposite sides of a projection of the pair of differential transmitting lines on the ground layer. Each of the two filter portions includes a number of long narrow parallel strips connected in a snake like pattern. Hollowed areas of the two filter portions are bridged through a void.

Abstract: An enclosure of an electronic device includes a plate. The plate defines a number of through holes. A number of shields extend from the plate corresponding to the through holes. Each shield extends outwards from the outer surface of the plate, surrounding and partly covering a corresponding through hole. The enclosure with the shields can shield the electronic device from EMI.

Abstract: An enclosure includes a plate. The plate defines a number of through holes. A first shield extends from an edge bounding each through hole. A second shield extends from the edge bounding each through hole, opposite to the first shields. Each through hole is partially covered by a corresponding first shield and a corresponding second shield. The enclosure with the shields can shield the electronic device from electromagnetic interference.

Abstract: An electronic device includes a multi-frequency antenna. The multi-frequency antenna includes a ground portion, a support body, a radiation portion, and a strap. The ground portion defines a gap, and two grooves communicating with the gap and located at opposite ends of the gap. The radiation portion resists against a sidewall bounding the gap, and is connected to the strap. The radiation portion is accommodated in the gap and substantially coplanar with the ground portion. The radiation portion defines a slot. The support body is located in the gap and on the radiation portion, to support the strap.

Abstract: An embodiment of the invention provides a chip package which includes a substrate having an upper surface and a lower surface and having at least a side surface, and at least a trench extending from the upper surface towards the lower surface and extending from the side surface towards an inner portion of the substrate, wherein a width of the trench near the upper surface is not equal to a width of the trench near the lower surface, and at least an insulating layer located on a sidewall of the trench, and at least a conducting pattern located on the insulating layer, wherein the side surface is separated from the conducting pattern in the trench by a predetermined distance such that a portion of the insulating layer is exposed, and at least a conducting region electrically connected to the conducting pattern.

Abstract: An electronic device includes a protection mechanism, a first circuit board having a first electronic loop, and a second circuit board having a second electronic loop. The protection mechanism is disposed between the first circuit board and the second circuit board, and includes a frame and a first flexible board. The first flexible board includes a first connector, and a first wire mesh used for forming a third electronic loop. When trace breaking occurs to any one, any two, or all of the electronic loops, the first, the second, and the third electronic loops are forced to break, thereby protecting data saved in the electronic device from being read inappropriately, so as to avoid data to be stolen.

Abstract: A compensation method compensates for a length offset between a first transmission line and a second transmission line of a differential signal transmission. The compensation method includes calculating a transmission speed of a first signal in the first transmission line, measuring lengths of the first and second transmission lines, calculating a transmission time of the first signal in the first transmission line, and calculating a relationship between permittivity values of the first and second transmission lines. The compensation method further changes the permittivity values of the first and second transmission lines according to the relationship.

Abstract: An electronic device package is disclosed. The package includes at least one semiconductor chip having a first surface and a second surface opposite thereto, in which at least one redistribution layer is disposed on the first surface of the semiconductor chip and is electrically connected to at least one conductive pad structure. At least one abut portion is disposed on the redistribution layer and electrically contacting thereto. A passivation layer covers the first surface of the semiconductor chip and surrounds the abut portion. A substrate is attached onto the second surface of the semiconductor chip. A fabrication method of the electronic device package is also disclosed.

Abstract: Electronic device wafer level scale packages and fabrication methods thereof A semiconductor wafer with a plurality of electronic devices formed thereon is provided. The semiconductor wafer is bonded with a supporting substrate. The back of the semiconductor substrate is thinned. A first trench is formed by etching the semiconductor exposing an inter-layered dielectric layer. An insulating layer is conformably deposited on the back of the semiconductor substrate. The insulating layer on the bottom of the first trench is removed to create a second trench. The insulating layer and the ILD layer are sequentially removed exposing part of a pair of contact pads. A conductive layer is conformably formed on the back of the semiconductor. After the conductive layer is patterned, the conductive layer and the contact pads construct an S-shaped connection. Next, an exterior connection and terminal contact pads are subsequently formed.

Abstract: An exemplary FPCB includes a signal layer having a differential pair consisting of two transmission lines arranged therein, a ground layer, and a dielectric layer lying between the signal layer and the ground layer. Two sheets made of conductive materials are respectively arranged at opposite sides of the differential pair, and both connected to ground. The sheets are apart from and parallel to the transmission lines. The ground layer has a void defined therein, and the void is located under the two transmission lines.

Abstract: A method of detecting a dynamic path of a five-axis machine tool having a spindle and a turntable and has a preparing step, a correcting step and a detecting step. The preparing step includes mounting a detector on the spindle, mounting a cat-eye reflector on the turntable, emitting a laser light to the cat-eye reflector, reflecting the laser light to the detector and splitting into two light beams. One of the light beams is emitted to a four-quadrant position sensitive detector. The correcting step includes rotating the detector, detecting a signal of the laser light by the four-quadrant position sensitive detector to eliminate an offset between the detecting assembly and the spindle. The detecting step includes detecting the dynamic path of the five-axis machine tool by detecting the positions of at least two of the linear axes and at least one of the rotation axes of the five-axis machine tool.

Abstract: A method for making a nitride read only memory device with buried diffusion spacers is disclosed. An oxide-nitride-oxide (ONO) layer is formed on top of a silicon substrate, and a polysilicon gate is formed over the ONO layer. The polysilicon gate is formed less than a length of the ONO layer. Two buried diffusion spacers are formed beside two sidewalls of the polysilicon gate and over the ONO layer. Two buried diffusion regions are implanted on the silicon substrate next to the two buried diffusion spacers. The two buried diffusion regions are then annealed such that the approximate interfaces of the buried diffusion regions are under the sidewalls of the polysilicon gate. The structure of a nitride read only memory device with buried diffusion spacers is also described.