Abstract: A method includes forming multiple photonic devices in a semiconductor wafer, forming a v-shaped groove in a first side of the semiconductor wafer, forming an opening extending through the semiconductor wafer, forming multiple conductive features within the opening, wherein the conductive features extend from the first side of the semiconductor wafer to a second side of the semiconductor wafer, forming a polymer material over the v-shaped groove, depositing a molding material within the opening, wherein the multiple conductive features are separated by the molding material, after depositing the molding material, removing the polymer material to expose the v-shaped groove, and placing an optical fiber within the v-shaped groove.

Abstract: A liquid storage tank includes a housing, a piston located in the housing, a cover, an elastic element, and an outlet pipe. The cover is attached to the housing and has a support post extending toward the piston. The piston, the housing, and the cover define a tank chamber. The tank chamber is filled with cooling liquid. The elastic element is connected with the tank hosing and the piston. The elastic element is free from contact with the cooling liquid. The outlet pipe communicates with the tank chamber. An extension direction of an opening of the outlet pipe is not parallel to a direction of movement of the elastic element. When the cooling liquid is decreased, the piston compressed the tank chamber such that the elastic element is released. The tank chamber is continuously compressed by pairing the elastic element and the piston.

Abstract: A semiconductor device includes first and second source/drain structures, a channel layer, a gate structure, and an epitaxial layer. The channel layer is above the first source/drain structure. The second source/drain structure is above the channel layer. The gate structure is on a first side surface of the channel layer. The epitaxial layer forms a P-N junction with a second side surface of the channel layer.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a photonic die, an encapsulant and a wave guide structure. The photonic die includes: a substrate, having a wave guide pattern formed at front surface; and a dielectric layer, covering the front surface of the substrate, and having an opening overlapped with an end portion of the wave guide pattern. The encapsulant laterally encapsulates the photonic die. The wave guide structure lies on the encapsulant and the photonic die, and extends into the opening of the dielectric layer, to be optically coupled to the wave guide pattern.

Abstract: There is provided a system and method of performing a measurement with respect to an epitaxy formed in a finFET, the epitaxy being separated with at least one adjacent epitaxy by at least one HK fin. The method comprises obtaining an image of the epitaxy and the at least one HK fin, and a gray level (GL) profile indicative of GL distribution of the image; detecting edges of the at least one HK fin; determining two inflection points of the GL profile within an area of interest in the image; performing a critical dimension (CD) measurement between the two inflection points; determining whether to apply correction to the CD measurement based on a GL ratio indicative of a relative position between the epitaxy and the at least one HK fin; and applying correction to the CD measurement upon the GL ratio meeting a predetermined criterion.

Abstract: A method for manufacturing a conductive bridging memory device includes the following steps. First, a bottom electrode is formed on a substrate. Next, a switching layer is formed on the bottom electrode. The switching layer is made of a semiconducting metal oxide and free of gallium. Then, a surface of the switching layer is subjected to an oxygen plasma surface treatment. Afterwards, a blocking layer including a conductive material is formed on the treated surface of the switching layer, and an upper electrode is formed on the blocking layer.

Abstract: Transistor structures and methods of forming transistor structures are provided. The transistor structures include alternating layers of a first epitaxial material and a second epitaxial material. In some embodiments, one of the first epitaxial material and the second epitaxial material may be removed for one of an n-type or p-type transistor. A bottommost layer of the first epitaxial material and the second epitaxial material maybe be removed, and sidewalls of one of the first epitaxial material and the second epitaxial material may be indented or recessed.

Abstract: Provided herein are chemical-mechanical planarization (CMP) systems and methods to reduce metal particle pollution on dressing disks and polishing pads. Such methods may include contacting a dressing disk and at least one conductive element with an electrolyte solution and applying direct current (DC) power to the dressing disk and the at least one conductive element.

Abstract: A testing system includes a testing apparatus and a crack noise monitoring device. The testing apparatus includes a testing stage and an element pickup module for pressing a semiconductor element on the testing stage. The crack noise monitoring device includes a database unit, a sound conduction set, a voiceprint generation unit and a processing unit. The database unit has a first voiceprint pattern. The sound conduction set is connected to the voiceprint generation unit and the testing apparatus for transmitting a sound wave from the semiconductor element to the voiceprint generation unit. The voiceprint generation unit receives and converts the sound wave into a second voiceprint pattern. The processing unit is electrically connected to the voiceprint generating unit and the database unit for determining whether the first voiceprint pattern is identical to the second voiceprint pattern.

Abstract: A testing apparatus includes a testing stage and an element pickup module. The test loader includes a testing area and a plurality of terminals arranged within the testing area. The element pickup module includes a mobile arm movable towards the testing stage, an air passage set disposed within the mobile arm and respectively connected to the vacuum pump equipment and the mobile arm, and a pressure-buffering portion. The pressure-buffering portion includes an elastic pad and a plurality of penetrating openings. The elastic pad is disposed on the bottom portion of the mobile arm, and provided with a flat surface for contacting a semiconductor element. The penetrating openings are distributed on the flat surface to connect to the air passage set so that the semiconductor element is fixedly sucked on the flat surface by the vacuum pump equipment through the penetrating openings.

Abstract: An intraoral scanner includes a casing, a light source disposed in the casing, a reflection plate obliquely disposed in the casing for reflecting light of the light source to an object to be scanned through an opening of the casing, a transparent plate, and a receiver adjacent to the light source. A projection optical axis of the light source forms a first oblique angle with a receiving optical axis of the receiver. The receiver receives light after being incident to the object to be scanned and then reflected to the receiver by the reflection plate. The transparent plate is disposed between the light source and the reflection plate or covers the opening. The projection optical axis forms a second oblique angle with a norm of the transparent plate to make a reflection angle range of light reflected by the transparent plate fall outside a receiving angel range of the receiver.

Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary semiconductor structure includes a number of channel members over a substrate, a gate structure wrapping around each of the number of channel members, a dielectric fin structure disposed adjacent to the gate structure, the dielectric fin structure includes a first dielectric layer disposed over the substrate and in direct contact with the first gate structure, a second dielectric layer disposed over the first dielectric layer, and a third dielectric layer. The third dielectric is disposed over the second dielectric layer and spaced apart from the first dielectric layer and the gate structure by the second dielectric layer. The dielectric fin structure also includes an isolation feature disposed directly over the third dielectric layer.

Abstract: A method of fabricating a device includes providing a fin extending from a substrate, where the fin includes an epitaxial layer stack having a plurality of semiconductor channel layers interposed by a plurality of dummy layers. In some embodiments, the method further includes removing a portion of the epitaxial layer stack within a source/drain region of the semiconductor device to form a trench in the source/drain region that exposes lateral surfaces of the plurality of semiconductor channel layers and the plurality of dummy layers. After forming the trench, in some examples, the method further includes performing a dummy layer recess process to laterally etch ends of the plurality of dummy layers to form first recesses along a sidewall of the trench. In some embodiments, the method further includes conformally forming a cap layer along the exposed lateral surfaces of the plurality of semiconductor channel layers and within the first recesses.

Abstract: A display apparatus is disclosed. The display apparatus includes a color filter, a first backlight unit, a second backlight unit and a third backlight unit. The first backlight unit, the second backlight unit and the third backlight unit are disposed relative to the color filter and independently emit a first color light, a second color light and a third color light to the color filter respectively. In a brightness mode, the first color light has a first intensity, the second color light has a second intensity and the third color light has a third intensity. In a color mode, when a display image of the display apparatus is biased to a third color corresponding to the third color light, the display apparatus reduces at least one of the first intensity and the second intensity.

Abstract: The invention relates to a lactic acid bacterium (LAB), Lactobacillus fermentum PS150, and a bioactive protein produced by the LAB, which has an advantageous effect in improving mood disorder, enhancing cognitive functions in brain and treating or preventing a neurodegenerative disease.

Abstract: A packaging structure, includes: a dielectric layer; at least one inner wiring layer embedded in the dielectric layer; at least two outer wiring layers arranged two sides of the at least one inner wiring layer and combined with the dielectric layer; and at least one electronic component embedded in the dielectric layer; each inner wiring layer including at least two spaced supporting pads, and each supporting pad including a main body and a protruding portion extending outward from a periphery of the main body, the packaging structure further including at least two spaced positioning pillars, and each positioning pillar correspondingly connected to one main body, each electronic component arranged between at least two positioning pillars, and an end of each electronic component being in contact with protruding portions of at least two supporting pads, thereby packaging the electronic component accurately.

Abstract: The present disclosure provides ethylene-vinyl alcohol copolymer resin compositions, and multilayer structure comprising the ethylene-vinyl alcohol copolymer resin compositions with uniform thickness.

Abstract: An operation method for a memory device is provided. The operation method includes: increasing a dummy word line voltage to a first dummy word line voltage during a pre-tum on period; increasing the dummy word line voltage from the first dummy word line voltage to a second dummy word line voltage during a read period; and lowering the dummy word line voltage after the read period is finished. Wherein the first dummy word line voltage is lower than the second dummy word line voltage.

Abstract: A thermal peak suppression device includes a heat dissipation fin set, a heat dissipator, a thermal phase change material, a filling gas, a fin-array frame and a capillary tube. The heat dissipator includes a thermal conductive block thermally coupled to the heat dissipation fin set, and a closed cavity formed inside the thermal conductive block to have a hot zone and a cold zone. The thermal phase change material is disposed within the hot zone. The filling gas is disposed within the cold zone. The fin-array frame is connected to the thermal conductive block within the cold zone. Two opposite ends of the capillary tube are respectively located within the cold zone and the hot zone. When the thermal phase change material is transformed into a liquid state, the thermal phase change material is sent to the hot zone through the capillary tube.

Abstract: There is provided a system and method of performing a measurement with respect to an epitaxy formed in a finFET, the epitaxy being separated with at least one adjacent epitaxy by at least one HK fin. The method comprises obtaining an image of the epitaxy and the at least one HK fin, and a gray level (GL) profile indicative of GL distribution of the image; detecting edges of the at least one HK fin; determining two inflection points of the GL profile within an area of interest in the image; performing a critical dimension (CD) measurement between the two inflection points; determining whether to apply correction to the CD measurement based on a GL ratio indicative of a relative position between the epitaxy and the at least one HK fin; and applying correction to the CD measurement upon the GL ratio meeting a predetermined criterion.