Abstract: A method of manufacturing memory devices is provided in the present invention. The method includes the steps of providing a substrate with multiple capacitors, wherein the capacitor includes a lower electrode layer, an insulating layer and an upper electrode layer and a top plate, forming a tungsten layer on the upper electrode, performing a nitriding plasma treatment to the tungsten layer to form a tungsten nitride layer, and forming a pre-metal dielectric layer on the tungsten nitride layer.

Abstract: An expansion card with homogenized light outputs and light-homogenizing device thereof are disclosed. The expansion card includes a circuit board and a light-homogenizing device. The circuit board includes a light-emitting device disposed on a first side edge. The light-homogenizing device includes a light-guiding body, a light-diffusion element, and a light-turning element. The light-guiding body includes a light-input side and a light-output side opposite to each other, and the light-input side is adjacent to the first side edge. The light-diffusion element is disposed on the light-input side of the light-guiding body and opposite to the light-emitting device. The light-diffusion element and the light-out side are configured to diffuse the light beams entering into the light-guiding body from the light-emitting device and form a light-transmitting path.

Abstract: A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode. The first support layer is disposed on the semiconductor substrate. The first electrode is disposed on the semiconductor substrate and penetrates the first support layer. The capacitor dielectric layer is disposed on the first electrode. The second electrode is disposed on the semiconductor substrate, and at least a part of the capacitor dielectric layer is disposed between the first electrode and the second electrode. The first support layer includes a carbon doped nitride layer, and a carbon concentration of a bottom portion of the first support layer is higher than a carbon concentration of a top portion of the first support layer.

Abstract: The present invention provides a method for fabricating a semiconductor device, comprising at least the steps of: providing a substrate in which a memory region and a peripheral region are defined, the memory region includes a plurality of memory cells, each memory cell includes at least a first transistor and a capacitor, the peripheral region compress a second transistor, a first insulating layer is formed within the memory region and the peripheral region by an atomic layer deposition process, covering the capacitor of the memory cells in the memory region and the second transistor in the peripheral region, and a second insulating layer is formed, overlying the first insulating layer and the peripheral region. Finally, a contact structure is formed within the second insulating layer, and electrically connecting the second transistor.

Abstract: A method of fabricating a DRAM includes providing a substrate. Later, a first mask layer is formed to cover the substrate. The first mask layer includes a hydrogen-containing silicon nitride layer and a silicon oxide layer. The hydrogen-containing silicon nitride layer has the chemical formula: SixNyHz, wherein x is between 4 and 8, y is between 3.5 and 9.5, and z equals 1. After that, the first mask layer is patterned to form a first patterned mask layer. Next, the substrate is etched by taking the first patterned mask layer as a mask to form a word line trench. Subsequently, the first patterned mask layer is removed entirely. Finally, a word line is formed in the word line trench.

Abstract: The present disclosure illustrates a switch device for substation and an error warning method thereof. The switch device accesses and copies a generic object oriented substation event (GOOSE) packet, and when the copied GOOSE packet is determined to trigger an abnormal condition event, the switch device generates and transmits an abnormal condition event confirmation request to an upstream switch device. A warning message is issued when a ready response cannot be received by the switch device from the upstream switch device. Therefore, the technical effect of quickly and accurately finding the switch device triggering the abnormal condition event first to facilitate repair may be achieved.

Abstract: The present invention provides a semiconductor structure comprising a substrate, a cell region defined on the substrate, a plurality of lower electrodes of the capacitor structures located in the cell region, an top support structure, contacting a top region of the lower electrode structure, and at least one middle support structure located between the substrate and the top support structure, contacting a middle region of the lower electrode structure, wherein when viewed in a top view, the top support structure and the middle support structure do not completely overlapped with each other.

Abstract: A casing including a plate member and a resin member is provided. The plate member has a bottom surface and includes a first surface layer, a second surface layer and a core layer. The first surface layer has a plurality of first through holes and disposed on at least one edge of the first surface layer. The first surface layer and the second surface layer are oppositely disposed on two sides of the core layer. The resin member covers edges and the bottom surface of the plate member and has an extension portion. The extension portion extends between the first surface layer and the second surface layer and adjacent to the core layer. The extension portion further extends to the plurality of first through holes. A manufacturing method of the casing is also provided.

Abstract: Provided is a vaccine combination against multiple dengue virus serotypes and preparation thereof. The vaccine combination includes a first vaccine and a second vaccine, wherein the first vaccine includes a live-attenuated dengue virus and a live-attenuated chimeric dengue virus, and the second vaccine includes a plurality type of recombinant flagellin and envelope domain III fusion proteins, wherein an envelope domain III of each type of the recombinant flagellin and envelope domain III fusion proteins is derived from a different dengue virus serotype. Also provided is a method of preventing or treating viral infection by multiple dengue virus serotypes in a subject using the vaccine combination, including the steps of administering the first and then the second vaccines at a time interval of about 1-5 weeks.

Abstract: The present disclosure relates to a microfluidic-based analyzer, including a drive module and a microfluidic disc. On the microfluidic disk, a capillary is connected between a mixing chamber and a waste chamber. More particularly, the capillary is connected to the mixing chamber through a first access on the first radius of the microfluidic disc, and the capillary is connected to the waste chamber through a second access on the second radius of the microfluidic disk. Specifically, a turn of the capillary is disposed between the first access and the second access, in which a folding is configured on a third radius of the microfluidic disc. Overall, the aforementioned microfluidic-based analyzer is able to be operated in different rotational speeds and is capable of evacuating the mixing chamber and enhancing the washing efficiency.

Abstract: A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode. The first support layer is disposed on the semiconductor substrate. The first electrode is disposed on the semiconductor substrate and penetrates the first support layer. The capacitor dielectric layer is disposed on the first electrode. The second electrode is disposed on the semiconductor substrate, and at least a part of the capacitor dielectric layer is disposed between the first electrode and the second electrode. The first support layer includes a carbon doped nitride layer, and a carbon concentration of a bottom portion of the first support layer is higher than a carbon concentration of a top portion of the first support layer.

Abstract: A fixing device includes a main body; a first coupling member disposed on the main body for coupling to the upper rail; a second coupling member disposed on the main body for coupling to the cover plate. The second coupling member includes an engagement projection, which includes a base fitted into and slidable inside a slide groove. The slide groove is disposed on a surface of the main body facing the cover plate. The second coupling member further includes a bump protruding from the base and inserted into a groove in the slide groove, and the bump is movable between grooves along a first direction. The bump can move in the groove in a first direction and is stopped from moving in a second direction opposite to the first direction. Two ends of the engagement projection are different in configuration to specify the first direction.

Abstract: A stator for use in a dual-phased motor includes a magnetic yoke portion, a first magnetic pole, a second magnetic pole, a third magnetic pole and a fourth magnetic pole. The first, second, third and fourth magnetic poles are circumferentially arranged around and coupled with the magnetic yoke portion. Each of the first, second, third and fourth magnetic poles is wound with a coil having a first coil layer and a second coil layer. The first coil layer and the second coil layer of each of the first, second, third and fourth magnetic poles are in different phases. In other embodiments, several methods for winding a stator for use in a dual-phased motor are respectively proposed.

Abstract: A method for providing secure communication is provided. The method is used in a system including at least an electronic device and a card device. The method includes encrypting data transmitted to or decrypting data received from a second electronic device based on a first private key which is stored in the card device and is associated with the electronic device over a wireless connection between the electronic device and the card device, wherein the wireless connection is established when the card device is detected as being in proximity to the electronic device.

Abstract: A method for winding a stator for use in a dual-phased motor is disclosed. The stator includes a magnetic yoke portion and first, second, third and fourth magnetic poles that are circumferentially arranged around and coupled with the magnetic yoke portion. The method includes winding a first wire around the first and third magnetic poles to form first coil layers, winding a second wire around the first magnetic pole to form a second coil layer, around the second magnetic pole to form a first coil layer, around the third magnetic pole to form a second coil layer, and around the fourth magnetic pole to form a first coil layer, and winding a third wire around the second and fourth magnetic poles to form second coil layers.

Abstract: A method of forming a bit line gate structure of a dynamic random access memory (DRAM) includes the following. A hard mask layer is formed on a metal stack by a chemical vapor deposition process importing nitrogen (N2) gases and then importing amonia (NH3) gases. The present invention also provides a bit line gate structure of a dynamic random access memory (DRAM) including a metal stack and a hard mask. The metal stack includes a polysilicon layer, a titanium layer, a titanium nitride layer, a first tungsten nitride layer, a tungsten layer and a second tungsten nitride layer stacked from bottom to top. The hard mask is disposed on the metal stack.

Abstract: The present invention provides a method for fabricating a semiconductor device, comprising at least the steps of: providing a substrate in which a memory region and a peripheral region are defined, the memory region includes a plurality of memory cells, each memory cell includes at least a first transistor and a capacitor, the peripheral region compress a second transistor, a first insulating layer is formed within the memory region and the peripheral region by an atomic layer deposition process, covering the capacitor of the memory cells in the memory region and the second transistor in the peripheral region, and a second insulating layer is formed, overlying the first insulating layer and the peripheral region. Finally, a contact structure is formed within the second insulating layer, and electrically connecting the second transistor.

Abstract: The present invention provides a method for forming an amorphous silicon multiple layer structure, the method comprises the flowing steps: first, a substrate material layer is provided, next, a first amorphous silicon layer is formed on the substrate material layer, wherein the first amorphous silicon layer includes a plurality of hydrogen atoms disposed therein, afterwards, an UV curing process is performed to the first amorphous silicon layer, so as to remove the hydrogen atoms from the first amorphous silicon layer, finally, a second amorphous silicon layer is formed on the first amorphous silicon layer.

Abstract: A fingerprint identification device and a method for manufacturing the fingerprint identification device are provided. The fingerprint identification device includes a solder ball array, a re-distribution layer, an image sensing integrated circuit (IC), a light emitting circuit, a photic layer and a molding material. The re-distribution layer disposed on the solder ball array is electrically connected to a plurality of solder balls. The image sensing IC includes a plurality of through silicon vias (TSVs), and the TSVs are correspondingly electrically connected to the solder balls, respectively, through the re-distribution layer. The light emitting circuit is disposed on one side of the image sensing IC, and electrically connected to the image sensing IC through the re-distribution layer. The image sensing IC controls the light emitting circuit. The photic layer is disposed on the image sensing IC. The molding material encloses the image sensing IC.

Abstract: Provided is a vaccine combination against multiple dengue virus serotypes and preparation thereof. The vaccine combination includes a first vaccine and a second vaccine, wherein the first vaccine includes a live-attenuated dengue virus and a live-attenuated chimeric dengue virus, and the second vaccine includes a plurality type of recombinant flagellin and envelope domain III fusion proteins, wherein an envelope domain III of each type of the recombinant flagellin and envelope domain III fusion proteins is derived from a different dengue virus serotype. Also provided is a method of preventing or treating viral infection by multiple dengue virus serotypes in a subject using the vaccine combination, including the steps of administering the first and then the second vaccines at a time interval of about 1-5 weeks.