Abstract: A pixel sensor may include a layer stack to reduce and/or block the effects of plasma and etching on a photodiode and/or other lower-level layers. The layer stack may include a first oxide layer, a layer having a band gap that is approximately less than 8.8 electron-Volts (eV), and a second oxide layer. The layer stack may reduce and/or prevent the penetration and absorption of ultraviolet photons resulting from the plasma and etching processes, which may otherwise cause the formation of electron-hole pairs in the substrate in which the photodiode is included.

Abstract: The present disclosure, in some embodiments, relates to a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A first dielectric layer is over the lower dielectric structure and includes sidewalls defining a plurality of openings extending through the first dielectric layer. A lower electrode is arranged along the sidewalls and over an upper surface of the first dielectric layer, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is along opposing outermost sidewalls of the upper electrode. The spacer has an outermost surface extending from a lowermost surface of the spacer to a top of the spacer. The outermost surface is substantially aligned with an outermost sidewall of the lower electrode.

Abstract: The present invention provides a lens driving device, a camera and an electronic apparatus with a small size and an excellent effect in hand vibration correction. The lens driving device includes a case having an accommodation space, in which a lens module is provided. The lens module includes a lens, a lens holder receiving the lens, a support frame for freely rotating the lens holder in a direction orthogonal to an optical axis direction, support members, an electromagnetic driving device, and a base for fixing a circuit board; the electromagnetic driving device is arranged on the lens holder and the base for fixing the circuit board, and is provided adjacent to a level of a center of gravity of the lens module; and the lens module have different movement axes in a plane and is rotatable freely relative to the base for fixing the circuit board.

Abstract: A semiconductor structure comprises a substrate having a first well region of a first conductive type, a second well region of a second conductive type, and a junction between the first well region and the second well region. The first conductive type and the second conductive type are complementary. A plurality of first dummy structures and second dummy structures and at least a first active region are defined in the first well region by an isolation structure. The first dummy structures are adjacent to the junction and respectively comprise a first metal silicide region and a first doped region of the first conductive type and between the first metal silicide region and the first well region. The first dummy structures are between the second dummy structures and the junction. The second dummy structures respectively comprise a second metal silicide region that direct contacts the first well region.

Abstract: A method for dynamically managing host read operation and read refresh operation in a storage device, a storage device and a storage medium thereof are provided. The method includes: controlling, by a controller of the storage device, a ratio of the number of host read operation to the number of read refresh operation in the storage device to be in line with a first value and obtaining a total read request count which accumulates in the storage device; when a criterion for updating the ratio is satisfied, determining, by the controller, a second value for the ratio of the number of host read operation to the number of read refresh operation according to the total read request count and information of blocks to be refreshed in the storage device; and controlling, by the controller, the number of host read operation and the number of read refresh operation so that a ratio of the number of host read operation to the number of read refresh operation is in line with the second value.

Abstract: A transistor structure includes a source region and a drain region disposed in a substrate, extending along a first direction. A polysilicon layer is disposed over the substrate, extending along a second direction perpendicular to the first direction, wherein the polysilicon layer includes a first edge region, a channel region and a second edge region formed as a gate region between the source region and the drain region. The polysilicon layer has at least a first opening pattern at the first edge region having a first portion overlapping the gate region; and at least a second opening pattern at the second edge region having a second portion overlapping the gate region.

Abstract: The present invention discloses a method and a system of vertebral compression fracture detection. The method of vertebral compression fracture detection includes: recombining a plurality of anatomical images captured in at least a spine segment of a target individual into a 3D image; using a multi-planar reconstruction method to reformat the 3D image to obtain at least one sagittal reformatted image; using a classification model to determine whether the sagittal reformatted image covers the middle section of the vertebral column or not; using a vertebral detection method to detect each vertebral body in the sagittal reformatted image covering the middle section of the vertebral column; using a keypoint localization method to localize a plurality of keypoints of each vertebral body which was detected in the sagittal reformatted image; evaluating the compression fracture grade of each vertebral body in the sagittal reformatted image.

Abstract: A light guide plate includes a main body, stripe structures, and light-adjusting structures. The main body includes a light-incident surface and an optical surface. The stripe structures are disposed on the optical surface. The light-adjusting structures are disposed between two adjacent stripe structures. Each of the light-adjusting structures includes a first light active surface and a second light active surface. The first light active surface faces towards the light-incident surface. The second light active surface faces towards an opposite light-incident surface. The first light active surface and the second light active surface are inclined towards different directions and formed a non-symmetrical shape. A first included angle is formed between the first light active surface and the optical surface. A second included angle is formed between the second light active surface and the optical surface. The first included angle and the second included angle are acute angles.

Abstract: A wide-angle lens assembly includes a first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth lenses. The first and second lenses are with negative refractive power and include a convex surface facing an object side and a concave surface facing an image side respectively. The third lens is a biconcave lens with negative refractive power. The fourth and fifth lenses are biconvex lenses with positive refractive power. The sixth lens is with positive refractive power and includes a convex surface facing the image side. The seventh lens is with negative refractive power and includes a concave surface facing the object side. The eighth lens is with positive refractive power and includes a convex surface facing the object side. The ninth lens is with positive refractive power and includes a concave surface facing the object side and a convex surface facing the image side.

Abstract: The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.

Abstract: The medical image recognition method includes the following steps: transmitting an accession number to a recognition module through a prediction unit; receiving an accession number and a human body image by a recognition model, and importing the human body image into a set of neural network models respectively; wherein each of the neural network models outputs at least one recognition result; the recognition module returns the recognition results to the prediction unit, and then the recognition results are stored in database.

Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises a well layer and a barrier layer, wherein the barrier layer has a band gap; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer comprises a band gap which is greater than the band gap of the barrier layer; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; a confinement layer between the first aluminum-containing layer and the active region; and a second aluminum-containing layer between the second semiconductor structure and the first electron blocking layer; wherein both the first alumi

Abstract: A semiconductor device includes a source/drain region, a silicide region, a source/drain contact, and a silicon-containing dielectric liner. The source/drain region is in a substrate. The silicide region is embedded in the source/drain region. The source/drain contact is over the silicide region. The silicon-containing dielectric liner surrounds the source/drain contact. The source/drain region is in contact with an outer sidewall of the silicon-containing dielectric liner but separated from a bottom surface of the silicon-containing dielectric liner by the silicide region.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a substrate, a first well region of a first conductive type and a second well region of a second conductive type disposed in the substrate. The first conductive type and the second conductive type are complementary. A plurality of first dummy structures are disposed in the first well region and arranged along a junction between the first well region and the second well region. The first dummy structures respectively include a first conductive region and a first doped region disposed between the first conductive region and the first doped region.

Abstract: A transparent plastic integrally molded goblet has a cup-shaped part, a columnar first leg and a disc-shaped first base integrally molded from transparent plastics. The bottom edge of the cup-shaped part extends downwards to form the first leg. The bottom end of the first leg integrally forms the first base. The cup-shaped part has a circumferential wall which encloses the circumference of a first space. The top edge of the circumferential wall forms an annular first ring frame, and the central part of bottom edge of the first base downwards forms a first convex pin. The integral molding of transparent plastics can enhance the appearance integrity of the goblet, the manufacture of the goblet is easy and the product yield is increased.

Abstract: A transistor structure includes a source region and a drain region disposed in a substrate, extending along a first direction. A polysilicon layer is disposed over the substrate, extending along a second direction perpendicular to the first direction, wherein the polysilicon layer includes a first edge region, a channel region and a second edge region formed as a gate region between the source region and the drain region. The polysilicon layer has at least a first opening pattern at the first edge region having a first portion overlapping the gate region; and at least a second opening pattern at the second edge region having a second portion overlapping the gate region.

Abstract: A semiconductor package includes a first die comprising an upper surface and a lower surface opposite to the upper surface. The first die includes a plurality of through-silicon vias (TSVs) penetrating through the first die. A second die is stacked on the upper surface of the first die. An interposer layer is disposed on the lower surface of the first die. An inductor is disposed in the interposer layer. The inductor comprises terminals directly coupled to the TSVs.

Abstract: A compound for measurement of thiopurine pathway directed systems imaging and therapy including a chelator and a thiopurine ligand is provided. A method of synthesizing the compound is also provided, and the compound may be further prepared in pharmaceutical formulations or kits for therapy or molecular imaging.

Abstract: Embodiments of the present disclosure relate to methods of fabricating conductive features to prevent metal extrusion. Particularly, the conductive feature includes a control layer to reduce grain size of a metal containing layer, thus obtaining a robust structure to decrease extrusion defects. In some embodiments, the control layer is formed between a barrier layer and the conductive feature. In some embodiments, the control layer is formed by adding a control element, such as oxygen, to an upper portion of the barrier layer.

Abstract: A semiconductor device includes a first interlayer dielectric (ILD) layer disposed over a substrate, a control layer disposed over the first ILD layer and containing silicon and oxygen, and a resistor wire disposed over the control layer. An oxygen concentration of the control layer is greater than an oxygen concentration of the first ILD layer.