Patents by Inventor Ching-An Chung

Ching-An Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220359781
    Abstract: A method includes forming image sensors in a semiconductor substrate. A first alignment mark is formed close to a front side of the semiconductor substrate. The method further includes performing a backside polishing process to thin the semiconductor substrate, forming a second alignment mark on the backside of the semiconductor substrate, and forming a feature on the backside of the semiconductor substrate. The feature is formed using the second alignment mark for alignment.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Inventors: Chih Wei Sung, Chung-Bin Tseng, Keng-Ying Liao, Yen-Jou Wu, Po-Zen Chen, Su-Yu Yeh, Ching-Chung Su
  • Publication number: 20220357211
    Abstract: The present invention provides a processing circuit including logic cells and a thermal sensor. The thermal sensor is positioned within the logic cells and surrounded by the logic cells, and the logic cells and the thermal sensor are all implemented by core devices.
    Type: Application
    Filed: April 13, 2022
    Publication date: November 10, 2022
    Applicant: MEDIATEK INC.
    Inventors: Min-Hang Hsieh, Jyun-Jia Huang, Chien-Sheng Chao, Ghien-An Shih, Ching-Chung Ko, Yu-Cheng Su, Lin-Chien Chen, Ai-Yun Liu, Chia-Hsin Hu
  • Patent number: 11495681
    Abstract: A semiconductor device includes a semiconductor substrate, a recess, a first gate oxide layer, and a gate structure. The semiconductor substrate includes a first region and a second region adjacent to the first region. The recess is disposed in the first region of the semiconductor substrate, and an edge of the recess is located at an interface between the first region and the second region. At least a part of the first gate oxide layer is disposed in the recess. The first gate oxide layer includes a hump portion disposed adjacent to the edge of the recess, and a height of the hump portion is less than a depth of the recess. The gate structure is disposed on the first region and the second region of the semiconductor substrate, and the gate structure overlaps the hump portion of the first gate oxide layer in a vertical direction.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: November 8, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chang-Po Hsiung, Ching-Chung Yang, Shan-Shi Huang, Shin-Hung Li, Nien-Chung Li, Wen-Fang Lee, Chiu-Te Lee, Chih-Kai Hsu, Chun-Ya Chiu, Chin-Hung Chen, Chia-Jung Hsu, Ssu-I Fu, Yu-Hsiang Lin
  • Patent number: 11489516
    Abstract: A deskew circuit for a differential signal is provided. A first common mode voltage generating circuit generates a first common mode voltage signal according to first and second differential input signals. A voltage buffer circuit is coupled to the first common mode voltage generating circuit and has an input impedance higher than a preset value, and buffers the first common mode voltage signal and the first and second differential input signals to generate a second common mode voltage signal, a third differential input signal, and a fourth differential input signal. A second common mode voltage generating circuit is coupled to the voltage buffer circuit and generates a third common mode voltage signal according to the third and fourth differential input signals. An output circuit generates a deskew output signal according to the third and fourth differential input signals and the second and third common mode voltage signals.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: November 1, 2022
    Assignee: ALi Corporation
    Inventors: Ming-Ta Lee, Ching-Chung Cheng
  • Publication number: 20220328458
    Abstract: The disclosure relates to an LED module and an LED display device, including a circuit substrate, and red LEDs, green LEDs and blue LEDs provided on the circuit substrate, among which the number of LEDs with at least one color is more than one; the red LEDs, the green LEDs and the blue LEDs are arranged in the same row or the same column, and the LEDs of the same color are adjacently arranged. According to the disclosure, the Red-Green-Blue LEDs in the LED module are adjusted in the number and arranged with respect to their positions, so that the color contrast and brightness of the LED module are improved.
    Type: Application
    Filed: September 6, 2019
    Publication date: October 13, 2022
    Inventor: CHING-CHUNG CHEN
  • Patent number: 11462641
    Abstract: A method of fabricating a semiconductor device includes: forming a first transistor including: forming a plurality of lightly doped regions in a substrate; forming a first gate structure on the substrate, the first gate structure covering portions of the plurality of lightly doped regions and a portion of the substrate; forming first spacers on sidewalls of the first gate structure; forming doped region in the lightly doped regions; forming an etching stop layer on the substrate; patterning the etching stop layer and the first gate structure to form a second gate structure, and to form a plurality of trenches between the second gate structure and the first spacers; and forming a first dielectric layer on the substrate to cover the etching stop layer and fill the plurality of trenches. The first dielectric layer filled in the trenches is used as virtual spacers.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: October 4, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Ching-Chung Yang
  • Publication number: 20220310692
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure including a photodetector disposed within a substrate. A grid structure is disposed over the substrate and the photodetector. A conductive layer is disposed between the grid structure and the substrate. A conductive contact extends into an upper surface of the substrate. The conductive layer is directly electrically coupled to the conductive contact.
    Type: Application
    Filed: June 16, 2022
    Publication date: September 29, 2022
    Inventors: Ching-Chung Su, Jiech-Fun Lu
  • Publication number: 20220302348
    Abstract: The present disclosure relates to a Micro LED chip, a display panel and a method for welding the Micro LED chip. The Micro LED chip includes an N-type semiconductor layer, a P-type semiconductor layer, an N-type electrode and a P-type electrode, wherein the N-type electrode is arranged on the N-type semiconductor layer, and the P-type electrode is arranged on the P-type semiconductor layer; the N-type electrode includes a first path, the first path penetrating the N-type electrode; and the P-type electrode includes a second path, the second path penetrating the P-type electrode.
    Type: Application
    Filed: December 10, 2019
    Publication date: September 22, 2022
    Inventor: CHING-CHUNG CHEN
  • Publication number: 20220293652
    Abstract: A grid structure in a pixel array may be at least partially angled or tapered toward a top surface of the grid structure such that the width of the grid structure approaches a near-zero width near the top surface of the grid structure. This permits the spacing between color filter regions in between the grid structure to approach a near-zero spacing near the top surfaces of the color filter regions. The tight spacing of color filter regions provided by the angled or tapered grid structure provides a greater surface area and volume for incident light collection in the color filter regions. Moreover, the width of the grid structure may increase at least partially toward a bottom surface of the grid structure such that the wider dimension of the grid structure near the bottom surface of the grid structure provides optical crosstalk protection for the pixel sensors in the pixel array.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 15, 2022
    Inventors: Wei-Lin CHEN, Ching-Chung SU, Chun-Hao CHOU, Kuo-Cheng LEE
  • Publication number: 20220293651
    Abstract: A pixel sensor may include a layer stack to reduce and/or block the effects of plasma and etching on a photodiode and/or other lower-level layers. The layer stack may include a first oxide layer, a layer having a band gap that is approximately less than 8.8 electron-Volts (eV), and a second oxide layer. The layer stack may reduce and/or prevent the penetration and absorption of ultraviolet photons resulting from the plasma and etching processes, which may otherwise cause the formation of electron-hole pairs in the substrate in which the photodiode is included.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 15, 2022
    Inventors: Wei-Lin CHEN, Ching-Chung SU, Chun-Hao CHOU, Kuo-Cheng LEE
  • Patent number: 11444805
    Abstract: A method of transmitting a block from a bridge to a mesh network includes transmitting the block to at least a first node of a plurality of nodes, for distribution through the mesh network. The block includes a plurality of packets. The bridge receives, from the plurality of nodes, a plurality of status packets. Each status packet indicates reception status of the plurality of packets at a respective node of the plurality of nodes. The bridge selects at least a first packet of the plurality of packets for retransmission to the mesh network, based on the status packets. The bridge generates a retransmission block including at least the first packet. The first packet is included in the retransmission block a number of times based on the status packets. The bridge transmits the retransmission block to at least the first node, for distribution of the retransmission block through the mesh network.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: September 13, 2022
    Assignee: WISILICA INC.
    Inventors: Francis Antony, Suresh Singamsetty, Dennis Ching Chung Kwan, Manu Velayudhan
  • Patent number: 11430909
    Abstract: A method includes forming image sensors in a semiconductor substrate. A first alignment mark is formed close to a front side of the semiconductor substrate. The method further includes performing a backside polishing process to thin the semiconductor substrate, forming a second alignment mark on the backside of the semiconductor substrate, and forming a feature on the backside of the semiconductor substrate. The feature is formed using the second alignment mark for alignment.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: August 30, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih Wei Sung, Chung-Bin Tseng, Keng-Ying Liao, Yen-Jou Wu, Po-Zen Chen, Su-Yu Yeh, Ching-Chung Su
  • Patent number: 11403994
    Abstract: A light emitting assembly includes active matrix (AM) light emitting circuits and an AM driver circuit. Each AM light emitting circuit includes at least one light emitting element, at least one shift register and a current control sub-circuit. The at least one shift register is configured to generate a control signal according to the clock signal from a clock line and the data signal from an inter-array data line and the control signal from the at least one shift register. The current control sub-circuit is configured to control the brightness of the at least one light emitting element according to the base current from a current supply line and the control signal. The AM driver circuit is configured to generate the data signal according to a serial data packet, and provide the data signal, the clock signal and the base current to the AM light emitting circuits.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: August 2, 2022
    Inventors: Chin-Chih Cheng, Ching-Chung Cheng
  • Publication number: 20220238636
    Abstract: The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.
    Type: Application
    Filed: May 5, 2021
    Publication date: July 28, 2022
    Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
  • Patent number: 11398557
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first well, a second well, an isolation structure, a first field plate, a gate structure, a drain structure, and a source structure. The first well and the second well adjoin each other. The first well and the second well are disposed in the substrate. The isolation structure is disposed on the first well. The first field plate is disposed on the isolation structure. The gate structure crosses the first well and the second well, and an opening is defined between the first field plate and the gate structure to expose an edge of the isolation structure adjacent to the gate structure. The drain structure is disposed in the first well. The source structure is disposed in the second well.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: July 26, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yi-Ching Chung, Jui-Chun Chang, Fu-Chun Tseng, Yu-Ping Ho
  • Publication number: 20220230580
    Abstract: A light emitting assembly includes active matrix (AM) light emitting circuits and an AM driver circuit. Each AM light emitting circuit includes at least one light emitting element, at least one shift register and a current control sub-circuit. The at least one shift register is configured to generate a control signal according to the clock signal from a clock line and the data signal from an inter-array data line and the control signal from the at least one shift register. The current control sub-circuit is configured to control the brightness of the at least one light emitting element according to the base current from a current supply line and the control signal. The AM driver circuit is configured to generate the data signal according to a serial data packet, and provide the data signal, the clock signal and the base current to the AM light emitting circuits.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 21, 2022
    Inventors: CHIN-CHIH CHENG, CHING-CHUNG CHENG
  • Patent number: 11380728
    Abstract: Various embodiments of the present disclosure are directed towards a method for manufacturing a semiconductor structure. The method includes forming photodetectors within a semiconductor substrate. A charge release layer is deposited over the semiconductor substrate. A conductive contact is formed over the charge release layer such that a contact protrusion of the conductive contact extends through the charge release layer. The charge release layer is disposed along opposing sidewalls of the conductive contact. The charge release layer is electrically coupled to ground via the conductive contact.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: July 5, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Chung Su, Jiech-Fun Lu
  • Publication number: 20220208760
    Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a substrate, a first well region of a first conductive type and a second well region of a second conductive type disposed in the substrate. The first conductive type and the second conductive type are complementary. A plurality of first dummy structures are disposed in the first well region and arranged along a junction between the first well region and the second well region. The first dummy structures respectively include a first conductive region and a first doped region disposed between the first conductive region and the first doped region.
    Type: Application
    Filed: January 31, 2021
    Publication date: June 30, 2022
    Inventors: Chang-Po Hsiung, Ching-Chung Yang, Shan-Shi Huang, Wen-Fang Lee
  • Publication number: 20220206310
    Abstract: The present invention provides a lens driving device, a camera, and an electronic apparatus with a small size, a large correction angle and an excellent hand vibration correction effect. The lens driving device includes a case having an accommodation space, which accommodates a lens module; support frames, support members, and an electromagnetic driving device, for freely rotating the lens module in a direction orthogonal to an optical axis direction; and a base for fixing a circuit board; the electromagnetic driving device is arranged at the support frames and at the base for fixing the circuit board, and is arranged adjacent to a level of a center of gravity of the lens module; and the support frames includes a first support frame and a second support frame, each of the first support frame and the second support frame has different movement axes in a plane and is rotatable freely relative to the base for fixing the circuit board.
    Type: Application
    Filed: March 30, 2021
    Publication date: June 30, 2022
    Inventors: Ching-Chung Chiu, Kazuo Shikama
  • Publication number: 20220206309
    Abstract: The present invention provides a lens driving device, a camera and an electronic apparatus with a small size and an excellent effect in hand vibration correction. The lens driving device includes a case having an accommodation space, in which a lens module is provided. The lens module includes a lens, a lens holder receiving the lens, a support frame for freely rotating the lens holder in a direction orthogonal to an optical axis direction, support members, an electromagnetic driving device, and a base for fixing a circuit board; the electromagnetic driving device is arranged on the lens holder and the base for fixing the circuit board, and is provided adjacent to a level of a center of gravity of the lens module; and the lens module have different movement axes in a plane and is rotatable freely relative to the base for fixing the circuit board.
    Type: Application
    Filed: March 30, 2021
    Publication date: June 30, 2022
    Inventors: Ching-Chung Chiu, Kazuo Shikama