Abstract: A backlight module and a display device are provided. The backlight module includes a light source structure and at least one optical film. The optical film is disposed above the light source structure. The optical film includes a main body and plural optical structures. The optical structures are disposed on the main body. Each of the optical structures is a tapered structure. Each of the optical structures has plural side surfaces, and a portion of light emitted from the light source structure is guided toward plural primary directions when passing through the side surfaces of the optical structures, and therefore the light emitted from the light source is no longer concentrated on the top of each of the optical structures.

Abstract: The present disclosure provides a testing fixture for holding a device under test (DUT). The testing fixture includes a base, a frame, a recessed portion, a plurality of sets of electrical contacts and a plurality of electrical lines. The frame extends upward along an outer perimeter of an upper surface of the base. The recessed portion is surrounded by the frame and the upper surface of the base, and the DUT is received in the recessed portion. The plurality of sets of electrical contacts are disposed on the recessed portion and arranged in a rotationally symmetrical manner, wherein a plurality of plated through holes of the DUT are in contact with one set of the electrical contacts after the DUT is assembled with the testing fixture.

Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region includes multiple alternating well layers and barrier layers, wherein each of the barrier layers has a band gap, the active region further includes an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region, wherein the electron blocking region includes a band gap, and the band gap of the electron blocking region is greater than the band gap of one of the barrier layers; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the electron blocking region; a confinement layer between the fi

Abstract: Provided is a lens driver movable in a direction parallel to an optical axis, arranged on a lens driver movable in a plane orthogonal to the optical axis, and accommodated in a casing. The lens driver includes: a fixture base, a support frame A, a lens module, a spring piece, a first driving coil, a magnet and a yoke. The lens driver includes: a base; a connection terminal and a conductive member A arranged on the base; a support frame B supported by a support part; a conductive member B arranged on the support frame; a center holding part for keeping the base and the support frame B at a center of the optical axis; a second driving coil arranged on the base; and a magnetic detecting element. The lens driver provided can achieve purposes of anti-image dithering and simplifying assembly to obtain good image quality.

Abstract: The present invention discloses a method and a system of vertebral compression fracture detection. The method of vertebral compression fracture detection includes: recombining a plurality of anatomical images captured in at least a spine segment of a target individual into a 3D image; using a multi-planar reconstruction method to reformat the 3D image to obtain at least one sagittal reformatted image; using a classification model to determine whether the sagittal reformatted image covers the middle section of the vertebral column or not; using a vertebral detection method to detect each vertebral body in the sagittal reformatted image covering the middle section of the vertebral column; using a keypoint localization method to localize a plurality of keypoints of each vertebral body which was detected in the sagittal reformatted image; evaluating the compression fracture grade of each vertebral body in the sagittal reformatted image.

Abstract: A semiconductor package includes a first die comprising an upper surface and a lower surface opposite to the upper surface. The first die includes a plurality of through-silicon vias (TSVs) penetrating through the first die. A second die is stacked on the upper surface of the first die. An interposer layer is disposed on the lower surface of the first die. An inductor is disposed in the interposer layer. The inductor comprises terminals directly coupled to the TSVs.

Abstract: The present disclosure provides a method for manufacturing a semiconductor structure, including patterning a photo-sensitive polymer layer with a plurality of trenches by a first mask, the first mask having a first line pitch, patterning a photoresist positioning on a mesa between adjacent trenches by a second mask, the second mask having a second line pitch, the first mask and the second mask having substantially identical pattern topography, and the second line pitch being greater than the first line pitch, and selectively plating conductive material in the plurality of trenches.

Abstract: The disclosure relates to an LED chip, an LED array and an LED packaging method. By adding a reflecting layer on the periphery of the LED, the reflecting layer adjusts the emission direction of light emitted by a light-emitting layer of the LED, so that the adjusted emission direction is more concentrated to a certain required illumination direction, and the light emitted by the light-emitting layer is prevented from irradiating adjacent LEDs and thereby causing interference to the adjacent LEDs. Therefore, according to the method provided by the disclosure, the light field directivity of the emitted light beam is improved, the embodiment is easy to operate with convenient implementation and improved LED performance, providing convenience for a user to use an LED lamp.

Abstract: The present disclosure describes the formation of a pad structure in an image sensor device using a sacrificial isolation region and a silicon oxide based stack with no intervening nitride etch-stop layers. The image sensor device includes a semiconductor layer comprising a first horizontal surface opposite to a second horizontal surface; a metallization layer formed on the second horizontal surface of the semiconductor layer, where the metallization layer includes a dielectric layer. The image sensor device also includes a pad region traversing through the semiconductor layer from the first horizontal surface to the second horizontal surface. The pad region includes an oxide layer with no intervening nitride layers formed on the dielectric layer of the metallization layer and a pad structure in physical contact with a conductive structure of the metallization layer.

Abstract: A transistor structure includes a source region and a drain region disposed in a substrate, extending along a first direction. A polysilicon layer is disposed over the substrate, extending along a second direction perpendicular to the first direction, wherein the polysilicon layer includes a first edge region, a channel region and a second edge region formed as a gate region between the source region and the drain region. The polysilicon layer has at least a first opening pattern at the first edge region having a first portion overlapping the gate region; and at least a second opening pattern at the second edge region having a second portion overlapping the gate region.

Abstract: A volume meter auxiliary module is configured to be assembled on a fluid volume meter. The volume meter auxiliary module includes a first assembly member and a second assembly member. The first assembly member includes a clamping structure configured to fix the first assembly member on the fluid volume meter. The second assembly member is configured to connect with the first assembly member. The second assembly member includes a casing body, a light emitter, an image-capturing piece and a cover. The casing body has a first opening and a second opening. The first opening is located at a bottom of the casing body. The light emitter is disposed inside the casing body. The image-capturing piece is disposed inside the casing body. The cover connects with the casing body and covers the second opening. The cover is rotatable relative to the casing body.

Abstract: A backlight module and a display device are provided. The backlight module includes a light source structure and at least one optical film. The optical film is disposed above the light source structure. The optical film includes a main body and plural optical structures. The optical structures are disposed on the main body. Each of the optical structures is a tapered structure. Each of the optical structures has plural side surfaces, and a portion of light emitted from the light source structure is guided toward plural primary directions when passing through the side surfaces of the optical structures, and therefore the light emitted from the light source is no longer concentrated on the top of each of the optical structures.

Abstract: A position tracking system for Tags to collect relative proximity to other Tags using received signal strength, with methods to reduce power consumption with controlled degradation in overall system performance such as location accuracy and frequency of location updates. Configurable parameters for control of tag functions facilitate performance tradeoffs against application requirements. System architecture using mobile phone and gateway for uploading data enables efficient upload of tag data without user intervention. Applications of the disclosure include self-quarantine, contact tracing, mother-infant pairing, location history tracking, and personnel-asset usage monitoring.

Abstract: The present disclosure provides a semiconductor structure having an ultra thick metal (UTM). The semiconductor structure includes a substrate, a metal layer over the substrate, and an UTM over the metal layer. An area density of the UTM is greater than 40% and a thickness of the UTM is equal to or greater than 6 micrometer. The present disclosure provides a method for manufacturing a semiconductor structure having a UTM. The method includes patterning a dielectric layer with a plurality of trenches by a first mask, patterning a photoresist positioning on a mesa between adjacent trenches by a second mask, and selectively plating conductive materials in the plurality of trenches.

Abstract: A light guide plate includes a main body, stripe structures, and light-adjusting structures. The main body includes a light-incident surface and an optical surface. The stripe structures are disposed on the optical surface. The light-adjusting structures are disposed between two adjacent stripe structures. Each of the light-adjusting structures includes a first light active surface and a second light active surface. The first light active surface faces towards the light-incident surface. The second light active surface faces towards an opposite light-incident surface. The first light active surface and the second light active surface are inclined towards different directions and formed a non-symmetrical shape. A first included angle is formed between the first light active surface and the optical surface. A second included angle is formed between the second light active surface and the optical surface. The first included angle and the second included angle are acute angles.

Abstract: A composition for cross talk between estrogen receptors and cannabinoid receptors including a chelator and a receptor ligand is provided. A method of synthesizing the composition is also provided, and the composition may be further prepared in pharmaceutical formulations or kits for therapy or molecular imaging.

Abstract: A light emitting diode (LED) structure is provided. The LED structure includes a substrate, a first type semiconductor layer, a second type semiconductor layer, and a multi-quantum well light-emitting layer. The first type semiconductor layer is disposed on the substrate. The first type semiconductor layer has a patterned structure layer on a surface of the first type semiconductor layer away from the substrate. The multi-quantum well light-emitting layer is sandwiched between the patterned structure layer and the second type semiconductor layer and covers the patterned structure layer. The multi-quantum well light-emitting layer has multiple first thickness regions, multiple second thickness regions, and multiple transition regions. The first thickness region has a thickness greater than the second thickness region in a vertical direction from the first type semiconductor layer to the second type semiconductor layer.

Abstract: A transistor structure includes a source region and a drain region disposed in a substrate, extending along a first direction. A polysilicon layer is disposed over the substrate, extending along a second direction perpendicular to the first direction, wherein the polysilicon layer includes a first edge region, a channel region and a second edge region formed as a gate region between the source region and the drain region in a plane view. The polysilicon layer has at least a first opening pattern at the first edge region having a first portion overlapping with the gate region; and at least a second opening pattern at the second edge region having a second portion overlapping with the gate region.

Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.

Abstract: A control method of a storage device may include the steps of determining, by a storage device controller of the storage device, whether the storage device has to move internal data; deciding, by the storage device controller, a data movement allocation ratio based on at least some of internal data movement requests and the number of free pages in the storage device, when it is determined that the storage device has to move internal data; and allocating, by the storage device controller, one or more programming times to complete a first data number of internal data movement operations corresponding to at least some of the internal data movement requests and a second data number of host data write operations, such that the ratio of the first and second data numbers coincides with the data movement allocation ratio.