Patents by Inventor Ching Chu

Ching Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11844245
    Abstract: The disclosure provides a display device, including a substrate, a plurality of power lines and a pixel define layer. The plurality of power lines disposed on the substrate. The pixel define layer is disposed on the substrate, wherein the pixel define layer includes a first opening region and a second opening region. In a top view, the first opening region is adjacent to the second opening region, the first opening region overlaps a first power line of the plurality of power lines to define a first overlapping area, the second opening region overlaps a second power line of the plurality of power lines to define a second overlapping area, and the first overlapping area is different from the second overlapping area.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: December 12, 2023
    Assignee: Innolux Corporation
    Inventors: Hsia-Ching Chu, Pai-Chiao Cheng
  • Publication number: 20230389320
    Abstract: The present disclosure provides a semiconductor structure and a method for forming a semiconductor structure. The semiconductor structure includes a substrate, and a dielectric stack over the substrate. The dielectric stack includes a first layer over the substrate and a second layer over the first layer. The semiconductor structure further includes a gate layer including a first portion traversing the second layer and a second portion extending between the first layer and the second layer.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventors: Feng-Ching Chu, Feng-Cheng Yang, Katherine H. Chiang, Chung-Te Lin, Chieh-Fang Chen
  • Publication number: 20230377987
    Abstract: A method of fabricating a fin-like field effect transistor (FinFET) device includes providing a semiconductor substrate having a region for forming p-type metal-oxide-semiconductor (PMOS) devices and a region for forming n-type metal-oxide-semiconductor (PMOS) devices, forming fin structures in both regions of the substrate separated by isolation features, first forming source/drain (S/D) features in the PMOS region, and subsequently forming S/D features in the NMOS region. First forming the PMOS S/D features and then forming the NMOS S/D features results in a greater extent of loss of isolation features in the PMOS region than in the NMOS region.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 23, 2023
    Inventors: Feng-Ching Chu, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20230378290
    Abstract: A semiconductor device includes a fin stack, a gate structure on the fin stack, a source region on a first side of the gate structure, a drain region on a second side of the gate structure opposite the first side, and a source contact extending to and connecting the source region. The source region and the drain region are asymmetric.
    Type: Application
    Filed: August 4, 2023
    Publication date: November 23, 2023
    Inventors: Feng-Ching Chu, Wei-Yang Lee, Chia-Pin Lin
  • Patent number: 11810825
    Abstract: A method of fabricating a fin-like field effect transistor (FinFET) device includes providing a semiconductor substrate having a region for forming p-type metal-oxide-semiconductor (PMOS) devices and a region for forming n-type metal-oxide-semiconductor (PMOS) devices, forming fin structures in both regions of the substrate separated by isolation features, first forming source/drain (S/D) features in the PMOS region, and subsequently forming S/D features in the NMOS region. First forming the PMOS S/D features and then forming the NMOS S/D features results in a greater extent of loss of isolation features in the PMOS region than in the NMOS region.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: November 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Feng-Ching Chu, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20230329045
    Abstract: A display device includes: a substrate; a metal layer disposed on the substrate; an insulating layer disposed on the metal layer; and a first light emitting diode including a first electrode disposed on the metal layer, wherein a via hole passes through the insulating layer, the first electrode electrically connects to the metal layer through the via hole, and an outline of the via hole includes an arc edge.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 12, 2023
    Inventors: Lien-Hsiang CHEN, Kung-Chen KUO, Sheng-Kai HSU, Hsia-Ching CHU, Mei-Chun SHIH
  • Publication number: 20230327036
    Abstract: A solar cell structure includes a semiconductor substrate having a front side and a back side. A pyramid structure is disposed on the front side of the semiconductor substrate. The pyramid structure has an aspect ratio between 0.5-1.2. A front passivation layer is disposed on the pyramid structure. A first anti-reflection layer is disposed on the pyramid structure. The first anti-reflection layer is a multi-layered, graded anti-reflection layer having at least three coating layers. The at least three coating layers comprise a silicon oxynitride layer having a thickness of 15-30 nm and a refractive index between 1.65 and 1.75. The silicon oxynitride layer is an outermost layer of the multi-layered, graded anti-reflection layer.
    Type: Application
    Filed: June 7, 2023
    Publication date: October 12, 2023
    Applicant: TSEC Corporation
    Inventors: Cheng-Wen Kuo, Yung-Chih Li, Ying-Quan Wang, Sheng-Kai Wu, Wen-Ching Chu, Ta-Ming Kuan, Hung Cheng, Jen-Ho Kang, Cheng-Yeh Yu
  • Patent number: 11769820
    Abstract: Methods and devices formed thereof that include a fin structure extending from a substrate and a gate structure is formed over the fin structure. An epitaxial feature is formed over the fin structure adjacent the gate structure. The epitaxial feature can include a hollow region (or dielectric filled hollow region) in the epitaxial source/drain region. A selective etching process is performed to remove at least a portion of an epitaxial region having a second dopant type to form the hollow area between the first epitaxial portion and the third epitaxial portion.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: September 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Ching Chu, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20230270653
    Abstract: The present invention relates to a novel use of trehalose. More particularly the present invention relates to a novel use of trehalose for promoting scalp health. Accordingly, the present invention provides use of trehalose as prebiotic for inhibiting ailment inducing microorganisms when applied on an external surface of a human body.
    Type: Application
    Filed: June 11, 2021
    Publication date: August 31, 2023
    Applicant: Conopco, Inc., d/b/a UNILEVER
    Inventors: Chung-Ching CHU, Mingming PU, Qin YIN, Xueyang YUE
  • Patent number: 11735602
    Abstract: The disclosed display device includes: a substrate; a gate electrode disposed on the substrate; a data line disposed on the substrate and extending along an extension direction; and a connecting member disposed on the substrate and electrically connecting to the gate electrode, wherein the connecting member includes a first part overlapped with the gate electrode and a second part not overlapped with the gate electrode, and a minimum width of the second part in a direction perpendicular to the extension direction is less than a maximum width of the first part in the direction.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: August 22, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Yun-Sheng Chen, Hsia-Ching Chu, Ming-Chien Sun
  • Publication number: 20230253450
    Abstract: A semiconductor structure includes an isolation structure; first and second source/drain (S/D) features over the isolation structure, defining a first direction from the first S/D feature to the second S/D feature from a top view; one or more channel layers connecting the first and the second S/D features; a gate structure between the first and the second S/D features and engaging each of the one or more channel layers; and a via structure under the first S/D feature and electrically connecting to the first S/D feature. In a cross-sectional view perpendicular to the first direction, the via structure has a profile that widens and then narrows along a bottom-up direction.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Inventors: Feng-Ching Chu, Wei-Yang Lee, Chia-Pin Lin
  • Patent number: 11723239
    Abstract: A display device includes: a substrate; a data line disposed on the substrate; an another data line disposed on the substrate and adjacent to the data line; a first light emitting diode including a first electrode; and a second light emitting diode including an another first electrode, wherein the first electrode partially overlaps the data line, the another first electrode partially overlaps the another data line, and an area of the first electrode and an area of the another first electrode are different.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: August 8, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Lien-Hsiang Chen, Kung-Chen Kuo, Sheng-Kai Hsu, Hsia-Ching Chu, Mei-Chun Shih
  • Publication number: 20230244110
    Abstract: A semiconductor substrate includes: a substrate; a first conductive line disposed on the substrate and extending along a first direction; a semiconductor layer disposed on the substrate; an electrode disposed on the semiconductor layer and including an arc edge outside the first conductive line; and a conductive layer disposed on the electrode, wherein a part of the semiconductor layer extends along a second direction different from the first direction and the arc edge overlaps the part of the semiconductor layer.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 3, 2023
    Inventors: Tsung-Han TSAI, Hsia-Ching CHU, Mei-Chun SHIH
  • Publication number: 20230207576
    Abstract: A substrate assembly includes: a substrate; a gate structure disposed on the substrate; a conductive line disposed on the substrate, wherein from a top view, the conductive line extends along a first direction; and a conductive structure disposed on the substrate, wherein from the top view, the conductive structure is adjacent to the conductive line and separated from the conductive line, and the conductive structure has an overlapping region overlapping the gate structure, wherein from the top view, the overlapping region extends along a second direction, the first direction and the second direction are different, the overlapping region comprises a first end portion, and the first end portion has a curved shape.
    Type: Application
    Filed: March 1, 2023
    Publication date: June 29, 2023
    Inventors: An-Chang WANG, Bo-Chin TSUEI, Hsia-Ching CHU, Ming-Chien SUN
  • Publication number: 20230190610
    Abstract: Disclosed is a topical composition comprising: (i) an antimicrobial active which is at least one of piroctone, caprylhydroxamic acid, benzohydroxamic acid, or piroctone olamine; and (ii) Febrifugine. Also disclosed is a non-therapeutic method of providing topical antimicrobial benefit on a topical surface of a human or animal body comprising a step of applying a safe and effective amount of the topical composition.
    Type: Application
    Filed: June 8, 2021
    Publication date: June 22, 2023
    Applicant: Conopco, Inc., d/b/a UNILEVER
    Inventors: Mingming PU, Zongxiu WANG, Chung-Ching CHU
  • Publication number: 20230190607
    Abstract: Disclosed is a topical composition comprising: (i) an antimicrobial active which is at least one of piroctone, caprylhydroxamic acid, benzohydroxamic acid, or piroctone olamine; and (ii) norbraylin. Also disclosed is a non-therapeutic method of providing topical antimicrobial benefit on a topical surface of a human or animal body comprising a step of applying a safe and effective amount of the topical composition.
    Type: Application
    Filed: June 1, 2021
    Publication date: June 22, 2023
    Applicant: Conopco, Inc., d/b/a UNILEVER
    Inventors: Chung-Ching CHU, Mingming PU, Zongxiu WANG
  • Publication number: 20230185395
    Abstract: The disclosure provides a display panel including a substrate, an active layer, a first electrode layer, a common electrode layer, a cathode layer, and a spacer. The active layer is located on the substrate. The first electrode layer is located on the active layer, and the first electrode layer includes a first gate and a second gate. The common electrode layer is located on the first electrode layer. The common electrode layer has a first region, a second region, and a first necking region. The first necking region connects the first region and the second region. The first region and the first gate are correspondingly disposed, and the second region and the second gate are correspondingly disposed. The cathode layer is located on the common electrode layer. The spacer is located between the common electrode layer and the cathode layer. The spacer and the first necking region are correspondingly disposed.
    Type: Application
    Filed: February 6, 2023
    Publication date: June 15, 2023
    Applicant: Innolux Corporation
    Inventors: Chung-Wen Yen, Hsia-Ching Chu, Kuan-Feng Lee, Yu-Sheng Tsai
  • Publication number: 20230161240
    Abstract: In a method of manufacturing a reflective mask, an adhesion layer is formed over a mask blank. The mask blank includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an absorber layer disposed over the capping layer, and a hard mask layer disposed over the absorber layer. A photoresist pattern is formed over the adhesion layer, the adhesion layer is patterned, the hard mask layer is patterned, and the absorber layer is patterned using the patterned hard mask layer as an etching mask. The photoresist layer has a higher adhesiveness to the adhesion layer than to the hard mask layer.
    Type: Application
    Filed: May 4, 2022
    Publication date: May 25, 2023
    Inventors: Wei-Che HSIEH, Chia-Ching CHU, Ya-Lun CHEN, Yu-Chung SU, Tzu-Yi WANG, Yahru CHENG, Ta-Cheng LIEN, Hsin-Chang LEE, Ching-Yu CHANG
  • Patent number: 11656507
    Abstract: A thin film transistor substrate comprises: a substrate; a scan line disposed on the substrate and extending along a first direction; a semiconductor layer disposed on the scan line; and a drain electrode disposed on the semiconductor layer and comprising an arc edge outside the scan line, wherein a part of the semiconductor layer extends along a second direction perpendicular to the first direction and the arc edge overlaps the part of the semiconductor layer.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: May 23, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Tsung-Han Tsai, Hsia-Ching Chu, Mei-Chun Shih
  • Patent number: 11648233
    Abstract: The present invention is related to an active substance of Hericium erinaceus having a pain-relieving effect, and a pharmaceutical composition including the active substance. The active substance is prepared using the following steps: (a) inoculating a mycelium of H. erinaceus on an agar plate and incubating at 15-32° C. for 8-16 days; (b) inoculating the incubated H. erinaceus mycelia from step (a) into a medium in a flask and incubating at 20-30° C. and pH 4.5-6.5 for 3-5 days; (c) inoculating the incubated H. erinaceus mycelia from step (b) into a medium in a fermentation tank and incubating at 24-32° C. and pH 4.5-5.5 for 8-16 days to obtain a fermented medium of the H. erinaceus mycelia; and (d) desiccating the fermented medium of the H. erinaceus mycelia from step (c) to obtain the powder of the H. erinaceus mycelia, which is further purified and isolated to obtain a novel compound of H. erinaceus.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: May 16, 2023
    Assignee: GRAPE KING BIO LTD.
    Inventors: Pei-Shan Liu, Chien-Chih Chen, Chin-Chu Chen, Li-Ya Lee, Wan-Ping Chen, Ting-Wei Lin, Jui-Hsia Hsu, Wei-Ching Chu