Abstract: A method includes providing a structure having first and second fins over a substrate and oriented lengthwise generally along a first direction and source/drain (S/D) features over the first and second fins; forming an interlayer dielectric (ILD) layer covering the S/D features; performing a first etching process at least to an area between the S/D features, thereby forming a trench in the ILD layer; depositing a dielectric material in the trench; performing a second etching process to selectively recess the dielectric material; and performing a third etching process to selectively recess the ILD layer, thereby forming a contact hole that exposes the S/D features.

Abstract: Methods for performing a pre-clean process to remove an oxide in semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a shallow trench isolation region over a semiconductor substrate; forming a gate stack over the shallow trench isolation region; etching the shallow trench isolation region adjacent the gate stack using an anisotropic etching process; and after etching the shallow trench isolation region with the anisotropic etching process, etching the shallow trench isolation region with an isotropic etching process, process gases for the isotropic etching process including hydrogen fluoride (HF) and ammonia (NH3).

Abstract: A method for fabricating a semiconductor device that includes a merged source/drain feature extending between two adjacent fin structures. An air gap is formed under the merged source/drain feature. Forming the epitaxial feature includes growing a first epitaxial feature having a first portion over the first fin structure and a second portion over the second fin structure, growing a second epitaxial feature over the first and second portions of the first epitaxial feature, and growing a third epitaxial feature over the second epitaxial feature. The second epitaxial feature includes a merged portion between the first fin structure and the second fin structure.

Abstract: Various examples of an integrated circuit device and a method for forming the device are disclosed herein. In an example, a method includes receiving a workpiece that includes a substrate, and a device fin extending above the substrate. The device fin includes a channel region. A portion of the device fin adjacent the channel region is etched, and the etching creates a source/drain recess and forms a dielectric barrier within the source/drain recess. The workpiece is cleaned such that a bottommost portion of the dielectric barrier remains within a bottommost portion of the source/drain recess. A source/drain feature is formed within the source/drain recess such that the bottommost portion of the dielectric barrier is disposed between the source/drain feature and a remainder of the device fin.

Abstract: The disclosed display device includes: a substrate; a gate electrode disposed on the substrate, wherein a first projection is defined by projecting the gate electrode on the substrate; and a connecting member disposed on the gate electrode and electrically connecting to the gate electrode, wherein a second projection is defined by projecting the connecting member on the substrate, an overlapping region is defined as a region of the second projection overlapping the first projection, and an area of the first projection is greater than an area of the overlapping region.

Abstract: A touch device is provided, including a first substrate and a circuit substrate. The first substrate includes a touch sensing structure and a plurality of first electrodes. The touch sensing structure is disposed on the first substrate. The first electrodes are arranged along a first direction. The first electrodes are disposed on the first substrate and electrically connected to the touch sensing structure, a first gap is formed between two adjacent first electrodes, and a minimum distance between the two adjacent first electrodes is a gap distance. The circuit substrate is partially overlapping the substrate in a vertical projection direction, the circuit substrate including a plurality of second electrodes corresponding to the first electrodes. One of the two adjacent first electrodes has a first electrode side edge facing the first gap. One of the second electrodes has a second electrode side edge located in the first gap.

Abstract: The present invention provides a housing having a housing shell with an opening, a guidance component and a door leaf set. The guidance component is arranged in the housing shell and extending along the direction away from the opening. The door leaf set has a first door leaf and a second door leaf. The first door leaf is pivotally connected the housing shell to enable the first door leaf to rotate to a first position or a second position relative to the opening. Wherein when the first door leaf is positioned at the first position, the first door leaf shields a portion of the opening; when the first door leaf is positioned at the second position, the first door leaf extends into the housing shell and defines the first installation space with the guiding component.

Abstract: A pixel circuit including a compensation circuit, a writing circuit, a light emitting element, and a power supplying circuit is provided. The compensation circuit comprises a first node, and provides a driving current to the light emitting element according to a voltage of the first node and a system high voltage. The writing circuit provides a data voltage to the compensation circuit according to a first control signal so that the compensation circuit sets the voltage of the first node. The power supplying circuit selectively couples the compensation circuit to the light emitting element, and provides the system high voltage and a system low voltage to the compensation circuit, in which the system low voltage is configured to reset the voltage of the first node. The first control signal and the second control signal are opposite to the first emission signal and the second emission signal, respectively.

Abstract: In an embodiment, a method includes: forming a first gate stack and a second gate stack on a fin; etching the fin to form a recess in the fin between the first gate stack and the second gate stack; forming an epitaxial source/drain region in the recess, the forming including: forming a first layer lining sides and a bottom of the recess by dispensing silane, dichlorosilane, trichlorosilane, and hydrochloric acid in the recess; and after forming the first layer, forming a second layer on the first layer by dispensing the silane, dichlorosilane, trichlorosilane, and hydrochloric acid in the recess, where each of the silane, dichlorosilane, trichlorosilane, and hydrochloric acid are dispensed at a first flow rate when forming the first layer and at a second flow rate when forming the second layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin structure and a second fin structure extended above a substrate, and a first source/drain structure formed over the first fin structure. The first source/drain structure is made of an N-type conductivity material. The semiconductor device structure also includes a second source/drain structure formed over the second fin structure, and the second source/drain structure is made of an P-type conductivity material The semiconductor device structure also includes a cap layer formed over the first source/drain structure, wherein the cap layer is made of P-type conductivity material.

Abstract: The disclosure provides a display panel including a substrate, an active layer, a first electrode layer, a common electrode layer, a cathode layer, and a spacer. The active layer is located on the substrate. The first electrode layer is located on the active layer, and the first electrode layer includes a first gate and a second gate. The common electrode layer is located on the first electrode layer. The common electrode layer has a first region, a second region, and a first necking region. The first necking region connects the first region and the second region. The first region and the first gate are correspondingly disposed, and the second region and the second gate are correspondingly disposed. The cathode layer is located on the common electrode layer. The spacer is located between the common electrode layer and the cathode layer. The spacer and the first necking region are correspondingly disposed.

Abstract: A touch device is provided, including a first substrate, a touch sensing structure, a plurality of first electrodes, a first register mark and a circuit board. The touch sensing structure is disposed on the first substrate. The first electrodes are disposed on the first substrate and arranged along a first direction, wherein a portion of the first electrodes are electrically connected to the touch sensing structure. The first register mark is disposed on the first substrate. The circuit board is partially overlapping the first substrate in a vertical projection direction and electrically connected to the portion of the first electrodes.

Abstract: A display device is disclosed, which includes: a first substrate; a plurality of scan lines and a plurality of data lines, wherein the plurality of scan lines intersects with the plurality of data lines, the plurality of scan lines and the plurality of data lines are disposed above the first substrate, and the plurality of scan lines extend along a first direction; a common electrode disposed above the first substrate, wherein the common electrode has a first part extending along the first direction, a second part substantially parallels to the one of the plurality of data lines, and the first part connects to the second part.

Abstract: A display panel includes a first scan line and a second scan line adjacent to the first scan line disposed on the first substrate. A common electrode line is adjacent to the first scan line or the second scan line. The common electrode line has an enlarged portion, and an extending direction of the common electrode line is substantially the same as an extending direction of the first scan line. A first data line and a second data line adjacent to the first data line are disposed on the first substrate. In a direction perpendicular to the extending direction of the common electrode line, the enlarged portion has a maximum width, a part of the common electrode line overlapping the first data line has a maximum width, and the maximum width of the enlarged portion is greater than the maximum width of the first data line.

Abstract: A camera module includes multiple camera units, a bracket, and multiple mounting rods. Each of the camera units includes a main body and a lens on the main body. The main body includes two protrusions. The two protrusions protrude from opposite sides of the main body. Each of the two protrusions includes a fixing hole. The bracket is mounted in an electronic device and includes multiple mounting holes and multiple mounting grooves disposing in a surface of the bracket. Each two of the multiple mounting grooves connect with corresponding mounting holes at opposite sides of the mounting holes. The mounting rods protrude from the mounting grooves. When the mounting holes receive the camera units, the corresponding mounting grooves receive the corresponding protrusions and the mounting rods pass through the corresponding fixing holes.

Abstract: A fixing device for fixing a display card on a circuit board, includes a backplane and a support bracket. The backplane includes a substrate plate, and a first engaging part. The substrate plate is fixed on the display card. The first engaging part is disposed on the substrate plate. The support bracket includes at least one support leg and a second engaging part. The support leg includes a first end and a second end. The first end is connected with the circuit board. The second engaging part is connected with the second end and engaged with the first engaging part.

Abstract: The present disclosure provides a fusion protein comprising a fucosidase or a truncated fragment or a mutant thereof fuses with either N-terminal end or C-terminal end of the endoglycosidase or a truncated fragment of mutant thereof. The present disclosure also provides a nucleic acid molecule expressing the fusion protein and a method for remodeling a glycan of an antibody Fc region.

Abstract: This invention relates to an antimicrobial composition, especially one which provides synergistic anti-dandruff or anti-acne efficacy. This is achieved through a judicious combination of select essential oil actives chosen from thymol, or terpineol and certain antimicrobial lipids selected from sapienic acid, palmitoleic acid, sphingosine, dihydrosphingosine, phytosphingosine, and 6-hydroxysphingosine. These compositions can be delivered through very many different types of personal care products e.g. shampoo, conditioner; face wash or hand wash product; or a leave on cream/lotion.

Abstract: The disclosure provides a display panel including a substrate, an active layer, a first electrode layer, a common electrode layer, a cathode layer, and a spacer. The active layer is located on the substrate. The first electrode layer is located on the active layer, and the first electrode layer includes a first gate and a second gate. The common electrode layer is located on the first electrode layer. The common electrode layer has a first region, a second region, and a first necking region. The first necking region connects the first region and the second region. The first region and the first gate are correspondingly disposed, and the second region and the second gate are correspondingly disposed. The cathode layer is located on the common electrode layer. The spacer is located between the common electrode layer and the cathode layer. The spacer and the first necking region are correspondingly disposed.