Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11846871
    Abstract: Various embodiments of the present disclosure provide a method for forming a recessed gate electrode that has high thickness uniformity. A gate dielectric layer is deposited lining a recess, and a multilayer film is deposited lining the recess over the gate dielectric layer. The multilayer film comprises a gate electrode layer, a first sacrificial layer over the gate dielectric layer, and a second sacrificial layer over the first sacrificial dielectric layer. A planarization is performed into the second sacrificial layer and stops on the first sacrificial layer. A first etch is performed into the first and second sacrificial layers to remove the first sacrificial layer at sides of the recess. A second etch is performed into the gate electrode layer using the first sacrificial layer as a mask to form the recessed gate electrode. A third etch is performed to remove the first sacrificial layer after the second etch.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: December 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Shu Huang, Ming Chyi Liu, Tung-He Chou
  • Patent number: 11844705
    Abstract: An implant guide system for hip replacement surgery includes an angle guide member and a first positioning plate. The angle guide member has a body and a protrusion that are substantially connected to each other. The body has a curved surface corresponding in shape to a surface of a patient's acetabulum. The protrusion has a first through hole extending to the body. An acute angle is defined between an extension line of the first through hole and a flat surface of the body. The first positioning plate has a first holding portion and a first spacing portion that are substantially connected to each other. The first spacing portion has a second through hole, a third through hole and a fourth through hole that are parallel to each other.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: December 19, 2023
    Assignees: UNITED ORTHOPEDIC CORPORATION, CHINA MEDICAL UNIVERSITY
    Inventors: Jiann-Jong Liau, Chih-Hao Chang, Kui-Chou Huang, Yi-Wen Chen, Cheng-Ting Shih
  • Patent number: 11846582
    Abstract: Among other things, the present invention is related to devices and methods for improving optical analysis of a thin layer of a sample sandwiched between containing between two plates.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: December 19, 2023
    Assignee: Essenlix Corporation
    Inventors: Stephen Y. Chou, Wei Ding, Ji Qi, Jun Tian, Wu Chou
  • Patent number: 11846999
    Abstract: A portable electronic device including a first body, a second body and a supporting mechanism is provided. The first body has a bottom surface and an opening located at the bottom surface. The second body is pivoted to the first body and has a rear surface and a magnetic part located at the rear surface. The supporting mechanism is disposed in the first body corresponding to the opening. The rear surface of the second body is rotated toward the bottom surface of the first body to allow the supporting mechanism to be magnetically attracted to the magnetic part. Afterwards, the rear surface of the second body is rotated away from the bottom surface of the first body, and the supporting mechanism is driven by the second body to move out of the first body via the opening. When the supporting mechanism is locked, a support shaft supports the second body.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: December 19, 2023
    Assignee: Acer Incorporated
    Inventors: Chun-Hung Wen, Chun-Hsien Chen, Hui-Ping Sun, Yen-Chou Chueh
  • Patent number: 11845920
    Abstract: The present disclosure relates to a microfluidic devices and methods for culturing bone marrow cells. Aspects include methods of preparing microfluidic devices and culturing bone marrow cells with the microfluidic devices. In some aspects, a method includes providing a microfluidic device having an upper chamber, a lower chamber, and a porous membrane separating the upper chamber from the lower chamber. The method further includes seeding walls of the lower chamber and a bottom surface of the membrane with endothelial cells. The method further includes providing a matrix within the upper chamber. The matrix includes fibrin gel and bone marrow cells. The method further includes filling or perfusing the upper chamber with a media.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: December 19, 2023
    Assignees: President and Fellows of Harvard College, The General Hospital Corporation
    Inventors: David Benson Chou, Liliana S. Teixeira Moreira Leijten, Arianna Rech, Richard Novak, Donald E. Ingber, Yuka Milton, Viktoras Frismantas, Oren Levy
  • Publication number: 20230398545
    Abstract: One aspect of the present invention is to provide the device and methods for performing an assay that uses the multiplexing of sample thicknesses on the same plate. The sample thickness multiplexing can offer many information that is unavailable in using a single sample thickness.
    Type: Application
    Filed: August 15, 2023
    Publication date: December 14, 2023
    Applicant: Essenlix Corporation
    Inventors: Stephen Y. CHOU, Wei DING, Ji Qi, Yufan Zhang
  • Publication number: 20230400745
    Abstract: A method of characterizing a traveling-wave Mach-Zehnder modulator (TWMZM) includes measuring an electrooptic parameter, such as S21, of a test structure including a test TWMZM and a first instance of electrical pads which are connected to deliver a radio frequency (RF) signal to electrooptically modulate light traveling through the test TWMZM. The electrooptic parameter is similarly measured of a reference structure including a reference TWMZM and a second instance of the electrical pads which are connected to deliver the RF signal to electrooptically modulate light traveling through the reference TWMZM. A vestigial traveling-wave electrooptic phase modulator of the reference TWMZM is shorter than a traveling-wave electrooptic phase modulator of the test TWMZM. An electrooptic characteristic of the test TWMZM, such as S21 bandwidth, is determined by operations including subtracting the measured electrooptic S21 of the reference structure from the measured electrooptic S21 of the test structure.
    Type: Application
    Filed: June 8, 2022
    Publication date: December 14, 2023
    Inventors: Ming Yang Jung, Lan-Chou Cho, Stefan Rusu
  • Publication number: 20230402478
    Abstract: Apparatus and methods for sensing long wavelength light are described herein. A semiconductor device includes: a carrier; a device layer on the carrier; a semiconductor layer on the device layer, and an insulation layer on the semiconductor layer. The semiconductor layer includes isolation regions and pixel regions. The isolation regions are or include a first semiconductor material. The pixel regions are or include a second semiconductor material that is different from the first semiconductor material.
    Type: Application
    Filed: August 9, 2023
    Publication date: December 14, 2023
    Inventors: Yun-Wei CHENG, Chun-Hao Chou, Kuo-Cheng Lee, Ying-Hao Chen
  • Publication number: 20230402057
    Abstract: A voice activity detection (VAD) system includes a voice frame detector that detects a voice frame during which a voice signal is not silent; and a voice detector that detects presence of human speech according to the voice frame.
    Type: Application
    Filed: June 14, 2022
    Publication date: December 14, 2023
    Inventors: Ching-Han Chou, Ti-Wen Tang, Bo-Ying Huang
  • Publication number: 20230402452
    Abstract: A method of generating an IC layout diagram includes positioning a resistor unit cell in the IC layout diagram, a resistor of the resistor unit cell including a source/drain metal region, positioning a MOS unit cell in the IC layout diagram, overlapping the resistor unit cell with a first via region, overlapping the MOS unit cell with a second via region, overlapping the first and second via regions with a continuous conductive region, and storing the IC layout diagram in a storage device.
    Type: Application
    Filed: August 10, 2023
    Publication date: December 14, 2023
    Inventors: Po-Zeng KANG, Wen-Shen CHOU, Yung-Chow PENG
  • Publication number: 20230402479
    Abstract: A pixel sensor may include a main deep trench isolation (DTI) structure and one or more sub-DTI structures in a substrate of the pixel sensor to increase the quantum efficiency of the pixel sensor at large incident angles. The one or more sub-DTI structures may be located within the perimeter of the main DTI structure and above a photodiode. The one or more sub-DTI structures may be configured to provide a path of travel for incident light into the photodiode from large incident angles in that the one or more sub-DTI structures may be filled with an oxide material to increase light penetration into the one or more sub-DTI structures. This may reduce reflections at a top surface of the substrate, thereby permitting incident light to refract into the substrate and toward the photodiode.
    Type: Application
    Filed: August 7, 2023
    Publication date: December 14, 2023
    Inventors: Wei-Lin CHEN, Chun-Hao CHOU, Kuo-Cheng LEE
  • Publication number: 20230402278
    Abstract: A method of forming a semiconductor device includes following operations. A substrate is provided with a gate stack thereon, an epitaxial layer therein, and a dielectric layer aside the gate stack and over the epitaxial layer. An opening is formed through the dielectric layer, and the opening exposes the epitaxial layer. A metal silicon-germanide layer is formed on the epitaxial layer, wherein the metal silicon-germanide layer includes a metal having a melting point of about 1700° C. or higher. A connector is formed over the metal silicon-germanide layer in the opening.
    Type: Application
    Filed: June 12, 2022
    Publication date: December 14, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Ming Tsai, Wei-Yip Loh, Harry CHIEN, Chih-Shiun Chou, Hong-Mao Lee, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20230402075
    Abstract: A memory device is provided, the memory device includes multiple cells arranged in a matrix of multiple rows and multiple columns. The memory device further includes multiple bit lines each of which is connected to first cells of the multiple cells arranged in a row of the multiple rows. A voltage control circuit is connectable to a selected bit line of the multiple bit lines and includes a voltage detection circuit that detects an instantaneous supply voltage and a voltage source selection circuit connected to the voltage detection circuit. The voltage source selection circuit selects a voltage source from multiple voltage sources based on the detected instantaneous supply voltage. The voltage source selection circuit includes a switch that connects the selected voltage source to the selected bit line to provide a write voltage.
    Type: Application
    Filed: August 18, 2023
    Publication date: December 14, 2023
    Inventors: CHIEN-AN LAI, CHUNG-CHENG CHOU, YU-DER CHIH
  • Publication number: 20230401885
    Abstract: Optical sensors and their making methods are described herein. In some embodiments, a described sensing apparatus includes: an image sensor; a collimator above the image sensor, wherein the collimator includes an array of apertures; and an optical filtering layer above the collimator, wherein the optical filtering layer is configured to filter a portion of light to be transmitted into the array of apertures.
    Type: Application
    Filed: August 10, 2023
    Publication date: December 14, 2023
    Inventors: You-Cheng JHANG, Han-Zong PAN, Wei-Ding WU, Jiu-Chun WENG, Hsin-Yu CHEN, Cheng-San CHOU, Chin-Min LIN
  • Publication number: 20230402508
    Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The semiconductor device includes a substrate, a fin base disposed on the substrate, a stack of nanostructured channel regions disposed on a first portion of the fin base, a gate structure surrounding the nanostructured channel regions, a source/drain (S/D) region disposed on a second portion of the fin base, an air spacer disposed between the S/D region and the fin base, and a dielectric layer disposed between the air spacer and the fin base.
    Type: Application
    Filed: March 29, 2023
    Publication date: December 14, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Wei CHANG, Shahaji B. MORE, Lun-Kuang TAN, Chi-Yu CHOU, Yueh-Ching PAI
  • Publication number: 20230403474
    Abstract: An image sensor device has a first number of first pixels disposed in a substrate and a second number of second pixels disposed in the substrate. The first number is substantially equal to the second number. A light-blocking structure disposed over the first pixels and the second pixels. The light-blocking structure defines a plurality of first openings and second openings through which light can pass. The first openings are disposed over the first pixels. The second openings are disposed over the second pixels. The second openings are smaller than the first openings. A microcontroller is configured to turn on different ones of the second pixels at different points in time.
    Type: Application
    Filed: August 3, 2023
    Publication date: December 14, 2023
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Hsin-Chi Chen
  • Publication number: 20230402483
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor device including a first image sensor element and a second image sensor element disposed within a substrate. An interconnect structure is disposed along a front-side surface of the substrate and comprises a plurality of conductive wires, a plurality of conductive vias, and a first absorption structure. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths. The second image sensor element is configured to generate electrical signals from the electromagnetic radiation within a second range of wavelengths that is different than the first range of wavelengths. The second image sensor element is laterally adjacent to the first image sensor element. Further, the first image sensor element overlies the first absorption structure and is spaced laterally between opposing sidewalls of the first absorption structure.
    Type: Application
    Filed: August 8, 2023
    Publication date: December 14, 2023
    Inventors: Keng-Yu Chou, Cheng Yu Huang, Chun-Hao Chuang, Wen-Hau Wu, Wei-Chieh Chiang, Wen-Chien Yu, Chih-Kung Chang
  • Publication number: 20230400639
    Abstract: Disclosed are edge couplers having a high coupling efficiency and low polarization dependent loss, and methods of making the edge couplers. In one embodiment, a semiconductor device for optical coupling is disclosed. The semiconductor device includes: a substrate; an optical waveguide over the substrate; and a plurality of layers over the optical waveguide. The plurality of layers includes a plurality of coupling pillars disposed at an edge of the semiconductor device. The plurality of coupling pillars form an edge coupler configured for optically coupling the optical waveguide to an optical fiber placed at the edge of the semiconductor device.
    Type: Application
    Filed: August 9, 2023
    Publication date: December 14, 2023
    Inventors: Min-Hsiang HSU, Chewn-Pu Jou, Chan-Hong Chern, Cheng-Tse Tang, Yung-Jr Hung, Lan-Chou Cho
  • Patent number: D1007928
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: December 19, 2023
    Assignee: Botrista Technology, Inc.
    Inventors: Yu-Min Lee, Carl Johan Uno Hagerling, Wu-Chou Kuo
  • Patent number: D1007929
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: December 19, 2023
    Assignee: Botrista Technology, Inc.
    Inventors: Yu-Min Lee, Carl Johan Uno Hagerling, Wu-Chou Kuo