Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230402278
    Abstract: A method of forming a semiconductor device includes following operations. A substrate is provided with a gate stack thereon, an epitaxial layer therein, and a dielectric layer aside the gate stack and over the epitaxial layer. An opening is formed through the dielectric layer, and the opening exposes the epitaxial layer. A metal silicon-germanide layer is formed on the epitaxial layer, wherein the metal silicon-germanide layer includes a metal having a melting point of about 1700° C. or higher. A connector is formed over the metal silicon-germanide layer in the opening.
    Type: Application
    Filed: June 12, 2022
    Publication date: December 14, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Ming Tsai, Wei-Yip Loh, Harry CHIEN, Chih-Shiun Chou, Hong-Mao Lee, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20230402075
    Abstract: A memory device is provided, the memory device includes multiple cells arranged in a matrix of multiple rows and multiple columns. The memory device further includes multiple bit lines each of which is connected to first cells of the multiple cells arranged in a row of the multiple rows. A voltage control circuit is connectable to a selected bit line of the multiple bit lines and includes a voltage detection circuit that detects an instantaneous supply voltage and a voltage source selection circuit connected to the voltage detection circuit. The voltage source selection circuit selects a voltage source from multiple voltage sources based on the detected instantaneous supply voltage. The voltage source selection circuit includes a switch that connects the selected voltage source to the selected bit line to provide a write voltage.
    Type: Application
    Filed: August 18, 2023
    Publication date: December 14, 2023
    Inventors: CHIEN-AN LAI, CHUNG-CHENG CHOU, YU-DER CHIH
  • Publication number: 20230402508
    Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The semiconductor device includes a substrate, a fin base disposed on the substrate, a stack of nanostructured channel regions disposed on a first portion of the fin base, a gate structure surrounding the nanostructured channel regions, a source/drain (S/D) region disposed on a second portion of the fin base, an air spacer disposed between the S/D region and the fin base, and a dielectric layer disposed between the air spacer and the fin base.
    Type: Application
    Filed: March 29, 2023
    Publication date: December 14, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Wei CHANG, Shahaji B. MORE, Lun-Kuang TAN, Chi-Yu CHOU, Yueh-Ching PAI
  • Publication number: 20230401885
    Abstract: Optical sensors and their making methods are described herein. In some embodiments, a described sensing apparatus includes: an image sensor; a collimator above the image sensor, wherein the collimator includes an array of apertures; and an optical filtering layer above the collimator, wherein the optical filtering layer is configured to filter a portion of light to be transmitted into the array of apertures.
    Type: Application
    Filed: August 10, 2023
    Publication date: December 14, 2023
    Inventors: You-Cheng JHANG, Han-Zong PAN, Wei-Ding WU, Jiu-Chun WENG, Hsin-Yu CHEN, Cheng-San CHOU, Chin-Min LIN
  • Publication number: 20230402483
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor device including a first image sensor element and a second image sensor element disposed within a substrate. An interconnect structure is disposed along a front-side surface of the substrate and comprises a plurality of conductive wires, a plurality of conductive vias, and a first absorption structure. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths. The second image sensor element is configured to generate electrical signals from the electromagnetic radiation within a second range of wavelengths that is different than the first range of wavelengths. The second image sensor element is laterally adjacent to the first image sensor element. Further, the first image sensor element overlies the first absorption structure and is spaced laterally between opposing sidewalls of the first absorption structure.
    Type: Application
    Filed: August 8, 2023
    Publication date: December 14, 2023
    Inventors: Keng-Yu Chou, Cheng Yu Huang, Chun-Hao Chuang, Wen-Hau Wu, Wei-Chieh Chiang, Wen-Chien Yu, Chih-Kung Chang
  • Publication number: 20230403474
    Abstract: An image sensor device has a first number of first pixels disposed in a substrate and a second number of second pixels disposed in the substrate. The first number is substantially equal to the second number. A light-blocking structure disposed over the first pixels and the second pixels. The light-blocking structure defines a plurality of first openings and second openings through which light can pass. The first openings are disposed over the first pixels. The second openings are disposed over the second pixels. The second openings are smaller than the first openings. A microcontroller is configured to turn on different ones of the second pixels at different points in time.
    Type: Application
    Filed: August 3, 2023
    Publication date: December 14, 2023
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Hsin-Chi Chen
  • Publication number: 20230400639
    Abstract: Disclosed are edge couplers having a high coupling efficiency and low polarization dependent loss, and methods of making the edge couplers. In one embodiment, a semiconductor device for optical coupling is disclosed. The semiconductor device includes: a substrate; an optical waveguide over the substrate; and a plurality of layers over the optical waveguide. The plurality of layers includes a plurality of coupling pillars disposed at an edge of the semiconductor device. The plurality of coupling pillars form an edge coupler configured for optically coupling the optical waveguide to an optical fiber placed at the edge of the semiconductor device.
    Type: Application
    Filed: August 9, 2023
    Publication date: December 14, 2023
    Inventors: Min-Hsiang HSU, Chewn-Pu Jou, Chan-Hong Chern, Cheng-Tse Tang, Yung-Jr Hung, Lan-Chou Cho
  • Publication number: 20230400685
    Abstract: A head up display device includes a pancake lens and a picture generation unit. The pancake lens includes a half mirror and a reflective polarizer. The half mirror has a light incident surface and a reflective surface. The reflective polarizer is disposed on the reflective surface and combined with the half mirror for forming a reflective space. The picture generation unit is disposed in the direction of the pancake lens opposite to the user's eyes. The picture generation unit generates image light and the image light enters the reflective space from the light incident surface. After the reflection, the image light is directed towards the user's eyes to form a virtual image. The optical path of the virtual image and the image light has a un-axis angle.
    Type: Application
    Filed: November 29, 2022
    Publication date: December 14, 2023
    Inventors: Jinn-Chou Yoo, Chun-Min Chen, Cheng-Shun Liao
  • Publication number: 20230403537
    Abstract: A method in a user equipment (UE) for managing reception of multicast and/or broadcast services (MBS) includes transmitting (702) an MBS interest indication to a base station corresponding to an MBS service of interest. The method also includes receiving (704) an acknowledgement of the MBS interest indication from the base station. Further, the method includes starting (706) to provide feedback related to the MBS service in response to receiving the acknowledgement.
    Type: Application
    Filed: October 20, 2021
    Publication date: December 14, 2023
    Inventor: Kao-Peng Chou
  • Publication number: 20230402501
    Abstract: The present disclosure provides a method of manufacturing a semiconductor structure. The method includes: providing a substrate; forming a first nitride layer, a first sacrificial layer, a second nitride layer, a second sacrificial layer and a third nitride layer in sequence over the substrate; forming a first opening and a second opening, wherein the first opening exposes a first landing pad in the substrate, and the second opening exposes a second landing pad in the substrate; forming a first electrode in the first opening and a second electrode in the second opening; removing the first sacrificial layer and the second sacrificial layer concurrently; and forming a conductive layer, conformal to the first electrode, the second electrode, the first nitride layer, the second nitride layer and the third nitride layer.
    Type: Application
    Filed: May 19, 2022
    Publication date: December 14, 2023
    Inventors: YU-MIN CHOU, SHIH-FAN KUAN
  • Publication number: 20230400469
    Abstract: The present invention is to provide methods and devices that monitoring health and diagnosing a disease by directly measuring the biomarkers inside a cell (intra-cellular detection) rapidly and easily.
    Type: Application
    Filed: December 21, 2020
    Publication date: December 14, 2023
    Applicant: Essenlix Corporation
    Inventors: Stephen Y. CHOU, Susan Y. SUN, Shengjian CAI, Wei DING
  • Publication number: 20230399326
    Abstract: Disclosed herein are embodiments of a pyrazole compound according to formula I. Compositions comprising the compound, and a method for making the composition also are disclosed. The composition may comprise a carrier, such as a polymer and/or the composition may be a spray-dried formulation. Also disclosed is a method for using the compound and/or composition. The compound and/or composition may be useful to inhibit an IRAK protein and/or to ameliorate, treat and/or prevent an IRAK-associated disease or condition in a subject.
    Type: Application
    Filed: August 24, 2023
    Publication date: December 14, 2023
    Applicant: Rigel Pharmaceuticals, Inc.
    Inventors: Lu Chou, Matt Duan, Ihab S. Darwish, Simon Shaw, Somasekhar Bhamidipati, Vanessa Taylor, Yan Chen, Dazhong Fan, Zhushou Luo
  • Publication number: 20230402477
    Abstract: The present disclosure describes a three-chip complementary metal-oxide-semiconductor (CMOS) image sensor and a method for forming the image sensor. The image sensor a first chip including a plurality of image sensing elements, transfer transistors and diffusion wells corresponding to the plurality of image sensing elements, a ground node shared by the plurality of image sensing elements, and deep trench isolation (DTI) structures extending from the shared ground node and between adjacent image sensing elements of the plurality of image sensing elements. The image sensor further includes a second chip bonded to the first chip and including a source follower, a reset transistor, a row select transistor, and an in-pixel circuit, where the source follower is electrically coupled to the diffusion wells. The image sensor further includes a third chip bonded to the second chip and including an application-specific circuit, where the application-specific circuit is electrically coupled to the in-pixel circuit.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 14, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hao CHUANG, Keng-Yu CHOU, Cheng Yu HUANG, Wen-Hau WU, Wei-Chieh CHIANG, Chih-Kung CHANG, Tzu-Hsuan HSU
  • Patent number: 11843776
    Abstract: In one implementation, a method of encoding an image is performed at a device including one or more processors and non-transitory memory. The method includes determining a category of a spatial portion of an image based on a relation between a plurality of thresholds associated with a plurality of quantization scaling parameters and a bit rate of the spatial portion of the image at the plurality of quantization scaling parameters. The method includes quantizing the spatial portion of the image based on the categorization.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: December 12, 2023
    Inventors: Krishnakanth Rapaka, Munehiro Nakazato, Jiandong Shen, Ganesh G. Yadav, Sorin Constantin Cismas, Jim C. Chou, Hao Pan
  • Patent number: 11843311
    Abstract: A switching power supply module and a memory storage device are disclosed. The switching power supply module includes a first voltage regulation circuit, a second voltage regulation circuit, a switch circuit and a control circuit. The first voltage regulation circuit is configured to regulate an original power as a first power. The second voltage regulation circuit is configured to regulate the original power as a second power. The control circuit is configured to control the switch circuit to conduct a first power supply path under a first status to provide the first power to the first power supply target. The control circuit is further configured to control the switch circuit to conduct a second power supply path under a second status to provide the second power to the second power supply target.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: December 12, 2023
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Shu-Han Chou
  • Patent number: 11842781
    Abstract: A layout method includes: forming a layout structure of a memory array having first and second rows, each including a plurality of storage cells, wherein at least one of the storage cells includes a fuse; disposing a word line between the first and second rows; disposing a plurality of control electrodes across the word line for connecting the storage cells of the first row and the storage cells of the second row respectively; disposing a first cut layer on a first control electrode of the control electrodes located on a first side of the word line; and disposing a second cut layer on a second control electrode of the control electrodes located on a second side of the word line; wherein the first side of the word line is opposite to the second side of the word line.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: December 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Meng-Sheng Chang, Yao-Jen Yang, Shao-Yu Chou, Yih Wang
  • Patent number: 11843013
    Abstract: The present disclosure is directed to a method of forming a polarization grating structure (e.g., polarizer) as part of a grid structure of a back side illuminated image sensor device. For example, the method includes forming a layer stack over a semiconductor layer with radiation-sensing regions. Further, the method includes forming grating elements of one or more polarization grating structures within a grid structure, where forming the grating elements includes (i) etching the layer stack to form the grid structure and (ii) etching the layer stack to form grating elements oriented to a polarization angle.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: December 12, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee
  • Patent number: 11839416
    Abstract: A surgical expandable implant includes a bolt, a movable member, and a support body. The bolt has a bolt body and a fixing member. The movable member is configured to be slidably sleeved on the bolt body. The support body has a first end configured to extend through the fixing member and a second end configured to extend through the movable member. The movable member is configured to slide along the length of the bolt body so as to move the support body from an initial shape to a deformed shape.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: December 12, 2023
    Assignee: POINT ROBOTICS (SINGAPORE) PTE. LTD.
    Inventors: Chih-Wei Chen, Hao-Kai Chou, Xiu-Yun Xiao
  • Patent number: 11840037
    Abstract: A fluid-impervious slide fastener is disposed; an covering abutting member is formed in a central slit of a pair of support tapes, the covering abutting member has a first covering body having a covering layer and a second covering body having a covering layer; when the fluid-impervious slide fastener is in a coupled status, the first covering body and the second covering body are able to elastically abut against each other so as to form a tightening deformation, thus the central slit is provided with a fluid-impervious function against a fluid, for example a liquid, of capable of bearing a hydrostatic pressure of 30 gf/cm2.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: December 12, 2023
    Inventors: Chao-Mu Chou, Shiu-Yin Cheng
  • Patent number: 11842133
    Abstract: The present disclosure provides a method and a system for determining the equivalence of the DRM data set and the DRC data set. The system retrieves a DRM data set and a DRC data set, and transforms the DRM data set and the DRC data set into a first data structure node and a second data structure node respectively. The system determines whether the first data structure node and the second data structure node are equivalent according to a data structure node comparison model.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: December 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chin-Chou Liu, Yi-Kuang Lee, Lie-Szu Juang