Abstract: A head up display device includes a pancake lens and a picture generation unit. The pancake lens includes a half mirror and a reflective polarizer. The half mirror has a light incident surface and a reflective surface. The reflective polarizer is disposed on the reflective surface and combined with the half mirror for forming a reflective space. The picture generation unit is disposed in the direction of the pancake lens opposite to the user's eyes. The picture generation unit generates image light and the image light enters the reflective space from the light incident surface. After the reflection, the image light is directed towards the user's eyes to form a virtual image. The optical path of the virtual image and the image light has a un-axis angle.

Abstract: A method in a user equipment (UE) for managing reception of multicast and/or broadcast services (MBS) includes transmitting (702) an MBS interest indication to a base station corresponding to an MBS service of interest. The method also includes receiving (704) an acknowledgement of the MBS interest indication from the base station. Further, the method includes starting (706) to provide feedback related to the MBS service in response to receiving the acknowledgement.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure. The method includes: providing a substrate; forming a first nitride layer, a first sacrificial layer, a second nitride layer, a second sacrificial layer and a third nitride layer in sequence over the substrate; forming a first opening and a second opening, wherein the first opening exposes a first landing pad in the substrate, and the second opening exposes a second landing pad in the substrate; forming a first electrode in the first opening and a second electrode in the second opening; removing the first sacrificial layer and the second sacrificial layer concurrently; and forming a conductive layer, conformal to the first electrode, the second electrode, the first nitride layer, the second nitride layer and the third nitride layer.

Abstract: The present invention is to provide methods and devices that monitoring health and diagnosing a disease by directly measuring the biomarkers inside a cell (intra-cellular detection) rapidly and easily.

Abstract: Disclosed herein are embodiments of a pyrazole compound according to formula I. Compositions comprising the compound, and a method for making the composition also are disclosed. The composition may comprise a carrier, such as a polymer and/or the composition may be a spray-dried formulation. Also disclosed is a method for using the compound and/or composition. The compound and/or composition may be useful to inhibit an IRAK protein and/or to ameliorate, treat and/or prevent an IRAK-associated disease or condition in a subject.

Abstract: The present disclosure describes a three-chip complementary metal-oxide-semiconductor (CMOS) image sensor and a method for forming the image sensor. The image sensor a first chip including a plurality of image sensing elements, transfer transistors and diffusion wells corresponding to the plurality of image sensing elements, a ground node shared by the plurality of image sensing elements, and deep trench isolation (DTI) structures extending from the shared ground node and between adjacent image sensing elements of the plurality of image sensing elements. The image sensor further includes a second chip bonded to the first chip and including a source follower, a reset transistor, a row select transistor, and an in-pixel circuit, where the source follower is electrically coupled to the diffusion wells. The image sensor further includes a third chip bonded to the second chip and including an application-specific circuit, where the application-specific circuit is electrically coupled to the in-pixel circuit.

Abstract: In one implementation, a method of encoding an image is performed at a device including one or more processors and non-transitory memory. The method includes determining a category of a spatial portion of an image based on a relation between a plurality of thresholds associated with a plurality of quantization scaling parameters and a bit rate of the spatial portion of the image at the plurality of quantization scaling parameters. The method includes quantizing the spatial portion of the image based on the categorization.

Abstract: A switching power supply module and a memory storage device are disclosed. The switching power supply module includes a first voltage regulation circuit, a second voltage regulation circuit, a switch circuit and a control circuit. The first voltage regulation circuit is configured to regulate an original power as a first power. The second voltage regulation circuit is configured to regulate the original power as a second power. The control circuit is configured to control the switch circuit to conduct a first power supply path under a first status to provide the first power to the first power supply target. The control circuit is further configured to control the switch circuit to conduct a second power supply path under a second status to provide the second power to the second power supply target.

Abstract: The present disclosure is directed to a method of forming a polarization grating structure (e.g., polarizer) as part of a grid structure of a back side illuminated image sensor device. For example, the method includes forming a layer stack over a semiconductor layer with radiation-sensing regions. Further, the method includes forming grating elements of one or more polarization grating structures within a grid structure, where forming the grating elements includes (i) etching the layer stack to form the grid structure and (ii) etching the layer stack to form grating elements oriented to a polarization angle.

Abstract: A layout method includes: forming a layout structure of a memory array having first and second rows, each including a plurality of storage cells, wherein at least one of the storage cells includes a fuse; disposing a word line between the first and second rows; disposing a plurality of control electrodes across the word line for connecting the storage cells of the first row and the storage cells of the second row respectively; disposing a first cut layer on a first control electrode of the control electrodes located on a first side of the word line; and disposing a second cut layer on a second control electrode of the control electrodes located on a second side of the word line; wherein the first side of the word line is opposite to the second side of the word line.

Abstract: The present disclosure provides a method and a system for determining the equivalence of the DRM data set and the DRC data set. The system retrieves a DRM data set and a DRC data set, and transforms the DRM data set and the DRC data set into a first data structure node and a second data structure node respectively. The system determines whether the first data structure node and the second data structure node are equivalent according to a data structure node comparison model.

Abstract: An aluminum alloy material includes 1.2 wt % to 3.0 wt % of Si, 0.1 wt % to 0.8 wt % of Mg, 0.2 wt % to 2.0 wt % of Cu, 0.5 wt % to 2.5 wt % of Zn, 0.2 wt % to 2.0 wt % of Ti, and the remainder being Al and inevitable impurities. The powder of the aluminum alloy material can be processed to form an aluminum alloy object. The aluminum alloy object may further include an anodized film on its surface.

Abstract: A surgical expandable implant includes a bolt, a movable member, and a support body. The bolt has a bolt body and a fixing member. The movable member is configured to be slidably sleeved on the bolt body. The support body has a first end configured to extend through the fixing member and a second end configured to extend through the movable member. The movable member is configured to slide along the length of the bolt body so as to move the support body from an initial shape to a deformed shape.

Abstract: A fluid-impervious slide fastener is disposed; an covering abutting member is formed in a central slit of a pair of support tapes, the covering abutting member has a first covering body having a covering layer and a second covering body having a covering layer; when the fluid-impervious slide fastener is in a coupled status, the first covering body and the second covering body are able to elastically abut against each other so as to form a tightening deformation, thus the central slit is provided with a fluid-impervious function against a fluid, for example a liquid, of capable of bearing a hydrostatic pressure of 30 gf/cm2.

Abstract: Nanostructure field-effect transistors (nano-FETs) including isolation layers formed between epitaxial source/drain regions and semiconductor substrates and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a power rail, a dielectric layer over the power rail, a first channel region over the dielectric layer, a second channel region over the first channel region, a gate stack over the first channel region and the second channel region, where the gate stack is further disposed between the first channel region and the second channel region and a first source/drain region adjacent the gate stack and electrically connected to the power rail.

Abstract: Systems, methods, and computer-executable instructions for collecting traffic data from devices. A data collection node determines a scanning algorithm. Multiple channels of a spectrum are scanning simultaneously. An advertising packet is detected on a channel. A MAC address is extracted from the advertising packet and at least one byte is removed from the MAC address. An identifier is created based on the reduced MAC address. A message including the identifier, RSSI of the advertising packet and timestamp is sent to a remote server. The remote server uses the received data from multiple data collection units to create traffic data associated with devices.

Abstract: At least one embodiment of the disclosure is directed to a memory circuit having a leakage current blocking mechanism and a memory device having the memory circuit. In an aspect, one embodiment of the disclosure describes a memory circuit which includes not limited to a memory array which includes a first memory cell connected to a first bit line and a second memory cell connected to a second bit line, a pre-charge circuit which is connected to the memory array and includes a first pre-charge device, and a programming circuit which is connected to the pre-charge circuit and comprises a programming transistor which has a higher drive capability than the first pre-charge device so as to drive the first bit line to a ground voltage in response to the first write operation, wherein in response to a first write operation on the first memory cell, a current flow exists between the programming circuit and the first pre-charge device.

Abstract: A polishing system includes a platen to hold a polishing pad, a carrier head to hold a substrate against the polishing pad, a conditioner including a conditioner head to hold a conditioner disk against the polishing pad, a motor to move the conditioner head laterally movable relative to the platen, a conditioning disk cleaning station positioned adjacent the platen to clean the conditioning disk, and a controller configured to cause the motor to, during polishing of the substrate, move the conditioner head back and forth between a first position with the conditioner head over the polishing pad and a second position with the conditioner head in the conditioner disk cleaning station.