Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6278954
    Abstract: The temperature correction coefficient in a formula for estimating the generated energy of a solar cell is corrected in the negative direction as the mean monthly ambient temperature increases. For an amorphous silicon solar cell, the generated energy is expected to be smaller than the actually generated energy. To prevent this, a correction coefficient which increases as the mean monthly ambient temperature becomes high is calculated on the basis of the mean monthly temperature at the solar cell installation site. The generated energy is estimated from the mean solar radiation at the installation site, the calculated correction coefficient, and the rated power of the solar cell. With this arrangement, the generated energy of an amorphous silicon solar cell or a photovoltaic power generation apparatus can be more accurately estimated on the basis of the installation site.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: August 21, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Chin Chou Lim, Masanari Tamechika, Nobuyoshi Takehara
  • Publication number: 20010013344
    Abstract: An adjustable oropharyngeal airway apparatus includes a rigid airway portion and a flexible airway portion frictionally engaging and slidably disposed in the rigid airway portion. The overall length of the apparatus can be varied by sliding the flexible portion relative to the rigid portion.
    Type: Application
    Filed: April 8, 1999
    Publication date: August 16, 2001
    Inventor: HSIU-CHIN CHOU
  • Publication number: 20010014508
    Abstract: A method for forming borderless contact capable of reducing junction leakage current by forming a deep junction in the source/drain region nearest the borderless contact to eliminate most of the leakage current. The method includes the steps of first forming a shallow trench isolation structure for isolating devices in a semiconductor substrate. In the subsequent step, an ion implantation is carried out implanting ions at a small tilt angle to form source/drain regions such that source/drain region nearest to the shallow trench isolation structure has a deep junction. Finally, a borderless opening is formed above the source/drain region and the shallow trench isolation structure, and then conductive material is deposited into the borderless opening to form the borderless contact.
    Type: Application
    Filed: December 7, 1998
    Publication date: August 16, 2001
    Inventors: TONY LIN, JIH-WEN CHOU
  • Patent number: 6274450
    Abstract: A method for manufacturing metal oxide semiconductor field effect transistor is disclosed. The metal oxide semiconductor field effect transistor is formed by a specific fabricating process that disadvantages of thermal damage are effectively prevented. According to the method, first a substrate is provided. Second, an isolation and a well are formed in the substrate, and then a first dielectric layer, a conductive layer and an anti-reflection coating layer are formed on the substrate sequentially. Third, a gate is formed on the substrate, and then a source and a drain are formed in the substrate and a spacer is formed on the substrate. Fourth, both source and drain are annealed, and then a first salicide is formed on both source and drain. Fifth, a second dielectric layer is formed on the substrate and is planarized, where the anti-reflecting coating layer is totally removed and the conductive layer is partially removed. Sixth, a second salicide is formed on the conductive layer.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: August 14, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Tony Lin, Coming Chen, Jih-Wen Chou
  • Patent number: 6274154
    Abstract: A moisturizing and therapeutic glove is disclosed which includes a thin layer of Aloe Vera coated evenly and uniformly on an inside surface of the glove. Aloe Vera is attached to the surface through a dehydration process achieved with a controlled drying method. Aloe Vera soothes hand during the wearing of the glove.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: August 14, 2001
    Inventor: Belle L Chou
  • Patent number: 6274448
    Abstract: A method of suppressing junction capacitance of the source/drain regions is disclosed in this invention. The source/drain regions are formed by double implantation of phosphorus ions and arsenic ions. The phosphorus ion implantation lowers the energy needed in the implantation of arsenic ions, and reduces dislocations in the source/drain regions formed during implanting arsenic ions. Further, the double implantation suppresses the junction profile of arsenic ions, and enhances the width of depletion regions. So, the junction capacitance is reduced, thereby accelerate the function of semiconductor devices.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: August 14, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Tony Lin, Wen-Kuan Yeh, Jih-Wen Chou
  • Patent number: 6275378
    Abstract: A safety lock for notebook-type computer dock. The safety lock serves to lock the dock with the computer to ensure safety. The safety lock also safely combines the I/O module, notebook-type computer and the dock into one body.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: August 14, 2001
    Assignee: Compal Electronics, Inc.
    Inventors: Chia-Chun Lee, Ming-Hsun Chou, Jui-Jung Huang, Chih-Wen Chiang
  • Patent number: 6274513
    Abstract: The present invention discloses a method of oxidizing a nitride film on a conductive substrate comprising the following steps. First, a conductive substrate is provided, and a nitride film is formed on the main surface of the conductive substrate by performing film deposition process or directly nitridating the surface region of the conductive substrate. Then, a local electrode terminal (such as a conductive probe of a scanning-probe microscope) is provided, and a strong electric field is locally generated between the electrode terminal and the conductive substrate in an oxidizing environment, wherein the strong electric field passes through the nitride film, thereby oxidizing the nitride film region passed by the electric field. The method of oxidizing a nitride film according to the present invention can be applied to define patterns on a nitride film, to record information as memory media, and to form growth templates for the use in chemical selective formation processes.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: August 14, 2001
    Inventors: Shangjr Gwo, Ya-Chang Chou, Tom Chen, Tien-Sheng Chao
  • Publication number: 20010011634
    Abstract: This invention provides a process for coating super fine ion particles of multiple elements on the surface of a micro router substrate, characteristics of which is that the coating step is operated under low temperatures and vacuums. First, raw micro routers are cleaned by electron beams under atmospheric pressures and room temperatures, then the raw micro routers are transferred into a vacuum environment, and increase the temperature of the environment. Next, the surface of the micro router is cleaned by ions, then proceed with the coating process. An arc source is used to bombard cations from a target, while a filtration net is used to get filtrate of small cation particles. Then, an ion assistant device is operated to further fine the filtrated particles, therefore only super fine ion particles are coated on the surface of the micro router substrates.
    Type: Application
    Filed: December 28, 2000
    Publication date: August 9, 2001
    Inventors: Chung-Lin Chou, Chen-Chun Hsu
  • Publication number: 20010013068
    Abstract: The production of an interleaved multimedia stream for servers and client computers coupled to each other by a diverse computer network which includes local area networks (LANs) and/or wide area networks (WANs) such as the internet. Interleaved multimedia streams can include compressed video frames for display in a video window, accompanying compressed audio frames and annotation frames. In one embodiment, a producer captures separate video/audio frames and generates an interleaved multimedia file. In another embodiment, the interleaved file include annotation frames which provide either pointer(s) to the event(s) of interest or include displayable data embedded within the annotation stream. The interleaved file is then stored in the web server for subsequent retrieval by client computer(s) in a coordinated manner, so that the client computer(s) is able to synchronously display the video frames and displayable event(s) in a video window and event window(s), respectively.
    Type: Application
    Filed: March 25, 1997
    Publication date: August 9, 2001
    Inventors: ANDERS EDGAR KLEMETS, PHILIP A. CHOU
  • Patent number: 6272008
    Abstract: An apparatus casing quick mounting arrangement, which includes a computer housing having an apparatus insertion slot and a plurality of locating holes at a top flange above the apparatus insertion slot and at least one elongated guide hole, an apparatus casing mounted in the computer housing in alignment with the apparatus insertion slot to hold a computer peripheral apparatus, the apparatus casing having at least one locating strip slidably hooked in the at least one elongated guide hole at the computer housing to guide the apparatus casing into position, and a spring plate mounted on the apparatus casing and coupled to the computer housing to secure the apparatus casing in position, the spring plate having an angled front mounting flange fixedly fastened to the apparatus casing at a top side, and hooked portions raised from a free end thereof at a top side and respectively engaged into the locating holes at the computer housing from a bottom side.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: August 7, 2001
    Assignee: First International Computer, Inc.
    Inventor: Meng-Chou Huang
  • Patent number: 6270934
    Abstract: A thermal transfer donor element is provided which comprises a support, a light-to-heat conversion layer, an interlayer, and a thermal transfer layer. When the above donor element is brought into contact with a receptor and imagewise irradiated, an image is obtained which is free from contamination by the light-to-heat conversion layer. The construction and process of this invention is useful in making colored images including applications such as color proofs and color filter elements.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: August 7, 2001
    Assignee: 3M Innovative Properties Company
    Inventors: Jeffrey C. Chang, John S. Staral, William A. Tolbert, Martin B. Wolk, Claire A. Jalbert, Hsin-hsin Chou
  • Patent number: 6269881
    Abstract: An oil recovery process is disclosed which uses a particular class of alkylaryl sulfonate surfactants. The surfactants are derived from an alpha-olefin stream having a broad distribution of even carbon numbers ranging from 12 to 58. The olefin stream is reacted with aromatic feedstock, such as benzene, toluene, xylene, or a mixture thereof to form alkylates, and then reacted with SO3 to form sulfonic acids. The resulting surfactant has high solubilization and ultra-low interfacial tension with crude oils, especially waxy crude oil, having a broad distribution of carbon numbers.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: August 7, 2001
    Assignees: Chevron U.S.A. Inc, Chevron Chemical Company LLC
    Inventors: Shang Chou, Curtis B. Campbell
  • Publication number: 20010010962
    Abstract: A method of fabricating a field effect transistor, wherein a substrate with a gate is provided. A liner oxide layer and a first spacer are formed adjacent to the sides of the gate. An epitaxial silicon layer is formed at both sides of the gate in the substrate, while a shallow source/drain (S/D) extension junction is formed in the substrate below the epitaxial silicon layer. An oxide layer and a second spacer are formed to be closely connected to the first spacer and form the S/D region below the epitaxial silicon layer. A part of the epitaxial silicon layer is then transformed into a metal silicide layer, so as to complete the process of the field effect transistor.
    Type: Application
    Filed: March 30, 2001
    Publication date: August 2, 2001
    Inventors: Tung-Po Chen, Jih-Wen Chou
  • Patent number: 6269195
    Abstract: A mechanism and process for feathering a first image and a second image in a composite image includes defining an original matte image. A portion of the original matte image is box filtered horizontally and vertically to generate an intermediate matte image. At least a portion of the intermediate matte image is box filtered horizontally and vertically to generate a processed matte image. An edge biasing function is applied to the processed matte image. Edge biasing includes further modifying pixel values on an edge by changing the contrast and brightness of the matte image. A composite image including the first image and the second image is then generated after applying the edge biasing function to the box-filtered processed matte image.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: July 31, 2001
    Assignee: Avid Technology, Inc.
    Inventors: Robert Gonsalves, Chia-Sheng Chou
  • Patent number: 6268039
    Abstract: A packing buffer assembly includes a pair of sleeves and an accessory supporting plate. Each sleeve has a first buffer member, a pair of second buffer members mounted on the first buffer member in a wedging manner, and a pair of shoulder pads. Each first buffer member has a pair of upper and lower plates, a side plate, and a first receiving space. The shoulder pads of each sleeve are disposed in the first receiving space. Each second buffer member has upper and lower end portions. The accessory supporting plate has a central part, a pair of risers, a second receiving space which is defined by the central part and the risers, and a pair of wings which extend oppositely and respectively from the risers so as to be laid on the sleeves.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: July 31, 2001
    Assignee: Compal Electronics, Inc.
    Inventors: Ming-Hsun Chou, Shu-Chin Chen
  • Publication number: 20010009263
    Abstract: A computer wrist pad comprises a bottom seat, an outer layer, two end plates, and at least one air sac. The bottom seat is provided with an open-ended receiving space in which the air sac is disposed. The receiving space is sealed off at both ends thereof by the two end plates. The air sac is inflatable and deflatable for adjusting the hardness and the thickness of the computer wrist pad.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 26, 2001
    Inventor: Chien-Fa Chou
  • Patent number: 6265305
    Abstract: The present invention provides a method of preventing corrosion of a titanium layer in a semiconductor wafer. The semiconductor wafer comprises a dielectric layer, a column-shaped tungsten plug embedded in the dielectric layer and having its top surface cut to be at the same level as that of the dielectric layer, a titanium layer positioned on the top of the dielectric layer and covering a portion of the top surface of the tungsten plug, a main conductive layer positioned on the surface of the titanium layer, a photoresist layer positioned on the surface of the main conductive layer, and a polymer layer scattered on the surface of the semiconductor wafer. The method is first to utilize a dry cleaning process to strip off the photoresist layer and the polymer layer, then to perform a nitridizing process to make the surface of the titanium layer exposed on the surface of the semiconductor wafer generate a titanium nitride layer.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: July 24, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Shih-Fang Tsou, Yu-Jen Chou, Cheng-Shun Hu
  • Patent number: 6262122
    Abstract: The (R)-enantiomer of 4-[[(cyanoimino)-[(1,2,2-trimethylpropyl)amino]methyl]amino]-benzonitrile as well as the corresponding (S)-enantiomer are useful for promoting hair growth such as in male pattern baldness.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: July 17, 2001
    Assignee: Bristol-Myers Squibb Company
    Inventors: Karnail S. Atwal, Joyce Chou, Seshadri Neervannan
  • Patent number: D446464
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: August 14, 2001
    Assignee: Gamemax Corporation
    Inventor: Shang-Ter Chou