Patents by Inventor Christopher James Kapusta

Christopher James Kapusta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10541153
    Abstract: An electronics package includes an insulating substrate, an electrical component having a back surface coupled to a first surface of the insulating substrate, and an insulating structure surrounding at least a portion of a perimeter of the electrical component. A first wiring layer extends from the first surface of the insulating substrate and over a sloped side surface of the insulating structure to electrically couple with at least one contact pad on an active surface of the electrical component. A second wiring layer is formed on a second surface of the insulating substrate and extends through at least one via therein to electrically couple with the first wiring layer.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: January 21, 2020
    Assignee: General Electric Company
    Inventors: Christopher James Kapusta, Raymond Albert Fillion, Risto Ilkka Sakari Tuominen, Kaustubh Ravindra Nagarkar
  • Patent number: 10432168
    Abstract: In one embodiment, a bonded quartz wafer package includes a first quartz wafer including at least one quartz-based device, a second quartz wafer disposed above the first quartz wafer, and a liquid crystal polymer (LCP) bonding layer disposed in between the first and second quartz wafers that bonds the first and second quartz wafers together.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: October 1, 2019
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Christopher James Kapusta, Marco Francesco Aimi
  • Patent number: 10431509
    Abstract: A non-magnetic hermetic package includes walls that surround an open cavity, with a generally planar non-magnetic and metallic seal ring disposed in a continuous loop around upper edges of the walls; a sensitive component that is bonded within the cavity; and a non-magnetic lid that is sealed to the seal ring to close the cavity by a metallic seal.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: October 1, 2019
    Assignee: General Electric Company
    Inventors: Christopher James Kapusta, Marco Francesco Aimi
  • Patent number: 10332832
    Abstract: A method of manufacturing a multi-layer electronics package includes attaching a base insulating substrate to a frame having an opening therein and such that the frame is positioned above and/or below the base insulating substrate to provide support thereto. A first conductive wiring layer is applied on the first side of the base insulating substrate, and vias are formed in the base insulating substrate. A second conductive wiring layer is formed on the second side of the base insulating substrate that covers the vias and the exposed portions of the first conductive wiring layer and at least one additional insulating substrate is bonded to the base insulating substrate. Vias are formed in each additional insulating substrate and an additional conductive wiring layer is formed on each of the additional insulating substrate. The described build-up forms a multilayer interconnect structure, with the frame providing support for this build-up.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: June 25, 2019
    Assignee: General Electric Company
    Inventors: Christopher James Kapusta, Raymond Albert Fillion, Risto Ilkka Sakari Tuominen, Kaustubh Ravindra Nagarkar
  • Patent number: 10333493
    Abstract: A filter package and method of manufacturing thereof is disclosed. The filter device package includes a first dielectric layer having an acoustic wave filter device attached thereto, the acoustic wave filter device comprising an active area and I/O pads. The filter device package also includes an adhesive positioned between the first dielectric layer and the acoustic wave filter device to secure the layer to the device, vias formed through the first dielectric layer and the adhesive to the I/O pads of the acoustic wave filter device, and metal interconnects formed in the vias and mechanically and electrically coupled to the I/O pads of the acoustic wave filter device to form electrical interconnections thereto, wherein an air cavity is formed in the adhesive between the acoustic wave filter device and the first dielectric layer, in a location adjacent the active area of the acoustic wave filter device.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: June 25, 2019
    Assignee: General Electric Company
    Inventors: Kaustubh Ravindra Nagarkar, Yongjae Lee, Christopher James Kapusta
  • Publication number: 20190148279
    Abstract: An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.
    Type: Application
    Filed: December 21, 2018
    Publication date: May 16, 2019
    Inventors: Christopher James Kapusta, Kaustubh Ravindra Nagarkar, Arun Virupaksha Gowda, James Wilson Rose
  • Publication number: 20190115658
    Abstract: A beam former module includes a package base and an interconnect structure formed within the package base. The beam former module also includes a first true time delay (TTD) module attached to the package base. The first TTD module includes a plurality of switching elements configured to define a signal transmission path between a signal input and a signal output of the first TTD module by selectively activating a plurality of time delay lines. The signal input and the signal output of the first TTD module are electrically coupled to the interconnect structure. In some embodiments, the interconnect structure includes at least one TTD meander line and at least one of the time delay lines of the first TTD module is electrically coupled to the at least one TTD meander line.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 18, 2019
    Inventors: Joseph Alfred Iannotti, Christopher James Kapusta
  • Publication number: 20190103331
    Abstract: A non-magnetic hermetic package includes walls that surround an open cavity, with a generally planar non-magnetic and metallic seal ring disposed in a continuous loop around upper edges of the walls; a sensitive component that is bonded within the cavity; and a non-magnetic lid that is sealed to the seal ring to close the cavity by a metallic seal.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 4, 2019
    Inventors: Christopher James Kapusta, Marco Francesco Aimi
  • Patent number: 10208382
    Abstract: A non-magnetic lid for sealing a hermetic package. The lid includes a molybdenum substrate having a sputtered adhesion layer and a copper seed layer. The lid also includes a plated palladium solder base layer, and has a gold/tin solder preform attached to a sealing surface of the lid.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: February 19, 2019
    Assignee: General Electric Company
    Inventors: Christopher James Kapusta, Marco Francesco Aimi
  • Publication number: 20190043734
    Abstract: An electronics package includes an insulating substrate, an electrical component having an active surface coupled to a first surface of the insulating substrate, and an insulating structure disposed adjacent the electrical component on the first surface of the insulating substrate. A first wiring layer is formed on a top surface of the insulating structure and extends down at least one sloped side surface of the insulating structure. A second wiring layer is formed on a second surface of the insulating substrate. The second wiring layer extends through a plurality of vias in the insulating substrate to electrically couple at least one contact pad on the active surface of the electrical component to the first wiring layer.
    Type: Application
    Filed: August 3, 2017
    Publication date: February 7, 2019
    Inventors: Christopher James Kapusta, Raymond Albert Fillion, Risto Ilkka Sakari Tuominen, Kaustubh Ravindra Nagarkar
  • Publication number: 20190043794
    Abstract: An electronics package includes a support substrate, an electrical component having an active surface coupled to a first surface of the support substrate, and an insulating structure coupled to the first surface of the support substrate and at least one side wall of the electrical component. A functional layer comprising at least one functional component is formed on at least one of a sloped side wall of the insulating structure and a backside surface of the electrical component. A first wiring layer is formed on a second surface of the support substrate. The first wiring layer is electrically coupled to the functional layer through at least one via in the support substrate.
    Type: Application
    Filed: August 3, 2017
    Publication date: February 7, 2019
    Inventors: Christopher James Kapusta, Risto Ilkka Sakari Tuominen, Kaustubh Ravindra Nagarkar, Raymond Albert Fillion
  • Publication number: 20190043733
    Abstract: An electronics package includes an insulating substrate, an electrical component having a back surface coupled to a first surface of the insulating substrate, and an insulating structure surrounding at least a portion of a perimeter of the electrical component. A first wiring layer extends from the first surface of the insulating substrate and over a sloped side surface of the insulating structure to electrically couple with at least one contact pad on an active surface of the electrical component. A second wiring layer is formed on a second surface of the insulating substrate and extends through at least one via therein to electrically couple with the first wiring layer.
    Type: Application
    Filed: August 3, 2017
    Publication date: February 7, 2019
    Inventors: Christopher James Kapusta, Raymond Albert Fillion, Risto Ilkka Sakari Tuominen, Kaustubh Ravindra Nagarkar
  • Publication number: 20190043802
    Abstract: A method of manufacturing a multi-layer electronics package includes attaching a base insulating substrate to a frame having an opening therein and such that the frame is positioned above and/or below the base insulating substrate to provide support thereto. A first conductive wiring layer is applied on the first side of the base insulating substrate, and vias are formed in the base insulating substrate. A second conductive wiring layer is formed on the second side of the base insulating substrate that covers the vias and the exposed portions of the first conductive wiring layer and at least one additional insulating substrate is bonded to the base insulating substrate. Vias are formed in each additional insulating substrate and an additional conductive wiring layer is formed on each of the additional insulating substrate. The described build-up forms a multilayer interconnect structure, with the frame providing support for this build-up.
    Type: Application
    Filed: August 7, 2017
    Publication date: February 7, 2019
    Inventors: Christopher James Kapusta, Raymond Albert Fillion, Risto Ilkka Sakari Tuominen, Kaustubh Ravindra Nagarkar
  • Publication number: 20190043810
    Abstract: An electronics package includes a support substrate, an electrical component having a first surface coupled to a first surface of the support substrate, and an insulating structure coupled to the first surface of the support substrate and sidewalls of the electrical component. The insulating structure has a sloped outer surface. A conductive layer encapsulates the electrical component and the sloped outer surface of the insulating structure. A first wiring layer is formed on a second surface of the support substrate. The first wiring layer is coupled to the conductive layer through at least one via in the support substrate.
    Type: Application
    Filed: August 3, 2017
    Publication date: February 7, 2019
    Inventors: Christopher James Kapusta, Raymond Albert Fillion, Risto Ilkka Sakari Tuominen, Kaustubh Ravindra Nagarkar
  • Patent number: 10163773
    Abstract: An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: December 25, 2018
    Assignee: General Electric Company
    Inventors: Christopher James Kapusta, Kaustubh Ravindra Nagarkar, Arun Virupaksha Gowda, James Wilson Rose
  • Publication number: 20180356368
    Abstract: A system includes a structure configured to have a structure bonding layer disposed on a surface of the structure. The structure bonding layer is a metallic alloy. The system includes a sensor configured to have a sensor bonding layer disposed on a surface of the sensor. The sensor bonding layer is a metallic alloy. The sensor bonding layer is configured to be coupled to the structure bonding layer via a metallic joint in order for the sensor to sense data of the structure through the metallic joint, the structure bonding layer, and the sensor bonding layer.
    Type: Application
    Filed: June 7, 2017
    Publication date: December 13, 2018
    Inventors: Joseph Iannotti, Christopher James Kapusta, David Richard Esler
  • Publication number: 20180240789
    Abstract: An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween.
    Type: Application
    Filed: April 18, 2018
    Publication date: August 23, 2018
    Inventors: James Sabatini, Christopher James Kapusta, Glenn Forman
  • Patent number: 10014286
    Abstract: An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: July 3, 2018
    Assignee: General Electric Company
    Inventors: James Sabatini, Christopher James Kapusta, Glenn Forman
  • Patent number: 9954263
    Abstract: A radio frequency (RF) microelectromechanical system (MEMS) package includes a first mounting substrate, a signal line formed on a top surface of the first mounting substrate, the signal line comprising a MEMS device selectively electrically coupling a first portion of the signal line to a second portion of the signal line, and a ground assembly coupled to the first mounting substrate. The ground assembly includes a second mounting substrate, a ground plane formed on a bottom surface of the second mounting substrate, and at least one electrical interconnect extending through a thickness of the second mounting substrate to contact the ground plane, wherein the ground plane is spaced apart from the signal line.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: April 24, 2018
    Assignee: General Electric Company
    Inventors: Yongjae Lee, Joseph Alfred Iannotti, Christopher Fred Keimel, Christopher James Kapusta
  • Patent number: RE47651
    Abstract: An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: October 15, 2019
    Assignee: General Electric Company
    Inventors: James Sabatini, Christopher James Kapusta, Glenn Forman