Patents by Inventor Chuan Lin

Chuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935780
    Abstract: A manufacturing method of a semiconductor structure includes: etching a substrate such that the substrate has a first top surface and a second top surface higher than the first top surface; implanting the first top surface of the substrate by boron to increase a p-type concentration of the first top surface of the substrate; forming a first dielectric layer on the substrate; and forming a second dielectric layer on the first dielectric layer.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: March 19, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chuan-Lin Hsiao, Wei-Ming Liao
  • Publication number: 20240079301
    Abstract: An electronic package is provided, in which a mesh structure is disposed between a circuit structure and an electronic element to increase the shunt path of current. Therefore, when the electronic element is used as an electrode pad of a power contact, the current can be passed through a conductive sheet of the circuit structure via the mesh structure, such that the power loss can be reduced and the IR drop of the electronic element can meet the requirements.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 7, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan LIN, Chia-Chu LAI, Min-Han CHUANG
  • Publication number: 20240055998
    Abstract: A photovoltaic inverter includes a casing, at least one circuit board located in the casing, a current sensor located on the at least one circuit board, an arc detector located on the at least one circuit board, a self-test coil located on the at least one circuit board, and at least one direct current input terminal located on the casing and connected to the at least one circuit board, wherein the self-test coil is configured to deliver a test signal to be sensed by the arc detector, and the direct current input terminal is configured to deliver a direct current through the arc detector, wherein the current sensor is configured to detect a magnitude of the direct current passing through the direct current input terminal.
    Type: Application
    Filed: June 5, 2023
    Publication date: February 15, 2024
    Inventors: Chun-Wei WU, Hung-Chuan LIN
  • Publication number: 20240047265
    Abstract: A manufacturing method of a semiconductor structure includes: etching a substrate such that the substrate has a first top surface and a second top surface higher than the first top surface; implanting the first top surface of the substrate by boron to increase a p-type concentration of the first top surface of the substrate; forming a first dielectric layer on the substrate; and forming a second dielectric layer on the first dielectric layer.
    Type: Application
    Filed: October 11, 2023
    Publication date: February 8, 2024
    Inventors: Chuan-Lin HSIAO, Wei-Ming LIAO
  • Patent number: 11895830
    Abstract: The present disclosure provides a method for manufacturing a semiconductor device having a buried wordline. The method includes forming a first recessed portion in a first dielectric layer in a substrate; forming a second recessed portion spaced apart from the first recessed portion and in the substrate; disposing a protection layer on the substrate to cover the second recessed portion; and disposing a second dielectric layer on the first dielectric layer.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: February 6, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chuan-Lin Hsiao
  • Patent number: 11892672
    Abstract: A display device includes a light guide plate a first area, a plurality of first eccentric microstructures positioned in the first area with a first eccentric orientation, a second area arranged at one side of the first area, and second eccentric microstructures positioned in the second area with a second eccentric orientation. An angle between the first eccentric orientation and the second eccentric orientation is less than 90 degrees. First and second light sources are disposed on a first side of the light guide, and configured to project light towards a corresponding one of the first and second eccentric microstructures.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: February 6, 2024
    Assignee: TPK TOUCH SOLUTIONS (XIAMEN) INC.
    Inventors: Ming-Chuan Lin, Sheh-Jung Lai, Kuo-Hsin Wang, Yu-Ling Chen
  • Publication number: 20240028136
    Abstract: An electronic device and a sensitivity adjustment method of a sensor are disclosed. The method includes: in a situation that a target program is executed by the electronic device, receiving sensing data from a target sensor; activating a sensitivity adjustment rule according to the target program; adjusting the sensing data according to the sensitivity adjustment rule; and providing the adjusted sensing data to the target program.
    Type: Application
    Filed: October 19, 2022
    Publication date: January 25, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Ding-Jun Yin, Chin-Chuan Lin
  • Patent number: 11880521
    Abstract: An electronic device includes an outer housing, a touch display module, and at least one optical assembly. The outer housing has an accommodating portion and an engaging portion. The touch display module is disposed in the accommodating portion and engaged with the engaging portion. The touch display module includes a thin-film transistor substrate, a color filter substrate, and a touch electrode layer. The color filter substrate is disposed on a side of the thin-film transistor substrate facing the outer housing. The touch electrode layer is disposed between the thin-film transistor substrate and the color filter substrate. The optical assembly is disposed on a side of the color filter substrate away from the thin-film transistor substrate.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: January 23, 2024
    Assignee: TPK TOUCH SOLUTIONS (XIAMEN) INC.
    Inventors: Ming-Chuan Lin, Sheh-Jung Lai, Kuo-Hsin Wang, Yu-Ling Chen
  • Patent number: 11875477
    Abstract: A method for correcting abnormal point cloud is disclosed. Firstly, receiving a Primitive Point Cloud Data set by an operation unit for dividing a point cloud array into a plurality of sub-point cloud sets and obtaining a plurality of corresponding distribution feature data according to an original vector data of the Primitive Point Cloud Data set. Furthermore, recognizing the sub-point cloud sets according to the corresponding distribution feature data for correcting recognized abnormal point cloud. Thus, when the point cloud array is rendered to a corresponding image, the color defect of the point cloud array will be improved or decreased for obtaining lossless of the corresponding image.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: January 16, 2024
    Assignee: National Applied Research Laboratories
    Inventors: Chih-Wei Wang, Chuan-Lin Lai, Chia-Chen Kuo, I-Chen Wu
  • Patent number: 11870344
    Abstract: The invention provides a voltage doubler switched capacitor circuit capable of detecting short circuit of flying capacitor and a detection method thereof. The voltage doubler switched capacitor circuit provides a way to connect the flying capacitor in parallel to the charging path, and calculate whether it is charged to a predetermined voltage in the designed charging time interval, and then it can effectively detect whether the flying capacitor is short-circuited.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: January 9, 2024
    Assignee: EGALAX EMPIA TECHNOLOGY INC.
    Inventors: Po-Chuan Lin, I-Tsung Lee
  • Publication number: 20230386992
    Abstract: An electronic module is provided, in which a first metal layer, an insulating layer and a second metal layer are sequentially formed on side faces and a non-active face of an electronic component to serve as a capacitor structure, where the capacitor structure is exposed from an active face of the electronic component so that by directly forming the capacitor structure on the electronic component, a distance between the capacitor structure and the electronic component is minimized, such that the effect of suppressing impedance can be optimized.
    Type: Application
    Filed: August 16, 2023
    Publication date: November 30, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang
  • Patent number: 11832432
    Abstract: The present application provides a method of manufacturing a memory device having several word lines (WL) with reduced leakage. The method includes steps of providing a semiconductor substrate defined with an active area and including an isolation surrounding the active area; forming a first recess extending into the semiconductor substrate and across the active area; forming a first lining portion of a first insulating layer conformal to the first recess; disposing a first conductive material conformal to the first lining portion; forming a first conductive member surrounded by the first conductive material; disposing a second conductive material over the first conductive member to form a first conductive layer enclosing the first conductive member; and forming a first protruding portion of the first insulating layer above the first conductive layer and the first conductive member.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: November 28, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chuan-Lin Hsiao
  • Publication number: 20230375768
    Abstract: A display device includes a light guide plate substrate having a first area, a plurality of first eccentric microstructures positioned in the first area with a first eccentric orientation, a second area arranged at one side of the first area, and second eccentric microstructures positioned in the second area with a second eccentric orientation. An angle between the first eccentric orientation and the second eccentric orientation is less than 90 degrees. First and second light sources are disposed on a first side of the light guide, and configured to project light towards a corresponding one of the first and second eccentric microstructures.
    Type: Application
    Filed: May 20, 2022
    Publication date: November 23, 2023
    Inventors: Ming-Chuan LIN, Sheh-Jung LAI, Kuo-Hsin WANG, Yu-Ling CHEN
  • Patent number: 11819756
    Abstract: A controller and a wire take-up assembly thereof are provided. The wire take-up assembly can be installed on a side of a grip, so as to accommodate a connection wire. The wire take-up assembly includes an accommodating body and an operating component. The accommodating body has an accommodating groove, and the accommodating groove can accommodate a part of the connection wire. A part of the operating component is located in the accommodating groove. The operating component can move relative to the accommodating body, so that the connection wire in the accommodating groove is pulled by the operating component and a part of the connection wire exposed outside the accommodating groove is accommodated into the accommodating groove. Accordingly, the controller and the wire take-up assembly thereof can quickly accommodate the connection wire.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: November 21, 2023
    Assignee: DEXIN CORPORATION
    Inventors: Ho-Lung Lu, Tsai-Chuan Lin
  • Publication number: 20230360848
    Abstract: An EMI filter system includes a circuit board and a choke. The circuit board includes at least three capacitors. The choke mounts on the circuit board and includes a non-circular magnetic core and at least three windings. The at least three windings are wound on the non-circular magnetic core. The at least three capacitors are disposed adjacent to the choke, and first outlet ends of the at least three windings are respectively connected to the corresponding at least three capacitors.
    Type: Application
    Filed: February 16, 2023
    Publication date: November 9, 2023
    Inventors: Chun-Wei Wu, Chia-Hao Yeh, Hung-Chuan Lin
  • Publication number: 20230343664
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20230343665
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20230343663
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Patent number: 11795224
    Abstract: The present disclosure provides an anti-T-cell nanobody that specifically binds to CD3 ?. The present disclosure also provides the nucleic acid sequence of the anti-T-cell nanobody, use of the anti-T-cell nanobody for treating cancer, immunoregulation and activating immune cells, and a method for detecting expression levels of CD3 ?.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: October 24, 2023
    Assignee: CHINA MEDICAL UNIVERSITY HOSPITAL
    Inventors: Der-Yang Cho, Shao-Chih Chiu, Shi-Wei Huang, Chih-Ming Pan, Mei-Chih Chen, Yu-Chuan Lin, Yeh Chen
  • Patent number: D1016414
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: February 27, 2024
    Inventors: Michael Joseph Zucco, Cheng Chuan Lin