Abstract: A heat dissipation apparatus with energy-saving effect is coupled to an operation unit, and the heat dissipation apparatus includes a control unit and a drive circuit. The control unit determines whether the operation unit enters an energy-saving mode according to a first signal provided by the operation unit. The control unit shields a plurality of second signals provided to the drive circuit according to the energy-saving mode. The drive circuit does not drive the heat dissipation unit and the heat dissipation unit enters an inertia deceleration.

Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate having a first side, a second side opposite to the first side, and at least one light-sensing region close to the first side. The image sensor device includes a dielectric feature covering the second side and extending into the semiconductor substrate. The dielectric feature in the semiconductor substrate surrounds the light-sensing region. The image sensor device includes a reflective layer in the dielectric feature in the semiconductor substrate, wherein a top portion of the reflective layer protrudes away from the second side, and a top surface of the reflective layer and a top surface of the insulating layer are substantially coplanar.

Abstract: A fan blade includes an arch-shaped body, a connecting portion, at least one sheet and at least one reinforcement component. The arch-shaped body has a pressure bearing surface and a negative pressure surface opposite to the pressure bearing surface. The connecting portion is connected to a first end portion of the arch-shaped body. The sheet is connected to the pressure bearing surface or the negative pressure surface. The reinforcement component is connected to the pressure bearing surface. An orthogonal projection of the sheet on the arch-shaped body and an orthogonal projection of the reinforcement component on the arch-shaped body are not overlapped with each other. A fan is also provided.

Abstract: The present disclosure describes an exemplary fin structure formed on a substrate. The disclosed fin structure comprises an n-type doped region formed on a top portion of the substrate, a silicon epitaxial layer on the n-type doped region, and an epitaxial stack on the silicon epitaxial layer, wherein the epitaxial stack comprises a silicon-based seed layer in physical contact with the silicon epitaxial layer. The fin structure can further comprise a liner surrounding the n-type doped region, and a dielectric surrounding the liner.

Abstract: An observation carrier includes a bottom base, a lower cover, an upper cover, and a rotation cover. The bottom has at least one first positioning portion. The lower cover has at least one second positioning portion, and at least one third positioning portion. The lower cover is detachably disposed on the bottom base and positioned with the first positioning portion through the second positioning portion. The upper cover has at least one fourth positioning portion and is detachably disposed on the bottom base. The upper cover is positioned with the third positioning portion through the fourth positioning portion. An observation region is formed between the upper cover and the lower cover. The rotation cover is detachably disposed on the bottom base to limit the upper and lower covers on the bottom base. The rotation cover is adapted to rotate to be locked or released by the bottom base.

Abstract: An observation carrier for a microscope is provided. The observation carrier includes a bottom base, an upper cover, and a chip. The upper cover is detachably disposed on the bottom base and has a window. The chip is integrated on the upper cover and includes a main body and a plurality of electrodes. The main body has an observation region, and the observation region corresponds to the window and is adapted to carry a sample material. The electrodes are disposed on the main body and are connected to the observation region.

Abstract: An HDMI transmission device includes a packetizer circuit and a processor. A control method of controlling the HDMI transmission device includes performing a fixed rate link training, upon passing the fixed data rate link training, the processor transmitting an initial gap packet generation command to a controller of the packetizer circuit to output a selection signal to the packetizer circuit, so as to output an initial gap packet, when video data is not ready, continuously outputting the initial gap packet, when the video data is ready and a format change of the video data is detected or a signal abnormality unrelated to hot-plugging is detected, the processor transmitting a subsequent gap packet generation command to the controller to determine whether a block boundary is reached, and the controller switching the selection signal upon reaching the block boundary for the packetizer circuit to output the subsequent gap packet.

Abstract: A transistor device having fin structures, source and drain terminals, channel layers and a gate structure is provided. The fin structures are disposed on a material layer. The fin structures are arranged in parallel and extending in a first direction. The source and drain terminals are disposed on the fin structures and the material layer and cover opposite ends of the fin structures. The channel layers are disposed respectively on the fin structures, and each channel layer extends between the source and drain terminals on the same fin structure. The gate structure is disposed on the channel layers and across the fin structures. The gate structure extends in a second direction perpendicular to the first direction. The materials of the channel layers include a transition metal and a chalcogenide, the source and drain terminals include a metallic material, and the channel layers are covalently bonded with the source and drain terminals.

Abstract: A coin battery testing device, including a bottom base, an upper cover, a positive conducting structure, and a negative conducting structure, is provided. The bottom base has an observation region and is adapted to carry a coin battery by the observation region. The upper cover is detachably connected to the bottom base and adapted to cover the coin battery on the observation region. The upper cover has an opening and the opening corresponds to the observation region, such that the coin battery is adapted to be observed through the opening. The positive conducting structure is disposed on the bottom base and adapted to be connected to a positive electrode of the coin battery on the observation region. The negative conducting structure is disposed on the bottom base and adapted to be connected to a negative electrode of the coin battery on the observation region.

Abstract: A tool for a bone implant includes a sleeve and a transmission rod including a transmission member disposed on an end of a shaft. Another end of the shaft is located outside of the sleeve. The transmission member is received in the sleeve and includes a first compartment and a plurality of first teeth surrounding the first compartment. A drilling rod includes a second compartment and a plurality of second teeth surrounding the second compartment. A coupling portion is disposed between the second compartment and a bit. The coupling portion is coupled with the sleeve. The bit is located outside of the sleeve. Two magnets are disposed in the first and second compartments, respectively. Two same poles respectively of the two magnets face each other.

Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process.

Abstract: A semiconductor device includes a semiconductor fin, a gate structure, a capacitor structure, a conductive contact, and a hard mask layer. The gate structure is disposed across the semiconductor fin. The capacitor structure is disposed on the gate structure. The capacitor structure includes a ferroelectric layer. The conductive contact is disposed on the capacitor structure. The hard mask layer laterally surrounds the conductive contact. The conductive contact protrudes from a top surface of the hard mask layer.

Abstract: An electrical connector assembly includes a seat unit and a cover unit. The seat unit defines a receiving cavity for receiving the CPU. The cover unit is pivotably mounted upon one end of the seat unit. The cover unit includes a first cover and a second cover surrounding the first cover. The first cover includes a first frame equipped with therein a floating heat sink which is located above and aligned with the receiving cavity. The heat sink forms a pair of side extensions sandwiched between a pair of pressing blocks and the first frame in a vertical direction and essentially downwardly pressed by the pair of pressing blocks of the first cover in a resilient manner. Resilient mechanism is provided between the pressing block and the heat sink to result in a downward force constantly urge the heat sink downwardly against the first frame.

Abstract: A negative capacitance device includes a semiconductor layer. An interfacial layer is disposed over the semiconductor layer. An amorphous dielectric layer is disposed over the interfacial layer. A ferroelectric layer is disposed over the amorphous dielectric layer. A metal gate electrode is disposed over the ferroelectric layer. At least one of the following is true: the interfacial layer is doped; the amorphous dielectric layer has a nitridized outer surface; a diffusion-barrier layer is disposed between the amorphous dielectric layer and the ferroelectric layer; or a seed layer is disposed between the amorphous dielectric layer and the ferroelectric layer.

Abstract: A method includes performing a first post Chemical Mechanical Polish (CMP) cleaning on a wafer using a first brush. The first brush rotates to clean the wafer. The method further includes performing a second post-CMP cleaning on the wafer using a second brush. The second brush rotates to clean the wafer. The first post-CMP cleaning and the second post-CMP cleaning are performed simultaneously.

Abstract: A semiconductor device includes a substrate, a first poly-material pattern, a first conductive element, a first semiconductor layer, and a first gate structure. The first poly-material pattern is over and protrudes outward from the substrate, wherein the first poly-material pattern includes a first active portion and a first poly-material portion joined to the first active portion. The first conductive element is over the substrate, wherein the first conductive element includes the first poly-material portion and a first metallic conductive portion covering at least one of a top surface and a sidewall of the first poly-material portion. The first semiconductor layer is over the substrate and covers the first active portion of the first poly-material pattern and the first conductive element. The first gate structure is over the first semiconductor layer located within the first active portion.

Abstract: A method for manufacturing an ultra-thin glass substrate includes: providing a glass base material preset with n substrate areas and a skeleton area surrounding the substrate areas; at least forming an etching protection layer on an upper surface and a lower surface of each substrate area of the glass base material, respectively; at least etching the skeleton area of the glass base material to separate the substrate areas from the glass base material, and form a stress dissipation edge along an edge of each substrate area; and removing the etching protection layer to get independent glass substrates. A method for manufacturing a display panel is also disclosed. An aim is to prevent quality of the ultra-thin glass substrate from damage caused by scribing wheel cutting or laser cutting, therefore the quality of the ultra-thin glass substrate is improved.

Abstract: A heat dissipation system of portable electronic device includes a body, at least one fan and at least one spacing member. At least one heat source of the portable electronic device is arranged in the body. The fan is a centrifugal fan disposed in the body. The fan has at least one flow inlet located in the axial direction and at least one flow outlet located in the radial direction. The spacing member is disposed on at least one of the body or the fan to form a stratified air flow in the body along the axial direction. The stratified air flows into the fan through the flow inlet and out of the fan through the flow outlet respectively.

Abstract: A time signal generating circuit of a power converter and a control method thereof are provided. The time signal generating circuit includes a reference frequency generating circuit, an on-time circuit and a frequency tracking circuit. The reference frequency generating circuit provides a reference frequency signal. The on-time circuit provides an on-time signal according to a first reference signal and a second reference signal. The second reference signal is related to an output voltage of the power converter. The frequency tracking circuit is coupled to the reference frequency generating circuit and the on-time circuit, and compares frequencies of the reference frequency signal and the on-time signal within a default time to generate a tracking signal. The on-time circuit adjusts the second reference signal according to the tracking signal, so that the on-time circuit adjusts the frequency of the on-time signal.

Abstract: A data conversion device includes a storage circuit and a frequency tuning circuit. The storage circuit is configured to store a pixel data in a high definition multimedia interface (HDMI) signal according to a first clock, and output an image data according to a second clock. The frequency tuning circuit is configured to adjust the second clock according to a control signal and the second clock in the HDMI signal, and transmit the adjusted second clock to the storage circuit.