Patents by Inventor Chun Chieh

Chun Chieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220123003
    Abstract: In an embodiment, a method includes forming a multi-layer stack including alternating layers of an isolation material and a semiconductor material, patterning the multi-layer stack to form a first channel structure in a first region of the multi-layer stack, where the first channel structure includes the semiconductor material, depositing a memory film layer over the first channel structure, etching a first trench extending through a second region of the multi-layer stack to form a first dummy bit line and a first dummy source line in the second region, where the first dummy bit line and first dummy source line each include the semiconductor material, and replacing the semiconductor material of the first dummy bit line and the first dummy source line with a conductive material to form a first bit line and a first source line.
    Type: Application
    Filed: October 21, 2020
    Publication date: April 21, 2022
    Inventors: Bo-Feng Young, Sai-Hooi Yeong, Chi On Chui, Chun-Chieh Lu, Yu-Ming Lin
  • Publication number: 20220124937
    Abstract: A heat dissipation device includes a heat dissipation member and a fan. The heat dissipation member includes a first heat dissipation fin group and a second heat dissipation fin group stacked on the first heat dissipation fin group. The first heat dissipation fin group includes a plurality of first heat dissipation fins, and the second heat dissipation fin group includes a plurality of second heat dissipation fins. The fan is stacked on the second heat dissipation fin group. The fan is configured to rotate around an axis. The first heat dissipation fins and the second heat dissipation fins are arranged around the axis.
    Type: Application
    Filed: October 19, 2021
    Publication date: April 21, 2022
    Applicant: Acer Incorporated
    Inventors: Shu-Hao Kuo, Wen-Neng Liao, Cheng-Wen Hsieh, Tsung-Ting Chen, Chun-Chieh Wang, Chi-Tai Ho, Kuan-Lin Chen
  • Patent number: 11309784
    Abstract: The disclosure provides a power conversion circuit with a multi-function pin and a multi-function setting method thereof. The multi-function pin is coupled to an external setting circuit. The power conversion circuit includes a first function circuit, a second function circuit, and a judging circuit. The first function circuit is coupled to the multi-function pin. The second function circuit is coupled to the multi-function pin. The judging circuit is coupled to the multi-function pin, the first function circuit, and the second function circuit. The judging circuit provides a setting current to the multi-function pin, so that the external setting circuit generates a voltage according to the setting current. The judging circuit judges the type of external setting circuit according to voltage so as to activate the first function circuit or the second function circuit accordingly.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: April 19, 2022
    Assignee: uPI Semiconductor Corp.
    Inventors: Chih-Lien Chang, Chun-Chieh Wang
  • Patent number: 11309144
    Abstract: A pressing device includes a base board, an upper board unit that is disposed over the base board, and an intermediate unit that is disposed between the base board and the upper board unit. The upper board unit includes a panel, a circuit board, and a tact switch. The intermediate unit includes a middle portion that corresponds in position to the tact switch, a surrounding frame member, and a plurality of interconnecting board members. When the upper board unit is pressed, at least one of the interconnecting board members is deformed, and the middle portion is driven to convert the tact switch from an initial state to a triggered state.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: April 19, 2022
    Assignee: SUNREX TECHNOLOGY CORP.
    Inventors: Shih-Pin Lin, Chun-Chieh Chen, Ling-Cheng Tseng, Yu-Shuo Yang
  • Publication number: 20220114303
    Abstract: A hardware-in-the-loop (HIL) simulation device is provided, which includes a processing circuit and a pulse-width modulation (PWM) signal observation circuit. The PWM signal observation circuit includes an energy storage unit and the energy storage unit is coupled to the processing circuit. A signal source transmits a PWM signal to the processing circuit and the PWM signal observation circuit, and the energy storage unit is charged when the PWM signal is at high level. The processing circuit detects the voltage of the energy storage unit when detecting the falling edge of the PWM signal so as to calculate the duty cycle of the PWM signal.
    Type: Application
    Filed: December 24, 2020
    Publication date: April 14, 2022
    Inventors: CHUN-AN LIN, WEN-CHE SHEN, CHIH-WEI YEH, PO-HUAN CHOU, CHUN-CHIEH CHANG, YU-HSUN WU
  • Publication number: 20220114213
    Abstract: A non-transitory computer-readable storage medium storing a set of instructions executable by a processor. The set of instructions is operable to receive a current patient set of data relating to a current patient; compare the current patient set of data to a plurality of previous patient sets of data, each of the previous patient sets of data corresponding to a previous patient; select one of the previous patient sets of data based on a level of similarity between the selected previous patient set of data and the current patient set of data; and provide the selected previous patient set of data to a user.
    Type: Application
    Filed: November 1, 2021
    Publication date: April 14, 2022
    Inventors: LILLA BOROCZKY, MARK R. SIMPSON, YE XU, MICHAEL CHUN-CHIEH LEE
  • Publication number: 20220115243
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first layer over a substrate. The method includes forming a stop layer over the first layer. The method includes forming a second layer over the stop layer. The second layer is in direct contact with the stop layer. The method includes partially removing the second layer. The method includes performing an etching process to partially remove the stop layer and an upper portion of the first layer, wherein protrusion structures are formed over a lower portion of the first layer after the etching process, and the protrusion structures include the stop layer and the upper portion of the first layer remaining after the etching process. The method includes removing the protrusion structures.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 14, 2022
    Inventors: Yu-Chen WEI, Chun-Chieh CHAN, Chun-Jui CHU, Jen-Chieh LAI, Shih-Ho LIN
  • Patent number: 11303042
    Abstract: A communication device includes a display device, a first antenna element, a second antenna element, a third antenna element, and a fourth antenna element. The display device is surrounded by the first antenna element, the second antenna element, the third antenna element, and the fourth antenna element. Any adjacent two of the first antenna element, the second antenna element, the third antenna element, and the fourth antenna element have different polarization directions.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: April 12, 2022
    Assignee: HTC CORPORATION
    Inventors: Cheng-Hung Lin, Szu-Po Wang, Chun-Chieh Wang, Yu-Yu Chen, Shih-Hua Wu, Dun-Yuan Cheng
  • Patent number: 11302695
    Abstract: In a method for forming an integrated semiconductor device, a first transistor over is formed on a substrate; an inter-layer dielectric (ILD) layer is deposited over the first transistor; a gate conductive layer is deposited over the ILD layer; a gate dielectric layer is deposited over the gate conductive layer; the gate dielectric layer and the gate conductive layer are etched to form a gate stack; and a 2D material layer that has a first portion extending along a top surface and sidewalls of the gate stack and a second portion extending along a top surface of the ILD layer.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Yi Peng, Chun-Chieh Lu, Meng-Hsuan Hsiao, Ling-Yen Yeh, Carlos H. Diaz, Tung-Ying Lee
  • Patent number: 11301175
    Abstract: A method for controlling a storage device is provided. The method may include: transmitting an initial command conforming to a first communications protocol and a data payload comprising a command parameter to the storage device, wherein the command parameter conforms to a second communications protocol; transmitting a setting command conforming to the first communications protocol to the storage device; and generating an operation command conforming to the second communications protocol according to the initial command, the setting command and the data payload comprising the command parameter. More particularly, the initial command and the setting command are different commands.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: April 12, 2022
    Assignee: Silicon Motion, Inc.
    Inventor: Chun-Chieh Chen
  • Patent number: 11302529
    Abstract: A method includes: providing a bottom layer; depositing a first seed layer over the bottom layer, the first seed layer having at least one of a tetragonal crystal phase and an orthorhombic crystal phase; depositing a dielectric layer over the bottom layer adjacent to the first seed layer, the dielectric layer including an amorphous crystal phase; depositing an upper layer over the dielectric layer; performing a thermal operation on the dielectric layer; and cooling the dielectric layer, wherein after the cooling the dielectric layer becomes a ferroelectric layer.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: April 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Chieh Lu, Sai-Hooi Yeong, Yu-Ming Lin
  • Patent number: 11302734
    Abstract: A method includes etching a semiconductor substrate to form a trench, filling a dielectric layer into the trench, with a void being formed in the trench and between opposite portions of the dielectric layer, etching the dielectric layer to reveal the void, forming a diffusion barrier layer on the dielectric layer, and forming a high-reflectivity metal layer on the diffusion barrier layer. The high-reflectivity metal layer has a portion extending into the trench. A remaining portion of the void is enclosed by the high-reflectivity metal layer.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: April 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Chi Wu, Chun-Chieh Fang, Bo-Chang Su, Chien Nan Tu, Yu-Lung Yeh, Kun-Yu Lin, Shih-Shiung Chen
  • Patent number: 11302686
    Abstract: A high-voltage circuitry device is provided. The high-voltage circuitry device includes a high-voltage transistor, a protection component and a feedback component. The high-voltage transistor has a gate, a drain and a source. The protection component is coupled between the source of the high-voltage transistor and the ground. When a current corresponding to an electrostatic discharge (ESD) event flows through the drain of the high-voltage transistor, the current flows from the drain of the high-voltage transistor to the ground through the high-voltage transistor and the protection component. The feedback component is coupled between the protection component, the ground and the gate of the high-voltage transistor. When the ESD event occurs, the feedback component enables the high-voltage transistor to stay on a turned-on state to pass the current.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: April 12, 2022
    Assignee: Nuvoton Technology Corporation
    Inventors: Yi-Hao Chen, Tsu-Yi Wu, Chih-Hsun Lu, Po-An Chen, Chun-Chieh Liu
  • Publication number: 20220109908
    Abstract: A detection circuit and a wake-up method are provided. The detection circuit is adapted to a high definition multimedia interface (HDMI) receiver that enters a power-saving mode in a fixed rate link (FRL) mode to detect whether or not an HDMI transmitter starts to transmit video packets through the FRL. The detection circuit includes a signal detection circuit detecting whether or not signal exists on the FRL and an FRL packet determination circuit determining whether or not the FRL packets are the video packets according to a variable value characteristic of the video packets and/or a fixed value characteristic of gap packets. An existence of the signal on the FRL indicates an existence of FRL packets on the FRL. When the FRL packets are the video packets, the FRL packet determination circuit wakes the HDMI receiver from the power-saving mode to resolve the video packets and display videos.
    Type: Application
    Filed: July 5, 2021
    Publication date: April 7, 2022
    Inventors: CHUN-CHIEH CHAN, MING-AN WU, CHIA-HAO CHANG, CHIEN-HSUN LU
  • Publication number: 20220108850
    Abstract: A pressing device includes a base board, an upper board unit that is disposed over the base board, and an intermediate unit that is disposed between the base board and the upper board unit. The upper board unit includes a panel, a circuit board, and a tact switch. The intermediate unit includes a middle portion that corresponds in position to the tact switch, a surrounding frame member, and a plurality of interconnecting board members. When the upper board unit is pressed, at least one of the interconnecting board members is deformed, and the middle portion is driven to convert the tact switch from an initial state to a triggered state.
    Type: Application
    Filed: January 13, 2021
    Publication date: April 7, 2022
    Applicant: SUNREX TECHNOLOGY CORP.
    Inventors: Shih-Pin LIN, Chun-Chieh CHEN, Ling-Cheng TSENG, Yu-Shuo YANG
  • Patent number: 11295909
    Abstract: A keyswitch device includes a connecting member and a keycap. The connecting member has an engaging shaft. The keycap includes a pressing body and a shaft hole structure. The pressing body has a bottom surface. The shaft hole structure is connected to the bottom surface and has an engaging trough and an inlet passage communicated with each other. The engaging shaft is rotatably engaged in the engaging trough. The inlet passage has a first inner wall and a second inner wall opposite and parallel to each other. The first inner wall and the second inner wall are inclined relative to the bottom surface of the pressing body.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: April 5, 2022
    Assignee: Chicony Electronics Co., Ltd.
    Inventors: Chao-Chin Hsieh, Chun-Chieh Chan, Ping-Chen Li
  • Patent number: 11292101
    Abstract: A chemical mechanical polishing apparatus is provided. The chemical mechanical polishing apparatus includes a polishing pad, a pad conditioner, a measurement tool, and a controller. The polishing pad is provided in a processing chamber for polishing a wafer placed on the polishing surface of the polishing pad. The pad conditioner is configured to condition the polishing surface. The measurement tool is provided in the processing chamber and configured to measure the downward force of the pad conditioner. The controller is coupled to the pad conditioner and the measurement tool, and is configured to adjust the downward force of the pad conditioner in response to an input from the measurement tool.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: April 5, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Chen Wei, Jheng-Si Su, Shih-Ho Lin, Jen-Chieh Lai, Chun-Chieh Chan
  • Publication number: 20220101804
    Abstract: An electronic device with auxiliary lighting function and an operation method thereof are provided. The electronic device includes a first body, a light-emitting module, and a processing module. The first body has a first surface. The light-emitting module is located on the first surface of the first body. The processing module is coupled to the light-emitting module, and is used to determine an operation of a first power supply mode or a second power supply mode according to a current power supply state. When the processing module is operated in the first power supply mode, the processing module dynamically adjusts an auxiliary illumination light provided by the light-emitting module according to a battery power. When the processing module is operated in the second power supply mode, the processing module dynamically adjusts the auxiliary illumination light provided by the light-emitting module according to a sensing result.
    Type: Application
    Filed: June 16, 2021
    Publication date: March 31, 2022
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Po-Yang Chien, Hao-Jen Fang, Wei-Yi Chang, Chun-Chieh Chen, Chen-Cheng Wang, Chih-Wen Chiang
  • Publication number: 20220100259
    Abstract: A chip includes a receiving, a transmission, a control, and a switch circuit. The receiving circuit is operated at a first voltage and receives a first data. The transmission circuit is operated at the first voltage. Under general mode, the control circuit is operated at a second voltage and generates a second data to the transmission circuit according to the first data. The control circuit includes a first clock source configured to provide a first clock under general mode. The control circuit is operated according to the first clock. Under general mode, the switch circuit is operated at the first voltage, and controls the second voltage to pause the second voltage supplying to the control circuit to enter sleep mode. Under sleep mode, the switch circuit controls the supply of the second voltage: to the control circuit according to the first data to return to general mode.
    Type: Application
    Filed: December 24, 2020
    Publication date: March 31, 2022
    Inventors: CHUN-CHIEH CHAN, HENG-YI CHEN, HSING-YU LIN
  • Patent number: 11287908
    Abstract: A pressing device for a touchpad includes a base unit, an upper board unit, and an intermediate unit. The upper board unit includes a trigger switch aligned with the abutment portion of the base unit. The intermediate unit has a surrounding frame member, two positioning members, two connecting members, and a actuating member that are interconnected by a plurality of linking ribs. When the upper board is pressed at a position above one of the surrounding frame member and the connecting members, one of the connecting members is moved relative to the actuating member by virtue of the linking ribs, and the actuating member provides a force to convert the trigger switch from an initial state to a triggered state.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: March 29, 2022
    Assignee: SUNREX TECHNOLOGY CORP.
    Inventors: Shih-Pin Lin, Chun-Chieh Chen, Ling-Cheng Tseng, Yu-Shuo Yang