Abstract: A method for operating an automated food making apparatus having a motor, actuator arm, and an apparatus. The apparatus may be a paddle with flexible fins. The method rotates the paddle with a pin-shaft mechanism to dispense an ingredient placed in a canister, controls the motor automatically based on weight sensor readings, and locates a position of the actuator arm with position sensors. The same motor dispenses ingredients from a plurality of canisters. The method may have a plurality of paddle rotation and weight measurement steps until a target weight is reached. The plurality of paddle rotation steps may be unidirectional or bidirectional paddle rotation. The paddle may be rotated according to one or more paddle rotation algorithms, an error recovery algorithm, or different algorithms based on the amounts of ingredients remaining in the canister. The paddle may be rocked until the target weight is achieved.

Abstract: Some embodiments include an integrated assembly having a polycrystalline first semiconductor material, and having a second semiconductor material directly adjacent to the polycrystalline first semiconductor material. The second semiconductor material is of a different composition than the polycrystalline first semiconductor material. A conductivity-enhancing dopant is within the second semiconductor material. The conductivity-enhancing dopant is a neutral-type dopant relative to the polycrystalline first semiconductor material. An electrical gate is adjacent to a region of the polycrystalline first semiconductor material and is configured to induce an electric field within said region of the polycrystalline first semiconductor material. The gate is not adjacent to the second semiconductor material.

Abstract: A device includes a string driver comprising a channel region between a drain region and a source region. At least one of the channel region, the drain region, and the source region comprises a high band gap material. A gate region is adjacent and spaced from the high band gap material. The string driver is configured for high-voltage operation in association with an array of charge storage devices (e.g., 2D NAND or 3D NAND). Additional devices and systems (e.g., non-volatile memory systems) including the string drivers are disclosed, as are methods of forming the string drivers.

Abstract: Provided are a device comprising a bit cell tile including at least two memory cells, each of the at least two memory cells including a resistive memory element, and methods of operating an array of the memory cells, each memory cell including a resistive memory element electrically coupled in series to a corresponding first transistor and to a corresponding second transistor, the first transistor including a first gate coupled to a corresponding one of a plurality of first word lines and the second transistor including a second gate coupled to a corresponding one of a plurality of second word lines, each memory cell coupled between a corresponding one of a plurality of bit lines and a corresponding one of a plurality of source lines. The methods may include applying voltages to the first word line, second word line, source line, and bit line of a memory cell selected for an operation, and resetting the resistive memory element of the memory cell in response to setting the selected bit line to ground.

Abstract: The present invention provides a method of authenticating a transaction, the method having: responsive to receiving a request for authenticating a transaction involving a first device and including first device information defining at least one first device characteristic of the first device, obtaining second device information defining at least one second device characteristic of a second device associated with the transaction; determining a level of correlation between the first device information and the second device information; and authenticating the transaction based on the level of correlation between the first device information and the second device information, wherein the transaction is authenticated when the level of correlation between the first device information and the second device information is above a pre-determined threshold.

Abstract: An authentication method for use in a device and comprises monitoring a program behavior stream comprising a plurality of program observables that comprises a program observable. The method records the program observable and matches the recorded first program observable to a program model selected from a plurality of program models stored within a program store. A user model is selected from a plurality of user models stored within a user store corresponding to the program model. A user behavior stream corresponding to the program observable is monitored and a user observable contained in the user behavior stream is recorded. The user observable is correlated to the user model and an authentication state associated with the device is determined based on the correlating.

Abstract: A dampened hinge construction for braking pivoting movement of one structure relative to another. The dampened hinge construction can be utilized in a folding table assembly in an aircraft passenger suite including a base panel and at least one folding panel pivotally attached to the base panel by multiple dampened hinges. Each dampened hinge includes a first assembly attachable to a first structure and a second assembly attachable to a second structure such that the first structure is pivotable relative to the second structure between a first condition and a second condition, such as a folded condition and a planar condition, and at least one damper that brakes pivoting movement of the first structure relative to the second structure as the first condition or second condition is approached.

Abstract: Systems, apparatuses, and methods related to semiconductor structure formation are described. An example apparatus includes a first trench and a second trench formed in a semiconductor substrate material, where the first and second trenches are adjacent and separated by the semiconductor substrate material. The apparatus includes a metallic material formed to a first height in the first trench that is less than, relative to the semiconductor substrate material, a second height of the metallic material formed in the second trench and a polysilicon material formed over the metallic material in the first trench to a first depth greater than, relative to the semiconductor substrate material, a second depth of the polysilicon material formed over the metallic material in the second trench. The greater first depth of the polysilicon material formed in the first trench reduces transfer of charge by way of the metallic material in the first trench.

Abstract: Some embodiments include an integrated assembly having a polycrystalline first semiconductor material, and having a second semiconductor material directly adjacent to the polycrystalline first semiconductor material. The second semiconductor material is of a different composition than the polycrystalline first semiconductor material. A conductivity-enhancing dopant is within the second semiconductor material. The conductivity-enhancing dopant is a neutral-type dopant relative to the polycrystalline first semiconductor material. An electrical gate is adjacent to a region of the polycrystalline first semiconductor material and is configured to induce an electric field within said region of the polycrystalline first semiconductor material. The gate is not adjacent to the second semiconductor material.

Abstract: Some embodiments include an integrated assembly having a memory array, and having digit lines extending along a first direction through the memory array. Insulative spacers are along sidewalls of the digit lines. The insulative spacers extend continuously along the digit lines through the memory array. Conductive regions are laterally spaced from the digit lines by intervening regions. The conductive regions are configured as segments spaced apart from one another along the first direction. The intervening regions include regions of the insulative spacers and include void regions adjacent the regions of the insulative spacers. The void regions are configured as void-region-segments which are spaced apart from one another along the first direction by insulative structures. Storage-elements are associated with the conductive regions. Some embodiments include methods of forming integrated assemblies.

Abstract: A device includes a string driver comprising a channel region between a drain region and a source region. At least one of the channel region, the drain region, and the source region comprises a high band gap material. A gate region is adjacent and spaced from the high band gap material. The string driver is configured for high-voltage operation in association with an array of charge storage devices (e.g., 2D NAND or 3D NAND). Additional devices and systems (e.g., non-volatile memory systems) including the string drivers are disclosed, as are methods of forming the string drivers.

Abstract: Systems and techniques are disclosed for generating entries for a searchable index based on rules generated by one or more machine-learned models. The index entries can include one or more tokens correlated with an outcome and an outcome probability. A subset of tokens can be identified based on the characteristics of an event. The index may be searched for outcomes and their respective probabilities that correspond to tokens that are similar to or match the subset of tokens based on the event.

Abstract: A dampened hinge construction for braking pivoting movement of one structure relative to another. The dampened hinge construction can be utilized in a folding table assembly in an aircraft passenger suite including a base panel and at least one folding panel pivotally attached to the base panel by multiple dampened hinges. Each dampened hinge includes a first assembly attachable to a first structure and a second assembly attachable to a second structure such that the first structure is pivotable relative to the second structure between a first condition and a second condition, such as a folded condition and a planar condition, and at least one damper that brakes pivoting movement of the first structure relative to the second structure as the first condition or second condition is approached.

Abstract: An array of vertical transistors comprises spaced pillars individually comprising a channel region of individual vertical transistors. A horizontally-elongated conductor line directly electrically couples together individual of the channel regions of the pillars of a plurality of the vertical transistors. An upper source/drain region is above the individual channel regions of the pillars, a lower source/drain region is below the individual channel regions of the pillars, and a conductive gate line is operatively aside the individual channel regions of the pillars and that interconnects multiple of the vertical transistors. Methods are disclosed.

Abstract: An example apparatus includes a first source/drain region and a second source/drain region formed in a substrate to form an active area of the apparatus. The first source/drain region and the second source/drain region are separated by a channel. The apparatus includes a gate opposing the channel. A sense line is coupled to the first source/drain region and a storage node is coupled to the second source/drain region. An isolation trench is adjacent to the active area. The trench includes a dielectric material with a conductive bias opposing the conductive bias of the channel in the active area.

Abstract: A method for operating an automated food making apparatus having a motor, actuator arm, and an apparatus. The apparatus may be a paddle with flexible fins. The method rotates the paddle with a pin-shaft mechanism to dispense an ingredient placed in a canister, controls the motor automatically based on weight sensor readings, and locates a position of the actuator arm with position sensors. The same motor dispenses ingredients from a plurality of canisters. The method may have a plurality of paddle rotation and weight measurement steps until a target weight is reached. The plurality of paddle rotation steps may be unidirectional or bidirectional paddle rotation. The paddle may be rotated according to one or more paddle rotation algorithms, an error recovery algorithm, or different algorithms based on the amounts of ingredients remaining in the canister. The paddle may be rocked until the target weight is achieved.

Abstract: A system for authentication for a user device associated with a user, said system comprising: a processing system to generate a first user interface running on a screen of said user device, said first user interface comprising one or more components, wherein said one or more components comprises a first icon, which when activated, directs a user to a second user interface to select a secret pattern, a second icon, which when activated, generates a current randomly populated keyboard, further wherein said processing system provides a current Personal Identification Number (PIN) to said user by correlating said secret pattern with the current randomly populated keyboard, and a regular keyboard for said user to enter a PIN for authentication.

Abstract: A memory cell includes a first resistive memory element, a second resistive memory element electrically coupled with the first resistive memory element at a common node, and a switching element comprising an input terminal electrically coupled with the common node, the switching element comprising a driver configured to float during one or more operations.

Abstract: A memory device comprises: an array of memory cells arranged in a plurality of columns in a first direction and a plurality of rows in a second direction, wherein each memory cell in the array comprises: a select transistor, wherein a source terminal of the select transistor is coupled to a source line, and wherein a gate terminal of the select transistor is coupled to a word line, and a memory element coupled in series with the select transistor, wherein a first end of the memory element is coupled to a drain terminal of the select transistor, and wherein a second end of the memory element is coupled to a bit line; and a control circuit configured to provide an unselected source line voltage to source lines of unselected memory cells before providing a selected word line voltage to a word line of a selected memory cell.

Abstract: Systems, apparatuses and methods related to access devices formed with conductive contacts are described. An example apparatus may include an access device that includes a field-effect transistor (FET). A vertical pillar may be formed to include a channel of the FET, with a portion of the vertical pillar formed between at least two gates of the FET (i.e., a multi-gate Fin-FET). A conductive contact may be coupled to a body region of the vertical pillar.