Abstract: Systems and techniques are disclosed for generating entries for a searchable index based on rules generated by one or more machine-learned models. The index entries can include one or more tokens correlated with an outcome and an outcome probability. A subset of tokens can be identified based on the characteristics of an event. The index may be searched for outcomes and their respective probabilities that correspond to tokens that are similar to or match the subset of tokens based on the event.

Abstract: A system includes one or more computers and one or more storage devices storing instructions that when executed by the one or more computers cause the computers to implement a combined machine learning model for processing an input including multiple features to generate a predicted output for the machine learning input. The combined model includes: a deep machine learning model configured to process the features to generate a deep model output; a wide machine learning model configured to process the features to generate a wide model output; and a combining layer configured to process the deep model output generated by the deep machine learning model and the wide model output generated by the wide machine learning model to generate the predicted output, in which the deep model and the wide model have been trained jointly on training data to generate the deep model output and the wide model output.

Abstract: A dampened hinge construction for braking pivoting movement of one structure relative to another. The dampened hinge construction can be utilized in a folding table assembly in an aircraft passenger suite including a base panel and at least one folding panel pivotally attached to the base panel by multiple dampened hinges. Each dampened hinge includes a first assembly attachable to a first structure and a second assembly attachable to a second structure such that the first structure is pivotable relative to the second structure between a first condition and a second condition, such as a folded condition and a planar condition, and at least one damper that brakes pivoting movement of the first structure relative to the second structure as the first condition or second condition is approached.

Abstract: A recessed access device comprises a conductive gate in a trench in semiconductor material. A gate insulator is along sidewalls and a base of the trench between the conductive gate and the semiconductor material. A pair of source/drain regions is in upper portions of the semiconductor material on opposing sides of the trench. A channel region is in the semiconductor material below the pair of source/drain regions along the trench sidewalls and around the trench base. At least some of the channel region comprises GaP.

Abstract: A memory cell includes a first resistive memory element, a second resistive memory element electrically coupled with the first resistive memory element at a common node, and a switching element comprising an input terminal electrically coupled with the common node, the switching element comprising a driver configured to float during one or more operations.

Abstract: A method of forming an integrated assembly includes providing a construction having laterally-spaced digit-line-contact-regions and having intervening regions between the laterally-spaced digit-line-contact-regions; forming an expanse of non-conductive-semiconductor-material which extends across the digit-line-contact-regions and the intervening regions; a lower surface of the non-conductive-semiconductor-material being vertically-spaced from upper surfaces of the digit-line-contact-regions; forming openings extending through the non-conductive-semiconductor-material to the digit-line-contact-regions; forming conductive-semiconductor-material-interconnects within the openings and coupled with the digit-line-contact-regions, upper surfaces of the conductive-semiconductor-material-interconnects being beneath the lower surface of the non-conductive-semiconductor-material; and forming metal-containing-digit-lines over the non-conductive-semiconductor-material.

Abstract: A method for authenticating a user using a user device connected to a communications network, the method comprising an implicit phase, wherein said implicit phase comprises performing at least one task within a workflow, said at least one task necessary to move forward within said workflow; storing information associated with said performing of at least one task; comparing said stored information with a stored user profile; and determining whether said authentication of said user is successful or unsuccessful based on said comparing.

Abstract: A memory device includes an array of resistive memory cells wherein each pair of resistive memory cells includes a first switching element electrically coupled in series to a first resistive memory element and a second switching element electrically coupled in series to a second resistive memory element. A source of the first switching element and a source of the second switching element receive a common source line signal.

Abstract: Some embodiments include an integrated assembly having a carrier-sink-structure, and having digit lines over the carrier-sink-structure. Transistor body regions are over the digit lines. Extensions extend from the carrier-sink-structure to the transistor body regions. The extensions are configured to drain excess carriers from the transistor body regions. Lower source/drain regions are between the transistor body regions and the digit lines, and are coupled with the digit lines. Upper source/drain regions are over the transistor body regions, and are coupled with storage elements. Gates are adjacent the transistor body regions. The transistor body regions, lower source/drain regions and upper source/drain regions are together comprised a plurality of transistors. The transistors and the storage elements are together comprised by a plurality of memory cells of a memory array. Some embodiments include methods of forming integrated assemblies.

Abstract: Some embodiments include a method of forming an integrated assembly. Conductive blocks are formed over a construction. Each of the conductive blocks is over a set which includes a pair of storage-element-contact-regions and a digit-line-contact-region. Each of the conductive blocks is entirely laterally surrounded by first insulative material. Central regions of the conductive blocks are removed to split each of the conductive blocks into a first conductive portion over one of the storage-element-contact-regions and a second conductive portion over another of the storage-element-contact-regions. Second insulative material is formed between the first and second conductive portions. Digit-lines are coupled with the digit-line-contact-regions, and storage-elements are coupled with the storage-element-contact-regions.

Abstract: Some embodiments include an integrated assembly having a polycrystalline first semiconductor material, and having a second semiconductor material directly adjacent to the polycrystalline first semiconductor material. The second semiconductor material is of a different composition than the polycrystalline first semiconductor material. A conductivity-enhancing dopant is within the second semiconductor material. The conductivity-enhancing dopant is a neutral-type dopant relative to the polycrystalline first semiconductor material. An electrical gate is adjacent to a region of the polycrystalline first semiconductor material and is configured to induce an electric field within said region of the polycrystalline first semiconductor material. The gate is not adjacent to the second semiconductor material.

Abstract: A system includes one or more computers and one or more storage devices storing instructions that when executed by the one or more computers cause the computers to implement a combined machine learning model for processing an input including multiple features to generate a predicted output for the machine learning input. The combined model includes: a deep machine learning model configured to process the features to generate a deep model output; a wide machine learning model configured to process the features to generate a wide model output; and a combining layer configured to process the deep model output generated by the deep machine learning model and the wide model output generated by the wide machine learning model to generate the predicted output, in which the deep model and the wide model have been trained jointly on training data to generate the deep model output and the wide model output.

Abstract: Systems, apparatuses and methods related to access devices formed with conductive contacts are described. An example apparatus may include an access device that includes a field-effect transistor (FET). A vertical pillar may be formed to include a channel of the FET, with a portion of the vertical pillar formed between at least two gates of the FET (i.e., a multi-gate Fin-FET). A conductive contact may be coupled to a body region of the vertical pillar.

Abstract: Some embodiments include a method of forming an integrated assembly. Conductive blocks are formed over a construction. Each of the conductive blocks is over a set which includes a pair of storage-element-contact-regions and a digit-line-contact-region. Each of the conductive blocks is entirely laterally surrounded by first insulative material. Central regions of the conductive blocks are removed to split each of the conductive blocks into a first conductive portion over one of the storage-element-contact-regions and a second conductive portion over another of the storage-element-contact-regions. Second insulative material is formed between the first and second conductive portions. Digit-lines are coupled with the digit-line-contact-regions, and storage-elements are coupled with the storage-element-contact-regions.

Abstract: Some embodiments include an integrated assembly having an active-region-pillar extending upwardly from a base. The active-region-pillar includes a digit-line-contact-region between a first storage-element-contact-region and a second storage-element-contact-region. A threshold-voltage-inducing-structure is adjacent a lower portion of the active-region-pillar. A first channel region includes a first portion of the active-region-pillar between the digit-line-contact-region and the first storage-element-contact-region. A second channel region includes a second portion of the active-region-pillar between the digit-line-contact-region and the second storage-element-contact-region. A first wordline is adjacent the first portion of the active-region-pillar. A second wordline is adjacent the second portion of the active-region-pillar. A digit-line is coupled with the digit-line-contact-region. First and second storage-elements are coupled with the first and second storage-element-contact-regions.

Abstract: A method for authenticating a user using a user device connected to a communications network, the method comprising an implicit phase, wherein said implicit phase comprises performing at least one task within a workflow, said at least one task necessary to move forward within said workflow; storing information associated with said performing of at least one task; comparing said stored information with a stored user profile; and determining whether said authentication of said user is successful or unsuccessful based on said comparing.

Abstract: Some embodiments include an integrated assembly having an active-region-pillar extending upwardly from a base. The active-region-pillar includes a digit-line-contact-region between a first storage-element-contact-region and a second storage-element-contact-region. A threshold-voltage-inducing-structure is adjacent a lower portion of the active-region-pillar. A first channel region includes a first portion of the active-region-pillar between the digit-line-contact-region and the first storage-element-contact-region. A second channel region includes a second portion of the active-region-pillar between the digit-line-contact-region and the second storage-element-contact-region. A first wordline is adjacent the first portion of the active-region-pillar. A second wordline is adjacent the second portion of the active-region-pillar. A digit-line is coupled with the digit-line-contact-region. First and second storage-elements are coupled with the first and second storage-element-contact-regions.

Abstract: Some embodiments include an integrated assembly having an active-region-pillar extending upwardly from a base. The active-region-pillar includes a digit-line-contact-region between a first storage-element-contact-region and a second storage-element-contact-region. A threshold-voltage-inducing-structure is adjacent a lower portion of the active-region-pillar. A first channel region includes a first portion of the active-region-pillar between the digit-line-contact-region and the first storage-element-contact-region. A second channel region includes a second portion of the active-region-pillar between the digit-line-contact-region and the second storage-element-contact-region. A first wordline is adjacent the first portion of the active-region-pillar. A second wordline is adjacent the second portion of the active-region-pillar. A digit-line is coupled with the digit-line-contact-region. First and second storage-elements are coupled with the first and second storage-element-contact-regions.

Abstract: Systems and techniques are provided for template exploration in a large-scale machine learning system. A method may include obtaining multiple base templates, each base template comprising multiple features. A template performance score may be obtained for each base template and a first base template may be selected from among the multiple base templates based on the template performance score of the first base template. Multiple cross-templates may be constructed by generating a cross-template of the selected first base template and each of the multiple base templates. Performance of a machine learning model may be tested based on each cross-template to generate a cross-template performance score for each of the cross-templates. A first cross-template may be selected from among the multiple cross-templates based on the cross-template performance score of the cross-template. Accordingly, the first cross-template may be added to the machine learning model.

Abstract: Provided are a device comprising a bit cell tile including at least two memory cells, each of the at least two memory cells including a resistive memory element, and methods of operating an array of the memory cells, each memory cell including a resistive memory element electrically coupled in series to a corresponding first transistor and to a corresponding second transistor, the first transistor including a first gate coupled to a corresponding one of a plurality of first word lines and the second transistor including a second gate coupled to a corresponding one of a plurality of second word lines, each memory cell coupled between a corresponding one of a plurality of bit lines and a corresponding one of a plurality of source lines. The methods may include applying voltages to the first word line, second word line, source line, and bit line of a memory cell selected for an operation, and resetting the resistive memory element of the memory cell in response to setting the selected bit line to ground.