Patents by Inventor Dinesh Chopra

Dinesh Chopra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060003675
    Abstract: Titanium nitride layers planarized may be utilized in the production of integrated circuits, and various apparatus utilizing such integrated circuits. Planarizing solutions may be used for removing titanium nitride from the surface of a substrate using a fixed-abrasive planarizing pad. The planarizing solutions take the form of an etchant solution or an oxidizing solution. The etchant solutions are aqueous solutions containing an etchant and a buffer. The etchant contains one or more etching agents selective to titanium nitride. The oxidizing solutions are aqueous solutions containing an oxidizer and a buffer. The oxidizer contains one or more oxidizing agents selective to titanium nitride. In either solution, i.e., etchant or oxidizing solution, the buffer contains one or more buffering agents.
    Type: Application
    Filed: August 30, 2005
    Publication date: January 5, 2006
    Inventors: Dinesh Chopra, Gundu Sabde
  • Patent number: 6964602
    Abstract: Apparatuses and methods for planarizing a microelectronic-device substrate assembly on a planarizing pad. In one aspect of the invention, material is removed from the substrate assembly by pressing the substrate assembly against a planarizing surface of a planarizing pad and moving the substrate assembly across the planarizing surface through a planarizing zone. The method also includes replacing at least a portion of a used volume of planarizing solution on the planarizing surface with fresh planarizing solution during the planarization cycle of a single substrate assembly. The used planarizing solution can be replaced with fresh planarizing solution by actively removing the used planarizing solution from the pad with a removing unit and depositing fresh planarizing solution onto the pad in the planarizing zone.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: November 15, 2005
    Assignee: Micron Technology, Inc
    Inventors: Dinesh Chopra, Scott G. Meikle
  • Publication number: 20050224981
    Abstract: Electroless plating can be utilized to form electrical interconnects associated with semiconductor substrates. For instance, a semiconductor substrate can be formed to have a dummy structure thereover with a surface suitable for electroless plating, and to also have a digit line thereover having about the same height as the dummy structure. A layer can be formed over the dummy structure and digit line, and openings can be formed through the layer to the upper surfaces of the dummy structure and digit line. Subsequently, a conductive material can be electroless plated within the openings to form electrical contacts within the openings. The opening extending to the dummy structure can pass through a capacitor electrode, and accordingly the conductive material formed within such opening can be utilized to form electrical contact to the capacitor electrode.
    Type: Application
    Filed: April 8, 2004
    Publication date: October 13, 2005
    Inventors: Nishant Sinha, Dinesh Chopra, Fred Fishburn
  • Patent number: 6949011
    Abstract: A method and apparatus for cleaning a web-based chemical-mechanical planarization (CMP) system. Specifically, a fluid spray bar is coupled to a frame assembly which may be mounted on a CMP system. The fluid spray bar will move along the frame assembly. As the fluid spray bar traverses the length of the frame assembly, a cleaning fluid is sprayed onto the web in order to clean the web between planarization cycles.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: September 27, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Scott E. Moore, Dinesh Chopra
  • Patent number: 6945855
    Abstract: A method and apparatus for cleaning a web-based chemical-mechanical planarization (CMP) system. Specifically, a fluid spray bar is coupled to a frame assembly which may be mounted on a CMP system. The fluid spray bar will move along the frame assembly. As the fluid spray bar traverses the length of the frame assembly, a cleaning fluid is sprayed onto the web in order to clean the web between planarization cycles.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: September 20, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Scott E. Moore, Dinesh Chopra
  • Publication number: 20050199588
    Abstract: Planarizing solutions, and their methods of use, for removing titanium nitride from the surface of a substrate using a fixed-abrasive planarizing pad. The planarizing solutions take the form of an etchant solution or an oxidizing solution. The etchant solutions are aqueous solutions containing an etchant and a buffer. The etchant contains one or more etching agents selective to titanium nitride. The oxidizing solutions are aqueous solutions containing an oxidizer and a buffer. The oxidizer contains one or more oxidizing agents selective to titanium nitride. In either solution, i.e., etchant or oxidizing solution, the buffer contains one or more buffering agents. Titanium nitride layers planarized in accordance with the invention may be utilized in the production of integrated circuits, various apparatus utilizing such integrated circuits, and memory systems.
    Type: Application
    Filed: April 12, 2005
    Publication date: September 15, 2005
    Inventors: Dinesh Chopra, Gundu Sabde
  • Patent number: 6933232
    Abstract: The present invention is generally directed to a method of reducing oxidation of metal structures using ion implantation, and a device constructed in accordance with the method. In one illustrative embodiment, the method comprises providing a semiconducting substrate having a first layer of insulating material formed thereabove, the first layer of insulating material having at least one conductive structure positioned therein, and performing an ion implant process to implant ions into at least the one conductive structure.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: August 23, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Dinesh Chopra
  • Patent number: 6932687
    Abstract: A planarizing pad for planarizing a microelectronic substrate, and a method and apparatus for forming the planarizing pad. In one embodiment, planarizing pad material is mixed with compressed gas to form a plurality of discrete elements that are distributed on a support material. At least a portion of the discrete elements are spaced apart from each other on the support material to form a textured surface for engaging a microelectronic substrate and removing material from the microelectronic substrate. The discrete elements can be uniformly or randomly distributed on the support material, and the discrete elements can be directly affixed to the support material or affixed to the support material with an adhesive.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: August 23, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Vishnu K. Agarwal, Dinesh Chopra
  • Publication number: 20050153556
    Abstract: A method for substantially simultaneously polishing a copper conductive structure of a semiconductor device structure and an adjacent barrier layer includes use of a slurry that is formulated so as to oxidize copper at substantially the same rate as or at a faster rate than a material of the barrier layer is oxidized. Thus, copper and the barrier layer material have substantially the same oxidation energies in the slurry or the oxidation energy of the barrier layer material in the slurry may be greater than that of copper. The slurry may be configured for use with a fixed-abrasive type polishing pad and, therefore, may be substantially abrasive-free.
    Type: Application
    Filed: December 14, 2004
    Publication date: July 14, 2005
    Inventors: Dinesh Chopra, Nishant Sinha
  • Patent number: 6911111
    Abstract: A system of cleaning a CMP pad used for removing copper from a substrate, the system comprising an abrasive cleaning pad, a cleaning solution delivery system that delivers a cleaning solution, an analyzing system that monitors the characteristics of the cleaning solution optically and chemically, and a carriage that allows the analyzing system to monitor the cleaning solution at a plurality of locations on the CMP pad. The use of the abrasive cleaning pad and the cleaning solution removes contaminants from the CMP pad, and the contaminants are dissolved in the cleaning solution. By measuring the concentration of contaminants in the cleaning solution, the condition of the CMP pad can be monitored. To measure the concentration of the contaminants, changes in the refractive index and absorption of light in the cleaning solution are measured, wherein the refractive index and absorption depend on the concentration of the contaminants.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: June 28, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Dinesh Chopra, Scott Meikle
  • Patent number: 6881129
    Abstract: Planarizing solutions, and their methods of use, for removing titanium nitride from the surface of a substrate using a fixed-abrasive planarizing pad. The planarizing solutions take the form of an etchant solution or an oxidizing solution. The etchant solutions are aqueous solutions containing an etchant and a buffer. The etchant contains one or more etching agents selective to titanium nitride. The oxidizing solutions are aqueous solutions containing an oxidizer and a buffer. The oxidizer contains one or more oxidizing agents selective to titanium nitride. In either solution, i.e., etchant or oxidizing solution, the buffer contains one or more buffering agents. Titanium nitride layers planarized in accordance with the invention may be utilized in the production of integrated circuits, and various apparatus utilizing such integrated circuits.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: April 19, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Dinesh Chopra, Gundu Sabde
  • Patent number: 6852618
    Abstract: Methods and apparatus for forming conductive interconnect layers useful in articles such as semiconductor chips, memory devices, semiconductor dies, circuit modules, and electronic systems. The number of necessary processing steps to form conductive interconnects are reduced by removing the need to employ a seed layer interposed between the barrier layer and the conductive interconnect layer. This is accomplished in part through the electrochemical reduction of oxides on a dual-purpose layer. The present invention can be advantageously utilized to deposit copper interconnects onto tungsten.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: February 8, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Dinesh Chopra
  • Publication number: 20050023516
    Abstract: Methods and apparatus for forming conductive interconnect layers useful in articles such as semiconductor chips, memory devices, semiconductor dies, circuit modules, and electronic systems. The number of necessary processing steps to form conductive interconnects are reduced by removing the need to employ a seed layer interposed between the barrier layer and the conductive interconnect layer. This is accomplished in part through the electrochemical reduction of oxides on a dual-purpose layer. The present invention can be advantageously utilized to deposit copper interconnects onto tungsten.
    Type: Application
    Filed: August 30, 2004
    Publication date: February 3, 2005
    Inventor: Dinesh Chopra
  • Publication number: 20050020004
    Abstract: A method and apparatus for simultaneously removing conductive materials from a microelectronic substrate. A method in accordance with one embodiment of the invention includes contacting a surface of a microelectronic substrate with an electrolytic liquid, the microelectronic substrate having first and second different conductive materials. The method can further include controlling a difference between a first open circuit potential of the first conducive material and a second open circuit potential of the second conductive material by selecting a pH of the electrolytic liquid. The method can further include simultaneously removing at least portions of the first and second conductive materials by passing a varying electrical signal through the electrolytic liquid and the conductive materials. Accordingly, the effects of galvanic interactions between the two conductive materials can be reduced and/or eliminated.
    Type: Application
    Filed: August 20, 2004
    Publication date: January 27, 2005
    Inventor: Dinesh Chopra
  • Publication number: 20050009318
    Abstract: A conductive connection forming method includes forming a first layer comprising a first metal on a substrate and forming a second layer comprising a second metal different from the first metal on the first layer. At least a part of the first layer may be transformed to an alloy material comprising the first and second metals. A conductive connection may be formed to the alloy material. The alloy material may be less susceptible to formation of metal oxide compared to the first metal. By way of example, transforming the first layer may comprise annealing the first and second layer. An exemplary first metal comprises copper, and an exemplary second metal comprises aluminum, titanium, palladium, magnesium, or two or more such metals. The alloy material may be an intermetallic. A conductive connection may be formed to the alloy layer.
    Type: Application
    Filed: August 11, 2004
    Publication date: January 13, 2005
    Inventors: Dinesh Chopra, Fred Fishburn
  • Patent number: 6830500
    Abstract: A method for substantially simultaneously polishing a copper conductive structure of a semiconductor device structure and an adjacent barrier layer includes use of a fixed-abrasive type polishing pad with a substantially abrasive-free slurry in which copper is removed at a rate that is substantially the same as or faster than a rate at which a material, such as tungsten, of the barrier layer is removed. The slurry is formulated so as to oxidize copper at substantially the same rate as or at a faster rate than a material of the barrier layer is oxidized. Thus, copper and the barrier layer material have substantially the same oxidation energies in the slurry or the oxidation energy of the barrier layer material in the slurry may be greater than that of copper. Systems for substantially polishing copper conductive structures and adjacent barrier structures on semiconductor device structures are also disclosed.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: December 14, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Dinesh Chopra, Nishant Sinha
  • Publication number: 20040219738
    Abstract: In a copper plating process, a seed layer is uniformly deposited over a surface, including lining a high aspect ratio trench defined by that surface. A mask layer is provided using a process that fails to deposit in the trench. In one exemplary embodiment, the failure is due to the decrease in the isotropic flux of neutrals toward the bottom of the trench. Copper is subsequently electroplated. Because the seed layer is exposed only within the trench, copper deposits only therein. The self-aligned mask prevents plating outside of the trench. A chemical-mechanical planarization step removes the mask and the seed layer extending beyond the trench, leaving a copper structure within the trench. The structure may serve as a conductive line, an interconnect, or a capacitor plate.
    Type: Application
    Filed: June 3, 2004
    Publication date: November 4, 2004
    Inventors: Dinesh Chopra, Kevin G. Donohoe, Cem Basceri
  • Publication number: 20040212093
    Abstract: A conductive connection forming method includes forming a first layer comprising a first metal on a substrate and forming a second layer comprising a second metal different from the first metal on the first layer. At least a part of the first layer may be transformed to an alloy material comprising the first and second metals. A conductive connection may be formed to the alloy material. The alloy material may be less susceptible to formation of metal oxide compared to the first metal. By way of example, transforming the first layer may comprise annealing the first and second layer. An exemplary first metal comprises copper, and an exemplary second metal comprises aluminum, titanium, palladium, magnesium, or two or more such metals. The alloy material may be an intermetallic. A conductive connection may be formed to the alloy layer.
    Type: Application
    Filed: May 19, 2004
    Publication date: October 28, 2004
    Inventors: Dinesh Chopra, Fred Fishburn
  • Publication number: 20040206374
    Abstract: A system of cleaning a CMP pad used for removing copper from a substrate, the system comprising an abrasive cleaning pad, a cleaning solution delivery system that delivers a cleaning solution, an analyzing system that monitors the characteristics of the cleaning solution optically and chemically, and a carriage that allows the analyzing system to monitor the cleaning solution at a plurality of locations on the CMP pad. The use of the abrasive cleaning pad and the cleaning solution removes contaminants from the CMP pad, and the contaminants are dissolved in the cleaning solution. By measuring the concentration of contaminants in the cleaning solution, the condition of the CMP pad can be monitored. To measure the concentration of the contaminants, changes in the refractive index and absorption of light in the cleaning solution are measured, wherein the refractive index and absorption depend on the concentration of the contaminants.
    Type: Application
    Filed: May 10, 2004
    Publication date: October 21, 2004
    Inventors: Dinesh Chopra, Scott Meikle
  • Publication number: 20040206454
    Abstract: A system of cleaning a CMP pad used for removing copper from a substrate, the system comprising an abrasive cleaning pad, a cleaning solution delivery system that delivers a cleaning solution, an analyzing system that monitors the characteristics of the cleaning solution optically and chemically, and a carriage that allows the analyzing system to monitor the cleaning solution at a plurality of locations on the CMP pad. The use of the abrasive cleaning pad and the cleaning solution removes contaminants from the CMP pad, and the contaminants are dissolved in the cleaning solution. By measuring the concentration of contaminants in the cleaning solution, the condition of the CMP pad can be monitored. To measure the concentration of the contaminants, changes in the refractive index and absorption of light in the cleaning solution are measured, wherein the refractive index and absorption depend on the concentration of the contaminants.
    Type: Application
    Filed: May 10, 2004
    Publication date: October 21, 2004
    Inventors: Dinesh Chopra, Scott Meikle