Abstract: A field effect transistor includes a metal carbide source portion, a metal carbide drain portion, an insulating carbon portion separating the metal carbide source portion from the metal carbide portion, a nanostructure formed over the insulating and carbon portion and connecting the metal carbide source portion to the metal carbide drain portion, and a gate stack formed on over at least a portion of the insulating carbon portion and at least a portion of the nanostructure.

Abstract: An etching process is employed to selectively pattern the top magnetic film layer, the tunnel barrier, and the pinned bottom magnetic layer of a magnetic thin film structure. The pinned bottom magnetic film layer has an antiferromagnetic layer or a Ru spacer formed thereunder. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the antiferromagnetic layer or the Ru spacer. The progress of this etching process can be monitored by measuring the electrochemical potential difference of a part or wafer containing a magnetic structure with respect to a reference electrode simultaneously with the selective etching process.

Abstract: A method of selectively growing one or more carbon nano-tubes includes forming an insulating layer on a substrate, the insulating layer having a top surface; forming a via in the insulating layer; forming an active metal layer over the insulating layer, including sidewall and bottom surfaces of the via; and removing the active metal layer at portions of the top surface with an ion beam to enable the selective growth of one or more carbon nano-tubes inside the via.

Abstract: A semiconductor device includes a substrate including an M2 patterned area. A VA pillar structure is formed over the M2 patterned area. The VA pillar structure includes a substractively patterned metal layer. The VA pillar structure is a sub-lithographic contact. An MTJ stack is formed over the oxide layer and the metal layer of the VA pillar. A size of the MTJ stack and a shape anisotropy of the MTJ stack are independent of a size and a shape anisotropy of the sub-lithographic contact.

Abstract: An indium cap layer is formed by blanket depositing indium onto a surface of metallic interconnects separated by interlayer dielectric, and then selectively chemically etching the indium located on the interlayer dielectric leaving an indium cap layer. Etchants containing a strong acid are provided for selectively removing the indium.

Abstract: An indium cap layer is formed by blanket depositing indium onto a surface of metallic interconnects separated by interlayer dielectric, and then selectively chemically etching the indium located on the interlayer dielectric leaving an indium cap layer. Etchants containing a strong acid are provided for selectively removing the indium.

Abstract: An etching process is employed to selectively pattern an exposed magnetic layer of a magnetic thin film structure. The etching process includes exposing the magnetic layer to an etchant composition including at least one weakly absorbing acid, a surfactant inhibitor soluble in the at least one weakly absorbing acid, and at least one cation additive. The presence of the at least one cation additive increases dissolution inhibition of an underlying tunnel barrier layer (i.e., increases etch selectivity) and permits the use of more soluble surfactant inhibitors in the etchant composition.

Abstract: Techniques for magnetic device fabrication are provided. In one aspect, a method of patterning at least one, e.g., nonvolatile, material comprises the following steps. A hard mask structure is formed on at least one surface of the material to be patterned. The hard mask structure is configured to have a base, proximate to the material, and a top opposite the base. The base has one or more lateral dimensions that are greater than one or more lateral dimensions of the top of the hard mask structure, such that at least one portion of the base extends out laterally a substantial distance beyond the top. The top of the hard mask structure is at a greater vertical distance from the material being etched than the base. The material is etched.

Abstract: A structure and method for fabricating a top strap in a magnetic random access memory, MRAM, comprising a damascene process forming a trench in a dielectric layer and resulting in a metal conductor clad on three sides by an inverted U-shape trench liner and cap made up of three layers consisting of a stack of a ferromagnetic material sandwiched between two layers of a refractory metal or an alloy of a refractory metal. First the two sidewalls of the trench are formed with the cladding layer, followed by filling the trench with the metal conductor. In preparing the structure for the capping layer, the metal conductor is recessed with an etch that is selective to the metal conductor over the sidewall stack. This preparation may be performed on selected metal filled trenches and blocked on others, such that after a final polishing step, only those metal conductors that received the recess operation will have the capping layer.

Abstract: Techniques for magnetic device fabrication are provided. In one aspect, a method of patterning at least one, e.g., nonvolatile, material comprises the following steps. A hard mask structure is formed on at least one surface of the material to be patterned. The hard mask structure is configured to have a base, proximate to the material, and a top opposite the base. The base has one or more lateral dimensions that are greater than one or more lateral dimensions of the top of the hard mask structure, such that at least one portion of the base extends out laterally a substantial distance beyond the top. The top of the hard mask structure is at a greater vertical distance from the material being etched than the base. The material is etched.

Abstract: An indium cap layer is formed by blanket depositing indium onto a surface of metallic interconnects separated by interlayer dielectric, and then selectively chemically etching the indium located on the interlayer dielectric leaving an indium cap layer. Etchants containing a strong acid are provided for selectively removing the indium.

Abstract: An etching process is employed to selectively pattern the top magnetic film layer, the tunnel barrier, and the pinned bottom magnetic layer of a magnetic thin film structure. The pinned bottom magnetic film layer has an antiferromagnetic layer or a Ru spacer formed thereunder. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the antiferromagnetic layer or the Ru spacer. The progress of this etching process can be monitored by measuring the electrochemical potential difference of a part or wafer containing a magnetic structure with respect to a reference electrode simultaneously with the selective etching process.

Abstract: Techniques for magnetic device fabrication are provided. In one aspect, a method of patterning at least one, e.g., nonvolatile, material comprises the following steps. A hard mask structure is formed on at least one surface of the material to be patterned. The hard mask structure is configured to have a base, proximate to the material, and a top opposite the base. The base has one or more lateral dimensions that are greater than one or more lateral dimensions of the top of the hard mask structure, such that at least one portion of the base extends out laterally a substantial distance beyond the top. The top of the hard mask structure is at a greater vertical distance from the material being etched than the base. The material is etched.

Abstract: An etching process is employed to selectively pattern the top magnetic film layer, the tunnel barrier, and the pinned bottom magnetic layer of a magnetic thin film structure. The pinned bottom magnetic film layer has an antiferromagnetic layer or a Ru spacer formed thereunder. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the antiferromagnetic layer or the Ru spacer. The progress of this etching process can be monitored by measuring the electrochemical potential difference of a part or wafer containing a magnetic structure with respect to a reference electrode simultaneously with the selective etching process.

Abstract: An etching process is employed to selectively pattern the exposed magnetic film layer of a magnetic thin film structure. The magnetic structure to be etched includes at least one bottom magnetic film layer and at least one top film layer which are separated by a tunnel barrier. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the tunnel barrier layer.

Abstract: A method to selectively cap interconnects with indium or tin bronzes and copper oxides thereof is provided. The invention also provides the interconnect and copper surfaces so formed.

Abstract: A method to selectively cap interconnects with indium or tin bronzes and copper oxides thereof is provided. The invention also provides the interconnect and copper surfaces so formed.

Abstract: A method for forming an interconnect structure in a semiconductor device includes defining a first insulator layer on a substrate and defining a via in the first insulator layer, thereby exposing a portion of the substrate. A sacrificial material is deposited over the first insulator layer and within the via, the sacrificial material being deposited at a thickness so as to also form a second insulator layer. A metallization line trench is defined in the second insulator layer, the trench being aligned over the via. Then, the sacrificial material is removed from the via opening, thereby allowing the via and the trench to be filled with a conductive material by dual damascene processing, wherein the formation of the trench and the removal of the sacrificial material from the via is implemented through a single etching operation.

Abstract: A method to selectively cap a cooper BEOL terminal pad with a Cu/Sn/Au alloy. The method includes providing one or more Cu BEOL terminal pads and coating the pads with a Sn coating followed by coating the Sn with a Au coating. The coated pads are then annealed to form the Cu/Sn/Au capping alloy.

Abstract: A method to selectively cap interconnects with indium or tin bronzes and copper oxides thereof is provided. The invention also provides the interconnect and copper surfaces so formed.