Abstract: A method to selectively cap interconnects with indium or tin bronzes and copper oxides thereof is provided. The invention also provides the interconnect and copper surfaces so formed.

Abstract: A damascene interconnect containing a dual etch stop/diffusion barrier. The conductive material of the damascene interconnect is capped with a conductive metal diffusion barrier cap, typically using electroless deposition, and, optionally, with a dielectric etch-stop layer. An optional chemical mechanical polish-stop layer may also be present. The different methods of the invention allow the CMP stop, reactive-ion etch stop, and metal diffusion barrier requirements of the different layers to be decoupled. A preferred conductive material is copper.

Abstract: A damascene interconnect containing a dual etch stop/diffusion barrier. The conductive material of the damascene interconnect is capped with a conductive metal diffusion barrier cap, typically using electroless deposition, and, optionally, with a dielectric etch-stop layer. An optional chemical mechanical polish-stop layer may also be present. The different methods of the invention allow the CMP stop, reactive-ion etch stop, and metal diffusion barrier requirements of the different layers to be decoupled. A preferred conductive material is copper.

Abstract: A microelectronic structure, having 1) at least one metallic feature situated on a layer of material selected from the group consisting of nonmetallic and semiconductor materials; 2) a layer of a cobalt-phosphorus alloy (Co(P)) covering at least one of the at least one metallic feature; and 3) a layer of a material selected from the group consisting of nickel and palladium covering the area covered by the Co(P) layer.

Abstract: In the manufacture of a microelectronic component having metallic features on a polyimide layer, the metallic features being spaced from one another by gaps, at least some of which gaps have widths in a range from about one micron to about 500 microns, corrosion protection is provided by plating those features by electroless deposition of a nickel-phosphorus alloy forming a layer having a thickness in a range from about 200 .ANG. to about 3000 .ANG., at a rate of about 100 .ANG. per minute, in an aqueous plating bath comprising nickel sulfate hexahydrate in an amount of about 5.5 grams per liter, sodium hypophosphite in an amount of about six grams per liter, boric acid in an amount of about 30 grams per liter, sodium citrate in an amount of about 45 grams per liter, lead acetate in an amount of about one part per million by weight of lead, and a surfactant in an amount of about 0.1 grams per liter. The bath has a temperature of about 72.degree. C. and a pH of about 8.1.

Abstract: Silicon and germanium containing materials are used at surface of conductors in electronic devices. Solder can be fluxlessly bonded and wires can be wire bonded to these surfaces. These material are used as a surface coating for lead frames for packaging integrated circuit chips. These materials can be decal transferred onto conductor surfaces or electrolessly or electrolytically disposed thereon.

Abstract: The invention provides a multilayer laminar interconnect package comprising a plurality of conductor circuit layers adhering to and sandwiched between a plurality of dielectric polyimide polymer layers where the conductor circuit layers are a circuit pattern of lines of conductive metal. The conductive metal, e.g. copper, is coated with a capping layer of a metal, e.g. cobalt, which capping layer is further characterized as having a thin layer of the capping metal oxide adhered to the surface thereof. The conductive layer is in contact with an overcoated polyimide dielectric layer such that the surface oxidized capping layer forms an adherent barrier layer at the interface of the polyimide and conductive line layers. The invention also provides a process for producing such interconnect packages.

Abstract: The invention provides a multilayer laminar interconnect package comprising a plurality of conductor circuit layers adhering to and sandwiched between a plurality of dielectric polyimide polymer layers where the conductor circuit layers are a circuit pattern of lines of conductive metal. The conductive metal, e.g. copper, is coated with a capping layer of a metal, e.g. cobalt, which capping layer is further characterized as having a thin layer of the capping metal oxide adhered to the surface thereof. The conductive layer is in contact with an overcoated polyimide dielectric layer such that the surface oxidized capping layer forms an adherent barrier layer at the interface of the polyimide and conductive line layers. The invention also provides a process for producing such interconnect packages.

Abstract: A method of selectively seeding or activating metal interconnections patterned on polyimide dielectric surfaces using an aqueous solution of palladium sulfate, palladium perchlorate, palladium trifluoromethane sulfonate, palladium nitrate or other palladium salts having poorly coordinating counter ions. This strongly selective seeding and the corresponding ability to reliably remove all traces of the seeding material from the polyimide surface eliminates shorting, bridging and reduction of breakdown voltage during electroless plating of a thin layer of nickel or cobalt.

Abstract: Improved adhesion of electroless metal deposited on an organic dielectric layer with phase separated morphology is accomplished by the spontaneous formation of a morphologically and topographically rough surface. In one embodiment a ternary solution of a polar solvent and two polymer precursors of the same polymer which are separable in two phases of different order are cast in film on a substrate and heated to form two phases of different order to spontaneously produce a rough surface. Upon exposure to an alkaline solution, one phase is etched at a faster rate than the other. Seeding and electroless deposition of a metal on the rough surface results in improved adhesion of the metal to the dielectric layer. In a second embodiment a quaternary solution of a polar solvent, a seeding agent, two polymer precursors of the same polymer which are separable in two phases of different order are cast in a thin film on a substrate and heated to form three phases.

Abstract: High T.sub.c oxide superconductive films can be formed on gallate layers, where the gallate layers include a rare earth element or a rare earth-like element. Combinations of rare earth elements and rare earth-like elements can also be utilized. The superconductive films can be epitaxially deposited on these gallate layers to form single crystals or, in the minimum, highly oriented superconductive layers. Any high T.sub.c superconductive oxide material can be utilized, but the best lattice matches are to superconductive materials including copper oxides. Examples include Y-Ba-Cu-O systems, Bi-based systems and Tl-based systems.