Abstract: Embodiments disclosed herein include electronic packages and thermal solutions for such electronic packages. In an embodiment, an electronic package comprises, a package substrate with a first surface, a second surface opposite from the first surface, and a sidewall surface connecting the first surface to the second surface. In an embodiment, the electronic package further comprises a heat spreader, where a first portion of the heat spreader is attached to the first surface of the package substrate and a second portion of the heat spreader is attached to the second surface of the package substrate. In an embodiment, a third portion of the heat spreader adjacent to the sidewall surface of the package substrate connects the first portion of the heat spreader to the second portion of the heat spreader.

Abstract: Disclosed herein are inorganic dies with organic interconnect layers and related structures, devices, and methods. In some embodiments, an integrated circuit (IC) structure may include an inorganic die and one or more organic interconnect layers on the inorganic die, wherein the organic interconnect layers include an organic dielectric.

Abstract: Disclosed herein are structures, devices, and methods for electrostatic discharge protection (ESDP) in integrated circuits (ICs). In some embodiments, an IC component may include a conductive contact structure that includes a first contact element and a second contact element. The first contact element may be exposed at a face of the IC component, the first contact element may be between the face of the IC component and the second contact element, the second contact element may be spaced apart from the first contact element by a gap, and the second contact element may be in electrical contact with an electrical pathway in the IC component.

Abstract: Disclosed herein are structures, devices, and methods for electrostatic discharge protection (ESDP) in integrated circuits (ICs). For example, in some embodiments, an IC package support may include: a first conductive structure in a dielectric material; a second conductive structure in the dielectric material; and a material in contact with the first conductive structure and the second conductive structure, wherein the material includes a polymer, and the material is different from the dielectric material. The material may act as a dielectric material below a trigger voltage, and as a conductive material above the trigger voltage.

Abstract: Embodiments may relate to a package substrate that includes a signal line and a ground line. The package substrate may further include a switch communicatively coupled with the ground line. The switch may have an open position where the switch is communicatively decoupled with the signal line, and a closed position where the switch is communicatively coupled with the signal line. Other embodiments may be described or claimed.

Abstract: Embodiments may relate to a die with a front-end and a backend. The front-end may include a transistor. The backend may include a signal line, a conductive line, and a diode that is communicatively coupled with the signal line and the conductive line. Other embodiments may be described or claimed.

Abstract: Disclosed herein are inorganic dies with organic interconnect layers and related structures, devices, and methods. In some embodiments, an integrated circuit (IC) structure may include an inorganic die and one or more organic interconnect layers on the inorganic die, wherein the organic interconnect layers include an organic dielectric.

Abstract: Embodiments may relate to a die such as an acoustic wave resonator (AWR) die. The die may include a first filter and a second filter in the die body. The die may further include an electromagnetic interference (EMI) structure that surrounds at least one of the filters. Other embodiments may be described or claimed.

Abstract: Embodiments may relate to a microelectronic package or a die thereof which includes a die, logic, or subsystem coupled with a face of the substrate. An inductor may be positioned in the substrate. Electromagnetic interference (EMI) shield elements may be positioned within the substrate and surrounding the inductor. Other embodiments may be described or claimed.

Abstract: Embodiments of the invention include a display formed on an organic substrate and methods of forming such a device. According to an embodiment, an array of pixel mirrors may be formed on the organic substrate. For example, each of the pixel mirrors is actuatable about one or more axes out of the plane of the organic substrate. Additionally, embodiments of the invention may include an array of routing mirrors formed on the organic substrate. According to an embodiment, each of the routing mirrors is actuatable about two axes out of the plane of the organic substrate. In embodiments of the invention, a light source may be used for emitting light towards the array of routing mirrors. For example, light emitted from the light source may be reflected to one or more of the pixel mirrors by one of the routing mirrors.

Abstract: Embodiments may relate to a microelectronic package that includes a substrate with an overmold material. The microelectronic package may include a die in the overmold material, and an inactive side of the die may be coupled with a face of the substrate. A through-mold via (TMV) may be present in the overmold material. The TMV may be communicatively coupled with the substrate, and an active side of the die may be communicatively coupled with the TMV by a trace in the overmold material. Other embodiments may be described or claimed.

Abstract: Embodiments may relate to a microelectronic package with an electrostatic discharge (ESD) protection structure within the package substrate. The ESD protection structure may include a cavity that has a contact of a signal line and a contact of a ground line positioned therein. Other embodiments may be described or claimed.

Abstract: Embodiments may relate to a radio frequency (RF) front-end module (FEM). The RF FEM may include an integrated die with an active portion and an acoustic wave resonator (AWR) portion adjacent to the active portion. The RF FEM may further include a lid coupled with the die. The lid may at least partially overlap the AWR portion at a surface of the die. Other embodiments may be described or claimed.

Abstract: Embodiments may relate to a microelectronic package that includes a substrate with an overmold material. The microelectronic package may include a die in the overmold material, and an inactive side of the die may be coupled with a face of the substrate. A through-mold via (TMV) may be present in the overmold material. The TMV may be communicatively coupled with the substrate, and an active side of the die may be communicatively coupled with the TMV by a trace in the overmold material. Other embodiments may be described or claimed.

Abstract: Embodiments may relate to a material to provide electrostatic discharge (ESD) protection in an electrical device. The material may include first and second electrically-conductive carbon allotropes. The material may further include an electrically-conductive polymer that is chemically bonded to the first and second electrically-conductive carbon allotropes such that an electrical signal may pass between the first and second electrically-conductive carbon allotropes. Other embodiments may be described or claimed.

Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface; a first die having a first surface and an opposing second surface embedded in a first dielectric layer, where the first surface of the first die is coupled to the second surface of the package substrate by first interconnects; a second die having a first surface and an opposing second surface embedded in a second dielectric layer, where the first surface of the second die is coupled to the second surface of the first die by second interconnects; and a third die having a first surface and an opposing second surface embedded in a third dielectric layer, where the first surface of the third die is coupled to the second surface of the second die by third interconnects.

Abstract: Embodiments include semiconductor packages. A semiconductor package includes a lateral heat spreader (LHS) over a package substrate, and a first die over the LHS and package substrate. The first die has a first region and a second region, where the first and second regions are on a bottom surface of the first die. The semiconductor package includes a plurality of second dies over the first die, and an integrated heat spreader (IHS) over the second dies, first die, LHS, and package substrate. The IHS includes a lid and legs. The LHS thermally couples the first region of the first die to the legs of the IHS, and laterally extends from below the first region of the first die to below the legs of the IHS. The LHS may be comprised of graphene sheets, heat pipes, or vapor chambers and coupled to a thermal conductive material and a sealant.

Abstract: Embodiments of the invention include an electrical package and methods of forming the package. In one embodiment, the electrical package may include a first package layer. A plurality of signal lines with a first thickness may be formed on the first package layer. Additionally, a power plane with a second thickness may be formed on the first package layer. According to an embodiment, the second thickness is greater than the first thickness. Embodiments of the invention may form the power plane with a lithographic patterning and deposition process that is different than the lithographic patterning and deposition process used to form the plurality of signal lines. In an embodiment, the power plane may be formed concurrently with vias that electrically couple the signal lines to the next routing layer.

Abstract: Disclosed herein are maskless imaging tools and display systems that include piezoelectrically actuated mirrors and methods of forming such devices. The maskless imaging tool may include a light source. Additionally, the tool may include one or more piezoelectrically actuated mirrors for receiving light from the light source. The piezoelectrically actuated mirrors are actuatable about one or more axes to reflect the light from the light source to a workpiece positioned to receive light from the piezoelectrically actuated mirror. Disclosed herein is a maskless imaging tool that is a laser direct imaging lithography (LDIL) tool. The maskless imaging tool may also be a via-drill tool. Disclosed herein is also a piezoelectrically actuated mirror used in a projection system. For example, the projection system may be integrated into a pair of glasses.

Abstract: Embodiments of the invention include a piezo-electric mirror in an microelectronic package and methods of forming the package. According to an embodiment the microelectronic package may include an organic substrate with a cavity formed in the organic substrate. In some embodiments, an actuator is anchored to the organic substrate and extends over the cavity. For example, the actuator may include a first electrode and a piezo-electric layer formed on the first electrode. A second electrode may be formed on the piezo-electric layer. Additionally, a mirror may be formed on the actuator. Embodiments allow for the piezo-electric layer to be formed on an organic package substrate by using low temperature crystallization processes. For example, the piezo-electric layer may be deposited in an amorphous state. Thereafter, a laser annealing process that includes a pulsed laser may be used to crystallize the piezo-electric layer.