Abstract: A method of performing a read operation from a first magnetic random access memory (AM) cell in a memory cell string that includes the first MRAM cell coupled to a second MRAM cell. The method includes providing a voltage to a first end of the first memory cell string that is closest to the first MRAM cell, providing a ground source to a second end of the first memory cell string that is opposite the first end, and determining whether a voltage change occurred at a node between the first and second MRAM cells in response to applying a write sense current to the first MRAM cell.

Abstract: A cross point resistive memory array has a first array of cells arranged generally in a plane. Each of the memory cells includes a memory storage element and is coupled to a diode. The diode junction extends transversely to the plane of the array of memory cells.

Abstract: Embodiments of the present invention provide a magnetic memory. In one embodiment, the magnetic memory comprises an array of memory cells configured to provide resistive states, and a read circuit. The read circuit is configured to sense a resistance through a memory cell in the array of memory cells to obtain a sense result and categorize the sense result into one of at least three different categories comprising a middle category situated between the resistive states.

Abstract: A system and method for determining the logic state of a memory cell in a magnetic tunnel junction (MTJ) memory device based on the ratio of the current through the cell at different bias points are disclosed. A memory cell in an MJT memory device is sequentially subjected to at least two different bias voltages. The current through the cell at each of the bias voltages is measured, and a ratio of the different currents is determined. The ratio is then compared with a predetermined value to determine the logic state of the cell. The predetermined value can be a known value. Alternatively, the predetermined value can be determined by application of the system and method to a reference cell having a known logic state.

Abstract: A method of making a lower cost active matrix display. In a particular embodiment, the method includes providing at least one first conductor upon a substrate and depositing a gate dielectric upon the first conductor and substrate. At least one paired second conductor and a pixel electrode are deposited upon the gate dielectric, with the second conductor crossing the first conductor and with a narrow gap between the paired second conductor and the pixel electrode. A semiconductor material is deposited over the paired second conductor and pixel electrode, filling the narrow gap. The narrow gap shelters a portion of the semiconductor material, which serves as a semiconductor bridge capable of functioning either as an insulator or as a channel region of a field effect transistor. The remaining, unsheltered semiconductor material is removed.

Abstract: A magnetic memory having a calibration system is disclosed. One embodiment of the magnetic memory includes a sense amplifier and a calibration system configured to monitor at least one operating parameter of the magnetic memory and calibrate the sense amplifier if a measured parameter corresponding to the at least one operating parameter is within a range.

Abstract: The present invention provides a magnetic memory. In one embodiment, the magnetic memory includes a first line having a first cross-sectional area. A second line is provided having a second cross-sectional area different from the first cross-sectional area. A magnetic memory cell stack is positioned between the first line and the second line.

Abstract: One embodiment of a magnetic memory includes a magnetic memory stack and a first line adjacent the magnetic memory stack. A second line crosses the first line, and a third line crosses the first line and the second line. The third line is angled relative to the first line and the second line, where the first line, the second line and the third line are configured to produce magnetic fields that set states of the magnetic memory stack.

Abstract: A light emitting device with adaptive intensity control. In a particular embodiment, there is an active display pixel providing a light. At least a portion of the provided light is incident upon a photodetector optically coupled to the display pixel, the photodetector providing an electrical feedback signal in response to the light. A feedback controlled intensity controller electrically coupled to the photodetector and an electrical switch coupled to the active display pixel are also provided. The feedback controlled intensity controller further receives an electrical reference signal. The feedback controlled intensity controller opens and closes the switch depending upon the relationship of the feedback signal to the reference signal.

Abstract: A method of performing a read operation from a first magnetic random access memory (MRAM) cell in a memory cell string that includes the first MRAM cell coupled to a second MRAM cell. The method includes providing a voltage to a first end of the first memory cell string that is closest to the first MRAM cell, providing a ground source to a second end of the first memory cell string that is opposite the first end, and determining whether a voltage change occurred at a node between the first and second MRAM cells in response to applying a write sense current to the first MRAM cell.

Abstract: Methods and apparatuses are disclosed for communicating data on a chip. In one embodiment, the method includes: reading the data value of a memory element utilizing conductors that are electrically coupled to the memory element, and communicating the value read from the memory element to other locations on chip using write conductors that are magnetically coupled to the memory element.

Abstract: A flexible media magnetic printing system provides for data storage within flexible media imprinted with magnetic ink. In a particular embodiment, the printing system includes at least one reservoir of magnetic ink with magnetic particles capable of supporting high density data, and at least one reservoir of visible ink. The reservoirs are coupled to a print head including one or more ink-ejecting nozzles, which is removably or fixedly coupled to at least one magnetic read/write device. The magnetic read/write device tracks above the magnetic ink applied by the ink-ejecting nozzles to the flexible media. The magnetic read/write device writes to the magnetic ink by providing a magnetic field of sufficient intensity to re-orient the magnetic alignment within the ink to a known direction. The magnetic read/write device also reads data from flexible media, for example, paper or cloth that is imprinted with data-embedded magnetic ink.

Abstract: The present invention provides a magnetic memory device that includes a magnetic memory cell switchable between two states by the application of a magnetic field wherein the magnetic field for such switching is dependent in part on a memory cell temperature. The device further includes at least one heater element proximate to the magnetic memory cell and series connected with the magnetic memory cell for heating of the magnetic memory cell. The device also includes a circuit for selectively applying the electrical current through the at least one heater element so as to heat the cell and facilitate cell state-switching.

Abstract: Device and method for memory cell isolation. The memory cell includes a resistive component, such as a magnetic random access memory (MRAM) cell, and an isolation component, such as a four-layer diode. The memory cell may be included in a memory array. The method includes rapidly applying a forward bias across the isolation element to activate the isolation element.

Abstract: A resistive cross point memory cell array comprising a plurality of word lines, a plurality of bit lines, a plurality of cross points formed by the word lines and the bit lines, and a plurality of memory cells, each of the memory cells being located at a different one of the cross points, wherein a first bit line comprises a distributed series diode along an entire length of the bit line such that each of the associated memory cells located along the first bit line is coupled between the distributed series diode and an associated word line.

Abstract: A method of performing a thermally assisted write operation on a selected two conductor spin valve memory (SVM) cell having a material wherein the coercivity is decreased upon an increase in temperature. In a particular embodiment, a first write magnetic field is established by a first write current flowing from a first voltage potential to a second voltage potential as applied to the first conductor. A second write magnetic field is established by a second write current flowing from a third voltage potential to a fourth voltage potential as applied to the second conductor. The voltage potential of the first conductor is greater than the voltage potential of the second conductor. As a result, a third current, flows from the first conductor through the SVM cell to the second conductor. The SVM cell has an internal resistance such that the flowing current generates heat within the SVM cell. As the SVM cell is self heated, the coercivity of the SVM cell falls below the combined write magnetic fields.

Abstract: A data storage device comprising a first memory cell string that includes at least a first magnetic random access memory (MRAM) cell coupled to a second MRAM cell and a circuit coupled to a node between the first MRAM cell and the second MRAM cell is provided. The circuit is configured to detect a voltage change at the node in response to a voltage being provided to the memory cell string and in response to a write sense current being applied across the first MRAM cell.

Abstract: Methods and apparatuses are disclosed for communicating data on a chip. In one embodiment, the method includes: reading the data value of a memory element utilizing conductors that are electrically coupled to the memory element, and communicating the value read from the memory element to other locations on chip using write conductors that are magnetically coupled to the memory element.

Abstract: A system and method for determining the logic state of a magnetic tunnel junction (MTJ) memory device. The method includes applying a first bias voltage to a selected line and measuring a first induced voltage across the MJT device or a memory cell. The method also includes applying a second bias voltage to the selected line, the second bias voltage being different from the first bias voltage, and measuring a second induced voltage across the MJT device. The method also includes comparing a function of the first bias voltage, the first induced voltage, the second bias voltage, and the second induced voltage to a threshold value.

Abstract: A soft-reference three conductor magnetic memory storage device is disclosed. In a particular embodiment, there are a plurality of parallel electrically conductive first sense/write conductors and a plurality of parallel electrically conductive second sense conductors. The first sense/write and second sense conductors may provide a cross point array. Soft-reference magnetic memory cells are provided in electrical contact with and located at each intersection. In addition there are a plurality of parallel electrically conductive third write column conductors substantially proximate to and electrically isolated from the second sense conductors. Sense magnetic fields orient the soft-reference layer but do not alter the data stored within the cell. An associated method of use is also provided.