Patents by Inventor Frederick A. Perner

Frederick A. Perner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6947313
    Abstract: Method and apparatus for coupling conductors in magnetic memory. In some embodiments, the memory element comprises: a first magnetic memory element, a first group of conductors magnetically coupled to the first magnetic memory element, a second magnetic memory element, a second group of conductors magnetically coupled to the second magnetic memory element, where the second magnetic memory element is substantially vertical to the first, and the first and second group of conductors have at least one conductor in common.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: September 20, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Frederick A. Perner, Kenneth K. Smith, Thomas C. Anthony
  • Publication number: 20050195647
    Abstract: This invention provides a 1R1D block architecture magnetic memory device. In a particular embodiment, a cross-point array of resistive devices is provided. Each resistive device is paired with an isolation device. A feedback controlled control circuit is coupled to the cross-point array. The control circuit establishes an equi-potential setting within the cross-point array, and recognizes a change in current when a selected resistive device within the cross-point array is asserted to a reference state. An associated method of use is further provided.
    Type: Application
    Filed: March 4, 2004
    Publication date: September 8, 2005
    Inventor: Frederick Perner
  • Patent number: 6940747
    Abstract: The present invention provides a magnetic memory device. An embodiment of the present invention includes a magnetic memory cell that is switchable between two states offering electrical resistance which are detectible by a sense current though the magnetic memory cell. The device includes a field effect transistor (FET) arrangement which has a source and a drain. The source and the drain are connected by a connecting element which projects from a portion of the device and which has an electrical conductivity that varies in response to a gate voltage applied to the connecting element. The magnetic memory cell is in electrical communication with the connecting element so that at least a portion of the sense current is in use associated with a corresponding gate voltage and the FET arrangement amplifies at least a portion of the sense current.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: September 6, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Manish Sharma, Frederick A. Perner
  • Patent number: 6937504
    Abstract: The invention includes an apparatus and method for selecting a desirable magnitude of a magnetic memory cell write current. The method includes determining a minimal magnitude of write current for writing to the magnetic memory cell, determining a maximal magnitude of write current for writing to the magnetic memory cell, and calculating the selected magnitude of magnetic memory cell write current based on the minimal magnitude of write current and the maximal magnitude of write current.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: August 30, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Frederick A. Perner
  • Patent number: 6937506
    Abstract: A random access memory (MRAM) that includes a magnetic memory cell that is switchable between two states under the influence of a magnetic field. The MARAM also includes an electrical bit line coupled to the magnetic memory cell for generating the magnetic field. The electrical bit line includes a conductive component and a magnetic component to guide magnetic flux associated with the magnetic field towards the magnetic memory cell. A thermal insulator is positioned between the conductive portion and the magnetic memory cell, and the magnetic component has at least one guiding portion that extends from the conductive component towards the magnetic memory cell to guide the magnetic flux around at least a portion of the thermal insulator.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: August 30, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Thomas C. Anthony, Frederick A. Perner, Heon Lee
  • Patent number: 6937509
    Abstract: A resistive cross point memory cell array comprising a plurality of word lines, a plurality of bit lines, a plurality of cross points formed by the word lines and the bit lines, and a plurality of memory cells, each of the memory cells being located at a different one of the cross points, wherein a first bit line comprises a distributed series diode along an entire length of the bit line such that each of the associated memory cells located along the first bit line is coupled between the distributed series diode and an associated word line.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: August 30, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Frederick A. Perner, Andrew L. VanBrocklin, Warren B. Jackson
  • Publication number: 20050185456
    Abstract: A thin film device and a method of providing thermal assistance therein is disclosed. Accordingly, a heater material is utilized to thermally assist in the operation of the thin film device. By utilizing a heater material to thermally assist in the operation of the thin film device, a substantial improvement in the accuracy and performance of the thin film device is achieved. A first aspect of the present invention is a thin film device. The thin film device includes at least one patterned thin film layer, a heater material coupled to the at least one patterned thin film layer for providing thermal assistance to the at least one of the patterned thin film layers and a conductor coupled to the heater material for supplying energy to the heater material.
    Type: Application
    Filed: April 21, 2005
    Publication date: August 25, 2005
    Inventors: Janice Nickel, Manoj Bhattacharyya, Frederick Perner
  • Publication number: 20050180238
    Abstract: This invention provides a controlled temperature, thermal-assisted magnetic memory device. In a particular embodiment, there is an array of SVM cells, each characterized by an alterable orientation of magnetization and including a material wherein the coercivity is decreased upon an increase in temperature. In addition, at least one reference SVM (RSVM) cell substantially similar to and in close proximity to the SVM cells of the array is provided. A provided feedback control temperature controller receives a feedback voltage from the reference SVM cell, corresponding to temperature, and adjusts power applied to the RSVM cell and SVM cell. An associated method of use is further provided.
    Type: Application
    Filed: February 17, 2004
    Publication date: August 18, 2005
    Inventors: Frederick Perner, Manoj Bhattacharyya
  • Patent number: 6930914
    Abstract: Memory arrays and methods are disclosed for incorporating repeater circuitry in a memory array. The method may include coupling a plurality of memory arrays to a conductor, where the arrays may include memory elements. In addition, current drivers also may be coupled to the conductor. The current drivers may allow memory elements that are located in separate memory arrays to be isolated from each other.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: August 16, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Frederick A. Perner
  • Patent number: 6930369
    Abstract: A thin film device and a method of providing thermal assistance therein is disclosed. Accordingly, a heater material is utilized to thermally assist in the operation of the thin film device. By utilizing a heater material to thermally assist in the operation of the thin film device, a substantial improvement in the accuracy and performance of the thin film device is achieved. A first aspect of the present invention is a thin film device. The thin film device includes at least one patterned thin film layer, a heater material coupled to the at least one patterned thin film layer for providing thermal assistance to the at least one of the patterned thin film layers and a conductor coupled to the heater material for supplying energy to the heater material.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: August 16, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Janice H. Nickel, Manoj Bhattacharyya, Frederick A. Perner
  • Patent number: 6930370
    Abstract: A memory includes an array of magnetic memory cells, each magnetic memory cell being adapted to store a bit of information, interconnects in communication with the magnetic memory cells, and conductors in communication with the magnetic memory cells and the interconnects, the conductors filling spaces between adjacent magnetic memory cells of the array.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: August 16, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Frederick A. Perner, Thomas C. Anthony
  • Publication number: 20050169059
    Abstract: A magnetic memory cell write current threshold detector. The magnetic memory cell write current threshold detector includes a first MRAM test cell receiving a write current and sensing when the write current exceeds a first threshold, and a second MRAM test cell receiving the write current and sensing when the write current exceeds a second threshold.
    Type: Application
    Filed: January 29, 2004
    Publication date: August 4, 2005
    Inventors: Frederick Perner, Manoj Bhattacharyya
  • Publication number: 20050161715
    Abstract: A cross point resistive memory array has a first array of cells arranged generally in a plane. Each of the memory cells includes a memory storage element and is coupled to a diode. The diode junction extends transversely to the plane of the array of memory cells.
    Type: Application
    Filed: March 30, 2004
    Publication date: July 28, 2005
    Inventors: Frederick Perner, Manish Sharma
  • Publication number: 20050152182
    Abstract: A random access memory (MRAM) that includes a magnetic memory cell that is switchable between two states under the influence of a magnetic field. The MARAM also includes an electrical bit line coupled to the magnetic memory cell for generating the magnetic field. The electrical bit line includes a conductive component and a magnetic component to guide magnetic flux associated with the magnetic field towards the magnetic memory cell. A thermal insulator is positioned between the conductive portion and the magnetic memory cell, and the magnetic component has at least one guiding portion that extends from the conductive component towards the magnetic memory cell to guide the magnetic flux around at least a portion of the thermal insulator.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 14, 2005
    Inventors: Thomas Anthony, Frederick Perner, Heon Lee
  • Publication number: 20050154842
    Abstract: A memory storage device having an address control system is disclosed. The memory storage device includes memory cells and an address control system configured to decode a bit number which identifies a number of the memory cells which are selected in parallel. The memory cells selected in parallel correspond to least significant bits of an address which has a range that includes the memory cells.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 14, 2005
    Inventors: Kenneth Smith, Sarah Brandenberger, Terrel Munden, Frederick Perner, Connie Lemus, David Mclntyre
  • Patent number: 6914809
    Abstract: A method for performing a read operation from a magnetic random access memory (MRAM) cell in a memory cell string is provided. The method includes applying a constant current through the memory cell string, measuring a first voltage across the memory cell string, applying a write sense current across the MRAM cell, measuring a second voltage across the memory cell string, and determining whether the first voltage differs from the second voltage.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: July 5, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Richard L. Hilton, Corbin L. Champion, Kenneth K. Smith, Frederick A. Perner
  • Publication number: 20050122767
    Abstract: Embodiments of the present invention provide a magnetic memory. In one embodiment, the magnetic memory comprises an array of memory cells configured to provide resistive states, and a read circuit. The read circuit is configured to sense a resistance through a memory cell in the array of memory cells to obtain a sense result and categorize the sense result into one of at least three different categories comprising a middle category situated between the resistive states.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 9, 2005
    Inventors: Frederick Perner, Jonathan Jedwab, James Davis, David McIntyre, David Banks, Stewart Wyatt, Kenneth Smith
  • Publication number: 20050117409
    Abstract: The invention includes an apparatus and method for selecting a desirable magnitude of a magnetic memory cell write current. The method includes determining a minimal magnitude of write current for writing to the magnetic memory cell, determining a maximal magnitude of write current for writing to the magnetic memory cell, and calculating the selected magnitude of magnetic memory cell write current based on the minimal magnitude of write current and the maximal magnitude of write current.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Inventor: Frederick Perner
  • Publication number: 20050117412
    Abstract: The invention includes an apparatus and method for selecting a desirable magnitude of a magnetic memory cell write current. The method includes determining a minimal magnitude of write current for writing to the magnetic memory cell, determining a maximal magnitude of write current for writing to the magnetic memory cell, and calculating the selected magnitude of magnetic memory cell write current based on the minimal magnitude of write current and the maximal magnitude of write current.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 2, 2005
    Inventor: Frederick Perner
  • Patent number: 6901005
    Abstract: Methods and apparatuses are disclosed for reducing the read time of a memory array. In one embodiment, the method includes sampling unknown data values from a plurality of memory elements, buffering the unknown values, writing known values to the plurality of memory elements and sampling the known values, and comparing the known values to the buffered values.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: May 31, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Frederick A. Perner, Kenneth K. Smith