Patents by Inventor Fu-An Yu

Fu-An Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150001636
    Abstract: A metal-oxide-semiconductor field effect transistor (MOSFET) includes a substrate and a gate structure over a top surface of the substrate. The MOSFET further includes a source in the substrate on a first side of the gate structure and a drain in the substrate on a second side of the gate structure opposite the first side. A surface portion of the substrate extending from the source to the drain has an asymmetric dopant concentration profile.
    Type: Application
    Filed: June 27, 2013
    Publication date: January 1, 2015
    Inventors: Chih-Chang CHENG, Fu-Yu CHU, Ruey-Hsin LIU
  • Publication number: 20150001637
    Abstract: A metal-oxide-semiconductor field effect transistor (MOSFET) includes a substrate and a gate structure over a top surface of the substrate. The MOSFET further includes a source in the substrate on a first side of the gate structure and a drain in the substrate on a second side of the gate structure opposite the first side. The gate structure includes a variable thickness gate dielectric layer. The variable thickness gate dielectric layer includes a first portion closest to the drain, the first portion having a first thickness. The variable thickness gate dielectric layer further includes a second portion distal from the drain, the second portion having a second thickness less than the first thickness.
    Type: Application
    Filed: June 27, 2014
    Publication date: January 1, 2015
    Inventors: Chih-Chang CHENG, Fu-Yu CHU, Ruey-Hsin LIU
  • Patent number: 8909919
    Abstract: The invention relates to digital television authentication system and method. The system includes a digital television having a digital television master chip; an SIM card module with a built-in SIM card, connected to the digital television master chip, and an authentication server wirelessly connected to the SIM card. The SIM card module includes a symmetric key generation unit used for generating a symmetric encryption key CT according to a Session Key (SEK) received by the SIM card and an identity (ID) of the SIM card; and a CW acquisition unit used for decrypting, according to the symmetric encryption key CT, an ECW sent by the authentication server, to obtain a CW. The authentication server includes an SEK generation unit used for randomly generating a string and taking the string as an SEK; and an SEK sending unit used for sending the SEK to the SIM card module.
    Type: Grant
    Filed: March 16, 2013
    Date of Patent: December 9, 2014
    Assignee: Shenzhen Skyworth-RGB Electronics Co. Ltd.
    Inventors: Zhao-Fu Yu, Ji Bai, Yan-Sheng Shao
  • Publication number: 20140312414
    Abstract: A method of forming a manufacture includes forming a trench in a doped layer. The trench has an upper portion and a lower portion, and a width of the upper portion is greater than that of the lower portion. A first insulating layer is formed along sidewalls of the lower portion of the trench and a bottom surface of the trench. A gate dielectric layer is formed along sidewalls of the upper portion of the trench. A first conductive feature is formed along sidewalls of the gate dielectric layer. A second insulating layer covering the first conductive feature and the first insulating layer is formed, and a second conductive feature is formed along sidewalls of the second insulating layer and a bottom surface of the second insulating layer.
    Type: Application
    Filed: July 2, 2014
    Publication date: October 23, 2014
    Inventors: Chih-Chang CHENG, Fu-Yu CHU, Ruey-Hsin LIU
  • Patent number: 8796760
    Abstract: A manufacture includes a doped layer, a body structure over the doped layer, a trench defined in the doped layer, an insulator partially filling the trench, and a first conductive feature buried in, and separated from the doped layer and the body structure by, the insulator. The doped layer has a first type doping. The body structure has an upper surface and includes a body region. The body region has a second type doping different from the first type doping. The trench has a bottom surface. The first conductive feature extends from a position substantially leveled with the upper surface of the body structure toward the bottom surface of the trench. The first conductive feature overlaps the doped layer for an overlapping distance, and the overlapping distance ranging from 0 to 2 ?m.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: August 5, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ruey-Hsin Liu
  • Publication number: 20140202802
    Abstract: Provided is a brake distribution structure including a first sliding block, a second sliding block, and a tube. The first sliding block connects to a rear brake line of a bicycle. The second sliding block connects to a front brake line of the bicycle. The first sliding block moves to brake a rear wheel of the bicycle, and then the first sliding block drives the second sliding block to move and thereby brake the front wheel of the bicycle. The brake distribution structure ensures that the rear wheel is always braked first, prevents brake lockup, reduces hazards otherwise arising from manmade false action, and maximizes rider safety.
    Type: Application
    Filed: January 10, 2014
    Publication date: July 24, 2014
    Applicant: Paul Hsu Senior High School
    Inventors: Chen-Hua CHANG, Wen-Yi Huang, Chih-Po Wu, Fu-Yu You, Wen-Hsien Lin
  • Publication number: 20140205671
    Abstract: A method of synthesizing PHA nanocapsules as a protein carrier, particularly, the synthesis of PHA nanocapsules synthesized by a modified precipitation/solvent evaporation technique with neutralization. Specifically, the method comprises the steps of sonicating a first solution comprising a triblock PHA copolymer, stirring the first solution into a second solution to give a third solution, the second solution containing a protein, and the second solution being acidic. Further, the method comprises adding the third solution with a neutralizing agent to give a neutralized solution, and sonicating the neutralized solution to form a final solution, wherein the synthesized PHA nanocapsules containing the protein are formed in the final solution. Further, PHA nanocapsules encapsulated with the protein is used by administering the synthesized PHA nanocapsule to an animal in need thereof via the oral cavity.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 24, 2014
    Applicant: NANO AND ADVANCED MATERIALS INSTITUTE LIMITED
    Inventors: Peter Hoi Fu YU, Alex Ho Yin CHAN, Kwok Ping HO
  • Publication number: 20140197489
    Abstract: Power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) and methods of forming the same are provided. A power MOSFET may comprise a first drift region formed at a side of a gate electrode, and a second drift region beneath the gate electrode, adjacent to the first drift region, with a depth less than a depth of the first drift region so that the first drift region and the second drift region together form a stepwise shape. A sum of a depth of the second drift region, a depth of the gate dielectric, and a depth of the gate electrode may be of substantially a same value as a depth of the first drift region. The first drift region and the second drift region may be formed at the same time, using the gate electrode as a part of the implanting mask.
    Type: Application
    Filed: January 11, 2013
    Publication date: July 17, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fu-Yu Chu, Chih-Chang Cheng, Tung-Yang Lin, Ruey-Hsin Liu
  • Patent number: 8760500
    Abstract: Aspects of the disclosure relate generally to generating depth data from a video. As an example, one or more computing devices may receive an initialization request for a still image capture mode. After receiving the request to initialize the still image capture mode, the one or more computing devices may automatically begin to capture a video including a plurality of image frames. The one or more computing devices track features between a first image frame of the video and each of the other image frames of the video. Points corresponding to the tracked features may be generated by the one or more computing devices using a set of assumptions. The assumptions may include a first assumption that there is no rotation and a second assumption that there is no translation. The one or more computing devices then generate a depth map based at least in part on the points.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: June 24, 2014
    Assignee: Google Inc.
    Inventors: David Gallup, Fu Yu, Steven Maxwell Seitz
  • Publication number: 20140158155
    Abstract: One or more techniques or systems for cleaning wafers during semiconductor fabrication or an associated brush are provided herein. In some embodiments, the brush includes a brush body and one or more inner hole supports within the brush body. For example, a first inner hole support and a second inner hole support define a first inner hole associated with a first size. For another example, a third inner hole support and a fourth inner hole support define a second inner hole associated with a second size different than the first size. In some embodiments, a cleaning solution is applied to a wafer based on a first flow rate at a first brush position and based on a second flow rate at a second brush position. In this manner, a flow field associated with wafer cleaning is provided, thus enhancing cleaning efficiency, for example.
    Type: Application
    Filed: December 7, 2012
    Publication date: June 12, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shang-Yuan Yu, Ming-Te Chen, Chi-Fu Yu, Shao-Yen Ku, Tzu-Yang Chung, Hsiao Chien-Wen, Shan-Ching Lin
  • Publication number: 20140122932
    Abstract: The present invention provides a method and system for information analysis. The method extracts a plurality of metadata from a source information set so as to generate a metadata set, the metadata comprising error log information that forms an error sequence in the metadata set; and generates a common error sequence set for a plurality of the metadata sets. By means of the method, it is possible to easily obtain a global error sequence pattern, and easily compare a new error with a previous error sequence pattern so as to prevent, diagnose and recover the new error.
    Type: Application
    Filed: October 28, 2013
    Publication date: May 1, 2014
    Applicant: EMC Corporation
    Inventors: Chao Chen, Fu Yu, Jove Qianjie Zhong, Jingjing Liu, Qiyan Chen
  • Patent number: 8664718
    Abstract: A power MOSFET includes a semiconductor region extending from a top surface of a semiconductor substrate into the semiconductor substrate, wherein the semiconductor region is of a first conductivity type. A gate dielectric and a gate electrode are disposed over the semiconductor region. A drift region of a second conductivity type opposite the first conductivity type extends from the top surface of the semiconductor substrate into the semiconductor substrate. A dielectric layer has a portion over and in contact with a top surface of the drift region. A conductive field plate is over the dielectric layer. A source region and a drain region are on opposite sides of the gate electrode. The drain region is in contact with the first drift region. A bottom metal layer is over the field plate.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: March 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ruey-Hsin Liu, Hsiao-Chin Tuan
  • Publication number: 20140015440
    Abstract: A constant current control circuit includes a current source output module and at least two output circuits. Each of the output circuits includes an automatic constant current regulating module, a power transistor drive and control module electrically coupled to automatic constant current regulating module, and a load module formed of one or more LED devices and electrically coupled to a power transistor drive and control module. The constant current control circuit in operation tracks changes in current of each output circuit and regulates the currents of all the output circuits accordingly.
    Type: Application
    Filed: March 16, 2013
    Publication date: January 16, 2014
    Applicant: SHENZHEN SKYWORTH-RGB ELECTRONICS CO. LTD.
    Inventors: Zhao-Fu Yu, Ji Bai, Yan-Sheng Shao, Xian-Liang Luo
  • Publication number: 20130335463
    Abstract: A 2D/3D switchable display device comprising a display module, an optical control module and a driving module is disclosed. The optical control module comprises a plurality of optical controlling elements. The display module is disposed opposite to the optical control module and thereby relative information is generated. The driving module provides a corresponding pixel data matrix to the display module based on the optical controlling elements and the relative information.
    Type: Application
    Filed: June 11, 2013
    Publication date: December 19, 2013
    Inventors: Pei-Hsuan Chiang, Chiao-Fu Yu
  • Patent number: 8603643
    Abstract: The invention relates to an electronic component with Sn rich deposit layer on the part for electric connection, wherein the Sn rich deposit layer is a fine grained Sn rich deposit layer composed of grains with smaller size in the direction perpendicular to the deposit surface than in the direction parallel to the deposit surface. It also relates to a process for plating an electronic component, so as to form a Sn rich deposit layer on the part for electric connection, comprising the steps of: adjusting the composition of tin plating solution in which starter additive and brighter additive are included; moving the electronic component through the tin plating solution, so as to form a fine grained Sn rich deposit layer on the part for electric connection. As compared with the prior art, the invention can validly inhibit the whisker growth with low cost and reliable property.
    Type: Grant
    Filed: July 4, 2005
    Date of Patent: December 10, 2013
    Assignee: NXP, B.V.
    Inventors: Cheng-Fu Yu, Chia-Chun Chen, Pascal Oberndorff, Ker-Chang Hsieh
  • Publication number: 20130256833
    Abstract: A triple well isolate diode including a substrate having a first conductivity type and a buried layer formed in the substrate, where the buried layer has a second conductivity type. The triple well isolated diode including an epi-layer formed over the substrate and the buried layer, where the epi-layer has the first conductivity type. The triple well isolated diode including a first well formed in the epi-layer, where the first well has the second conductivity type, a second well formed in the epi-layer, where the second well has the first conductivity type and surrounds the first well, a third well formed in the epi-layer, where the third well has the second conductivity type and surrounds the second well. The triple well isolated diode including a deep well formed in the epi-layer, where the deep well has the first conductivity type and extends beneath the first well.
    Type: Application
    Filed: April 3, 2012
    Publication date: October 3, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chang CHENG, Fu-Yu CHU, Ruey-Hsin LIU
  • Publication number: 20130240984
    Abstract: A manufacture includes a doped layer, a body structure over the doped layer, a trench defined in the doped layer, an insulator partially filling the trench, and a first conductive feature buried in, and separated from the doped layer and the body structure by, the insulator. The doped layer has a first type doping. The body structure has an upper surface and includes a body region. The body region has a second type doping different from the first type doping. The trench has a bottom surface. The first conductive feature extends from a position substantially leveled with the upper surface of the body structure toward the bottom surface of the trench. The first conductive feature overlaps the doped layer for an overlapping distance, and the overlapping distance ranging from 0 to 2 ?m.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 19, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chang CHENG, Fu-Yu CHU, Ruey-Hsin LIU
  • Publication number: 20130134162
    Abstract: The disclosure relates to a container with an easily-detached lid, wherein the container has a main body and a lid. The main body has an opening, and a main body engaging element is disposed around the edge of the opening. The lid has a lid engaging element corresponding to the main body engaging element for allowing the lid to engage with the main body via the main body engaging element and the lid engaging element. The container with an easily-detached lid is characterized in that a wall is disposed at the outer boundary of the lid and the wall has at least one tilting portion.
    Type: Application
    Filed: September 13, 2012
    Publication date: May 30, 2013
    Inventors: Cheng-Kuei Fan, Yin-Kai Lee, Fu-Yu Cai, Shuo-Ren Syu
  • Publication number: 20130134512
    Abstract: A power MOSFET includes a semiconductor region extending from a top surface of a semiconductor substrate into the semiconductor substrate, wherein the semiconductor region is of a first conductivity type. A gate dielectric and a gate electrode are disposed over the semiconductor region. A drift region of a second conductivity type opposite the first conductivity type extends from the top surface of the semiconductor substrate into the semiconductor substrate. A dielectric layer has a portion over and in contact with a top surface of the drift region. A conductive field plate is over the dielectric layer. A source region and a drain region are on opposite sides of the gate electrode. The drain region is in contact with the first drift region.
    Type: Application
    Filed: January 11, 2012
    Publication date: May 30, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ruey-Hsin Liu, Hsiao-Chin Tuan
  • Publication number: 20130108071
    Abstract: The invention discloses a method for transmitting digital contents between devices. First digital contents are modulated into an audio signal in a first device, wherein the first digital contents include contact information and at least one index of at least one second digital content. The audio signal is outputted by at least one audio generator of the first device and then received by at least one audio receiver of a second device. The audio signal is demodulated in the second device to make the second device obtain the first digital contents. The second device obtains the at least one second digital content according to the at least one index of the at least one second digital contents through a wired or wireless communication.
    Type: Application
    Filed: January 20, 2012
    Publication date: May 2, 2013
    Applicant: KO-CHANG HUNG
    Inventors: Fu-Yu Huang, Min-Chun Lin, Feng-Hui Kuan, Ray-I Chang, Jing-Fa Tsai, Chao-Nan Wang, Wen-Jong Wu