Abstract: A metal capacitor provided includes a first metal layer and a second metal layer disposed above a substrate. The first metal layer includes a first electrode sheet and a second electrode sheet, and the second metal layer includes a third electrode sheet and a fourth electrode sheet. The first electrode sheet and the second electrode sheet collectively form a first coplanar capacitor. The third electrode sheet and the fourth electrode sheet collectively form a second coplanar capacitor. At least a portion of the fourth electrode sheet is arranged above the first electrode sheet, and the first electrode sheet and the fourth electrode sheet collectively form a first vertical capacitor. At least a portion of the third electrode sheet is arranged above the second electrode sheet, and the second electrode sheet and the third electrode sheet collectively form a second vertical capacitor.

Abstract: A high speed connector includes an insulated shelter for accommodating at least one main body. The main body includes at least one terminal group integrated with the main body by having two opposing sides thereof to extend out of the main body, in which the two opposing sides are defined as a contact portion and a welding portion, respectively. The terminal group further includes a plurality of terminals. The insulated plastic element has a slot for enclosing up terminal group, and a height of a section in the slot is larger than a thickness of the plurality of terminals, so that at least one gap can be formed in the slot. By having the gap, dielectric coefficients and electromagnetic properties around the terminals can be adjusted to reduce the crosstalk effects upon the signal terminals. In addition, an insulated plastic element is also provided.

Abstract: Provided are a semiconductor structure and a manufacturing method thereof. A first device structure layer is between a first substrate and a second substrate. A second device structure layer is between the second substrate and the first device structure layer. A first dielectric layer is between the first and second device structure layers. A second dielectric layer is on the second substrate. A through-silicon via (TSV) structure is in the second dielectric layer, the second substrate, the second device structure layer and the first dielectric layer. A connection pad is at the surface of the second dielectric layer and connected to the TSV structure. A first liner is between the TSV structure and the second dielectric layer, the second substrate and the second device structure layer. A second liner is between the top of the TSV structure and the second dielectric layer and a part of the second substrate.

Abstract: An electronic modulating device is provided. The electronic modulating device includes a first substrate. The first substrate includes a first portion and a second portion. The electronic modulating device also includes a second substrate disposed opposite to the first substrate. The electronic modulating device further includes at least one working device disposed between the first substrate and the second substrate, wherein the working device overlaps the first portion and does not overlap the second portion. In addition, the electronic modulating device includes a first adjustment unit disposed between the first portion of the first substrate and the second substrate. The first adjustment unit has a first elastic coefficient. The electronic modulating device also includes second adjustment unit disposed between the second portion of the first substrate and the second substrate. The second adjustment unit has a second elastic coefficient that is greater than the first elastic coefficient.

Abstract: A metal capacitor provided includes a first metal layer and a second metal layer disposed above a substrate. The first metal layer includes a first electrode sheet and a second electrode sheet, and the second metal layer includes a third electrode sheet and a fourth electrode sheet. The first electrode sheet and the second electrode sheet collectively form a first coplanar capacitor. The third electrode sheet and the fourth electrode sheet collectively form a second coplanar capacitor. At least a portion of the fourth electrode sheet is arranged above the first electrode sheet, and the first electrode sheet and the fourth electrode sheet collectively form a first vertical capacitor. At least a portion of the third electrode sheet is arranged above the second electrode sheet, and the second electrode sheet and the third electrode sheet collectively form a second vertical capacitor.

Abstract: The present disclosure provides a light-emitting device comprising a substrate with a topmost surface; a first semiconductor stack arranged on the substrate, and comprising a first top surface separated from the topmost surface by a first distance; a first bonding layer arranged between the substrate and the first semiconductor stack; a second semiconductor stack arranged on the substrate, and comprising a second top surface separated from the topmost surface by a second distance which is different form the first distance; a second bonding layer arranged between the substrate and the second semiconductor stack; a third semiconductor stack arranged on the substrate, and comprising third top surface separated from the topmost surface by a third distance; and a third bonding layer arranged between the substrate and the third semiconductor stack; wherein the first semiconductor stack, the second semiconductor stack, and the third semiconductor stack are configured to emit different color lights.

Abstract: A semiconductor structure and a method of forming the same are provided. In the semiconductor structure, contact spacers are formed at least on sidewalls of contact trenches in the substrate, so that the distance between the gate and the silicide layers disposed only on the bottom surfaces, rather than on the sidewalls and the bottom surfaces, of the contact trenches can be increased, and thus the current leakage induced by gate can be decreased.

Abstract: An electronic device includes: a storage device containing a target block having multiple word lines and multiple bit lines; a transmission interface configured to operably receive data to be written into the storage device; and a controller circuit including: an access circuit; and a flash memory control circuit configured to operably control the access circuit to write a first data into one or more pages connected with a first word line in the target block using a first program scheme, and to operably control the access circuit to write a second data into one or more pages connected with a second word line in the target block using a second program scheme, so that the first data and the second data are stored in the target block at the same time.

Abstract: A light-emitting device, includes a substrate with a top surface; a first light-emitting structure unit and a second light-emitting structure unit separately formed on the top surface and adjacent to each other, and wherein the first light-emitting structure unit includes a first sidewall and a second sidewall; a trench between the first and the second light-emitting structure units; and an electrical connection arranged on the first sidewall and the second light-emitting structure unit, and electrically connecting the first light-emitting structure unit and the second light-emitting structure unit; wherein the first sidewall connects to the top surface; wherein the first sidewall faces the second light-emitting structure units, and the second sidewall is not between the first light-emitting structure unit and the second light-emitting structure unit; and wherein the second sidewall is steeper than the first sidewall.

Abstract: A method for processing image data and a system thereof are provided. The method is operated in the system including an encoding system and a decoding system. In the decoding system, multiple image data packages are received from the encoding system. The image data packages include multiple encoded data that are formed by encoding the pixels of an image and the pixels are beforehand rearranged according to an arrangement order. The arrangement order is exemplarily made based on the quantity of encoding circuits of the encoding system. In the decoding system, the encoded data received from the encoding system are sequentially stored in a memory according to the arrangement order. The decoding circuits start to decode the encoded data from an initial code synchronously for enhancing decoding performance. The method can be applied to decoding of high resolution images. The image is reproduced after the decoding process.

Abstract: A concentrated solar power generation system includes a movable platform having a groove, a Fresnel lens located in the groove of the movable platform, a header located below the Fresnel lens, a plurality of heat collection tubes arranged in a circular array, a reflector with a tapered surface, and a support base. The header has a water circulation pipe, an inlet pipe and an outlet pipe. The inlet pipe and the outlet pipe each are communicated to the water circulation pipe. A lower end of each of the heat collection tubes is fixed on the support seat, and an upper end of each of the heat collection tubes contacts the water circulation pipe. The reflector is mounted on the support base and located in a space enclosed by the heat collection tubes.

Abstract: A device for capturing particles includes a gas-guiding unit, a gas-guiding unit and a mist-elimination unit. The gas-guiding unit has opposing first and second ends. The mist-elimination unit is disposed at the second end. The liquid-circulation unit, disposed under the mist-elimination unit by surrounding the gas-guiding unit, includes through holes below the gas-guiding unit by a gap. A gas containing particles enters the channel via the first end and then the mist-elimination unit via the second end. While the gas flows into the channel, the liquid in the liquid-circulation unit is inhaled into the channel via the gap to form droplets containing particles. After the droplets are captured by the mist-elimination unit, the liquid formed at the mist-elimination unit flows down into the liquid-circulation unit to reform the liquid to be further inhaled back to the channel of the gas-guiding unit via the gap.

Abstract: The disclosure provides an electromagnetic wave adjusting device, including a first substrate, a first conductive element, a second substrate, a second conductive element, and a dielectric layer. The first conductive element is disposed on the first substrate. The second substrate is opposite to the first substrate. The second conductive element is disposed on the second substrate and faces the first substrate, in which the first conductive element has an overlapping region which overlaps the second conductive element. The dielectric layer is disposed between the first substrate and the second substrate. The electromagnetic wave adjusting device includes a working region and a non-working region. The working region includes the overlapping region. The non-working region is disposed outside the working region. A first region in the non-working region and a second region in the working region have the same film-layer stack structure.

Abstract: A semiconductor structure and a method of forming the same are provided. In the semiconductor structure, contact spacers are formed at least on sidewalls of contact trenches in the substrate, so that the distance between the gate and the silicide layers disposed only on the bottom surfaces, rather than on the sidewalls and the bottom surfaces, of the contact trenches can be increased, and thus the current leakage induced by gate can be decreased.

Abstract: A high-voltage semiconductor device integrates a MOS transistor with a Schottky barrier diode. The MOS transistor has a semiconductor substrate of a first conduction type, a well of a second conduction, a body of the first conduction type, and a doped source of the second type. A control gate formed above the body controls electric connection between the doped source and the well. The Schottky barrier diode has a metal, functioning to be an anode of the Schottky barrier diode and contacting the well to form a Schottky barrier junction therebetween.

Abstract: A light-emitting device includes a supportive substrate and a first light-emitting element on the supportive substrate. The first light-emitting element includes a first light-emitting stacked layer having a first surface and a second surface opposite to the first surface, and a first transparent layer on the first surface and electrically connected to the first light-emitting stacked layer. A second light-emitting element locates on the supportive substrate and a metal layer electrically connects to the first light-emitting element and the second light-emitting element and physically connects to the first transparent layer. The first light-emitting stacked layer includes a first width and the first transparent layer includes a second width different from the first width from a cross section view of the light-emitting device.

Abstract: A memory controller includes: an interface configured to operably communicate with a host device; a temperature detecting circuit configured to operably detect an ambient temperature, wherein when the ambient temperature is beyond a predetermined temperature range, the temperature detecting circuit generates a control signal; and a processing circuit coupled to the interface and the temperature detecting circuit, for selecting one of a plurality of data program schemes to program data into a first storage block of a flash memory according to the control signal.

Abstract: Disclosed herein is a light-emitting device.

Abstract: A digital circuit robustness verification method is provided that includes the following steps. An internal storage circuit and an external storage circuit corresponding to a circuit under test are set to store a plurality of random values and a configuration of the circuit under test for performing a predetermined function is set by a processing circuit. A driving signal corresponding to the predetermined function is transmitted to the circuit under test by a previous stage circuit, such that the circuit under test executes the predetermined function to further generate an output signal. The determination as to whether the output signal is correct or not is made by a next stage circuit, and the circuit under test is determined to pass a robustness verification when the output signal is correct.

Abstract: An ReRAM structure includes a dielectric layer. A first ReRAM and a second ReRAM are disposed on the dielectric layer. The second ReRAM is at one side of the first ReRAM. A trench is disposed in the dielectric layer between the first ReRAM and the second ReRAM. The first ReRAM includes a bottom electrode, a variable resistive layer and a top electrode. The variable resistive layer is between the bottom electrode and the top electrode. A width of the bottom electrode is smaller than a width of the top electrode. The width of the bottom electrode is smaller than a width of the variable resistive layer.