Patents by Inventor Fu Huang

Fu Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103063
    Abstract: A method for inspecting electronic components and an electronic device are provided. The electronic device includes electronic elements, signal lines, an inspection structure, a substrate and a first driving element electrically connected to the signal lines. The signal lines include a first and a second signal lines. The electronic components include a first group of electronic components electrically connected to the first signal line and a second group of electronic components electrically connected to the second signal line. The first signal line has a first portion overlapping a first inspection region and a second portion overlapping the first driving element. The second signal line has a third portion overlapping a second inspection region and a fourth portion overlapping the first driving element. A distance between the second portion and the fourth portion is smaller than a distance between the first portion and the third portion.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 28, 2024
    Applicant: Innolux Corporation
    Inventor: Zhi-Fu Huang
  • Patent number: 11921380
    Abstract: An electronic device is provided. The electronic device includes a working region and a non-working region adjacent to the working region. The electronic device includes a first substrate, a first photo spacer, a second photo spacer, and a plurality of third photo spacers. The first photo spacer is disposed on the first substrate in the working region and has a first thickness. The second photo spacer is disposed on the first substrate in the non-working region and has a second thickness. The plurality of third photo spacers are disposed on the first substrate. The first photo spacer is disposed between two of the plurality of third photo spacers. At least one of the plurality of third photo spacers has a third thickness. The first thickness is different from the second thickness, and the third thickness is less than the first thickness.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: March 5, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tang-Chin Hung, Zhi-Fu Huang
  • Publication number: 20240064794
    Abstract: A scheduling method for beamforming and a network entity are provided. In the method, a future location is predicted according to one or more past locations of a user equipment (UE). A precoder is determined according to the future location. A direction of a beam of a base station is determined according to the precoder. The past locations are locations of the UE at one or more past time points, and the future location is a location of the UE at a future time point. The precoder reflects a downlink channel state at the future time point. Accordingly, the communication quality can be improved.
    Type: Application
    Filed: October 5, 2022
    Publication date: February 22, 2024
    Applicant: Wistron Corporation
    Inventor: Yuan Fu Huang
  • Patent number: 11901480
    Abstract: The present disclosure provides a light-emitting device comprising a substrate with a topmost surface; a first semiconductor stack arranged on the substrate, and comprising a first top surface separated from the topmost surface by a first distance; a first bonding layer arranged between the substrate and the first semiconductor stack; a second semiconductor stack arranged on the substrate, and comprising a second top surface separated from the topmost surface by a second distance which is different form the first distance; a second bonding layer arranged between the substrate and the second semiconductor stack; a third semiconductor stack arranged on the substrate, and comprising third top surface separated from the topmost surface by a third distance; and a third bonding layer arranged between the substrate and the third semiconductor stack; wherein the first semiconductor stack, the second semiconductor stack, and the third semiconductor stack are configured to emit different color lights.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: February 13, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Fu Huang, Chih-Chiang Lu, Chun-Yu Lin, Hsin-Chih Chiu
  • Publication number: 20240047395
    Abstract: A semiconductor structure includes a first chip and a second chip bonded to the first chip. The first chip includes a first semiconductor substrate, a first multi-level interconnect structure over the first semiconductor substrate, a first redistribution layer (RDL) over a conductive line of the first multi-level interconnect structure, a compact layer over the first RDL and the first multi-level interconnect structure, a cap layer over the compact layer, and a metal pad on the first RDL. The second chip includes a second semiconductor substrate, a second multi-level interconnect structure over the second semiconductor substrate, and conductive structure extending from the second multi-level interconnect structure to the metal pad.
    Type: Application
    Filed: August 8, 2022
    Publication date: February 8, 2024
    Inventors: Sheng-Fu HUANG, Shing-Yih SHIH
  • Patent number: 11887529
    Abstract: A pixel array is provided. The pixel array includes a plurality of pixels, wherein each of the pixels includes a light emitting diode, a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to the first transistor and an anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to the second transistor. The fourth transistor is coupled to an anode of a light emitting diode of an adjacent pixel, a control terminal of the third transistor, and a cathode of the light emitting diode. The fifth transistor is coupled to the cathode of the light emitting diode, and receives a second control signal and a system low voltage.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: January 30, 2024
    Assignee: Au Optronics Corporation
    Inventors: Ya-Jung Wang, Jing-Wun Jhang, Rong-Fu Lin, Nien-Chen Li, Hsien-Chun Wang, Che-Chia Chang, June Woo Lee, Hsin-Ying Lin, Chia-Ting Hsieh, Chien-Fu Huang, Sung-Yu Su
  • Publication number: 20240030170
    Abstract: An electronic device including a plurality of electronic components, a first substrate, a second substrate, and a third substrate is provided. The first substrate includes a first driving circuit and a first connection pad. The second substrate includes a second driving circuit and a second connection pad, and the first connection pad is coupled to the second connection pad. The first substrate, the second substrate, and the plurality of electronic components are disposed on the third substrate.
    Type: Application
    Filed: June 28, 2023
    Publication date: January 25, 2024
    Applicant: Innolux Corporation
    Inventor: Zhi-Fu Huang
  • Publication number: 20240032192
    Abstract: An electronic device, including multiple electronic elements, a first substrate, a second substrate, and a third substrate, is provided. The first substrate includes a first device element and a first connection pad. The second substrate includes a second device element and a second connection pad. The third substrate includes a first connection line, wherein the first connection pad and the second connection pad are coupled to the first connection line, and the first substrate, the second substrate, and the electronic elements are disposed on the third substrate.
    Type: Application
    Filed: June 29, 2023
    Publication date: January 25, 2024
    Applicant: Innolux Corporation
    Inventor: Zhi-Fu Huang
  • Patent number: 11877433
    Abstract: The present invention provides a storage node contact structure of a memory device comprising a substrate having a dielectric layer comprising a recess, a first tungsten metal layer, and an adhesive layer on the first tungsten metal layer and a second tungsten metal layer on the adhesive layer, wherein the second tungsten metal layer is formed by a physical vapor deposition (PVD).
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: January 16, 2024
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Pin-Hong Chen, Tsun-Min Cheng, Chih-Chieh Tsai, Tzu-Chieh Chen, Kai-Jiun Chang, Chia-Chen Wu, Yi-An Huang, Yi-Wei Chen, Hsin-Fu Huang, Chi-Mao Hsu, Li-Wei Feng, Ying-Chiao Wang, Chung-Yen Feng
  • Publication number: 20240012227
    Abstract: This document describes systems and techniques directed at an external wide-angle lens for imagers in electronic devices. An imager is disclosed that includes an image sensor and a lens stack, the lens stack including an external wide-angle lens, an internal lens, and four or more intermediate lenses. The imager has a first ratio of a projection at a vertex of the external wide-angle lens divided by a maximum focused dimension of the focal area being less than or equal to 0.15, a second ratio of a total length of the lens stack divided by the maximum focused dimension being less than or equal to 7.0, or a third ratio of a total transmission length of the imager divided by an entrance pupil diameter of the external wide-angle lens being between 1.2 and 2.6.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Applicant: Google LLC
    Inventors: Shan Fu Huang, Chen Cheng Lee, Tsung-Dar Cheng, Calvin Kyaw Wong
  • Patent number: 11815291
    Abstract: A concentrated solar power generation system includes a movable platform having a groove, a Fresnel lens located in the groove of the movable platform, a header located below the Fresnel lens, a plurality of heat collection tubes arranged in a circular array, a reflector with a tapered surface, and a support base. The header has a water circulation pipe, an inlet pipe and an outlet pipe. The inlet pipe and the outlet pipe each are communicated to the water circulation pipe. A lower end of each of the heat collection tubes is fixed on the support seat, and an upper end of each of the heat collection tubes contacts the water circulation pipe. The reflector is mounted on the support base and located in a space enclosed by the heat collection tubes.
    Type: Grant
    Filed: November 29, 2020
    Date of Patent: November 14, 2023
    Assignees: GUANGDONG POLYTECHNIC NORMAL UNIVERSITY, GUANGDONG NACRE HYDRAULIC CO., LTD., CENTRAL SOUTH UNIVERSITY
    Inventors: Yong Yang, Chongjie Zhao, Fu Huang, Shaoming Luo, Guoquan Zhang, Junjie Li, Xiayun Liu, Yulong Yao, Wei Fu, Jian Yang
  • Publication number: 20230361021
    Abstract: A semiconductor interconnection structure includes a lower inter-level dielectric layer located above a substrate, a lower metal via located in the lower inter-level dielectric layer, a first horizontal dielectric layer located over the lower inter-level dielectric layer and the lower metal via, an upper inter-level dielectric layer located over the first horizontal dielectric layer and having a dielectric constant smaller than that of the first horizontal dielectric layer, an upper metal via located in the upper inter-level dielectric layer and the first horizontal dielectric layer, and electrically connected to the lower metal via, a diffusion barrier layer located around the upper metal via, and located between the upper inter-level dielectric layer and the upper metal via; and a dielectric sidewall located the diffusion barrier layer and the upper inter-level dielectric layer.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Inventor: Sheng-Fu HUANG
  • Publication number: 20230353139
    Abstract: An electronic device, a setting method for determining a common voltage of the electronic device, and a setting method for determining a driving voltage difference range of the electronic device are provided. The electronic device includes a data line, a tunable element, and a control element. The control element stores a threshold voltage of the tunable element. The threshold voltage is a driving voltage difference corresponding to a maximum capacitance value. The control element is configured to provide a first input voltage to the data line and receive a first output voltage. The control element is configured to provide a second input voltage to the data line and receive a second output voltage. The control element determines a desired common voltage according to at least one of the first output voltage and the second output voltage and according to the threshold voltage of the tunable element.
    Type: Application
    Filed: March 15, 2023
    Publication date: November 2, 2023
    Applicant: Innolux Corporation
    Inventor: Zhi-Fu Huang
  • Patent number: 11795733
    Abstract: A knob-less horizontal-shift fire door lock includes a base including a longitudinal bar, an unlocked-state positioning member arranged in the longitudinal bar and having a positioning section; a latch pivoted to the base and having a free end elastically biased outside the base to engage a keeper on a door jamb; a push board pivoted in the base; and a handle bar slidably mounted on the longitudinal bar. The handle bar is biased by an elastic element to protrude outwards and moving a guide pin to slide in a guide groove of the positioning section. The handle bar is depressible toward the longitudinal bar to move the push board to drive the latch to retract into the base to achieve an unlocked state. The handle bar is further shiftable horizontally to cause the guide pin to slide into a horizontal groove of the positioning section for being secured in position.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: October 24, 2023
    Inventor: Shen-Fu Huang
  • Patent number: 11784441
    Abstract: A connector structure includes an insulated housing, at least one terminal assembly and at least one conductive assembly. The terminal assembly is disposed in the insulated housing. The conductive assembly is disposed at one side of the terminal assembly by crossing over the terminal assembly. The conductive assembly includes at least one metal piece and at least one polymer included conductive component. The polymer included conductive component is used to electrically connect the at least one metal pieces. The metal piece includes at least one spring finger contact, and the spring finger contact is electrically connected to the ground terminal in the terminal assembly. In additional, a terminal assembly structures of connector is also provided.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: October 10, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tien-Fu Huang, Li-Sen Chen, Yi-Fu Chiu, I-Ting Hsieh
  • Publication number: 20230317452
    Abstract: A hard mask structure includes a tungsten-based conductive layer, a carbon-based hard mask layer and a nitride layer. The carbon-based hard mask layer is formed over the Tungsten-based conductive layer. The nitride layer is formed between the tungsten-based conductive layer and the carbon-based hard mask layer to enhance adhesion therebetween.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Inventors: Sheng-Fu HUANG, Kuan Hua CHEN
  • Patent number: 11765496
    Abstract: An in-ear earphone, including a casing, a speaker, and an attenuation guide, is provided. The casing includes a sound outlet and a first through hole. An inside of the casing has a first accommodating space. The speaker is disposed in the first accommodating space. The casing defines a front cavity and a rear cavity by the speaker. The attenuation guide is formed in the casing and includes at least a first attenuation channel and a second attenuation channel. The first attenuation channel has a first inlet and a first outlet. The first inlet is connected to the first through hole. The second attenuation channel has a second inlet and a second outlet. The second inlet, the first outlet, and the rear cavity are acoustically connected, and the second outlet is connected to the front cavity.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: September 19, 2023
    Assignee: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Chan-Tsung Tsai, Tien-Fu Huang, Ke Chin Wang
  • Publication number: 20230292291
    Abstract: A resource adjustment method for a radio access network includes obtaining a plurality of radio access network training information at a first time point; predicting a radio access network usage condition of a second time point according to the plurality of radio access network training information; and pre-adjusting the radio access network resource allocation of the second time point according to the radio access network usage condition at a third time point, so as to allocate a plurality of user equipments to a plurality of radio units and adjust an arrangement of computing resources of a distributed unit and a central unit; wherein the first time point is earlier than the third time point, and the third time point is earlier than the second time point.
    Type: Application
    Filed: June 1, 2022
    Publication date: September 14, 2023
    Applicant: Wistron Corporation
    Inventor: Yuan-Fu Huang
  • Patent number: 11742242
    Abstract: Provided are a semiconductor structure and a manufacturing method thereof. A first device structure layer is between a first substrate and a second substrate. A second device structure layer is between the second substrate and the first device structure layer. A first dielectric layer is between the first and second device structure layers. A second dielectric layer is on the second substrate. A through-silicon via (TSV) structure is in the second dielectric layer, the second substrate, the second device structure layer and the first dielectric layer. A connection pad is at the surface of the second dielectric layer and connected to the TSV structure. A first liner is between the TSV structure and the second dielectric layer, the second substrate and the second device structure layer. A second liner is between the top of the TSV structure and the second dielectric layer and a part of the second substrate.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: August 29, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Shing-Yih Shih, Sheng-Fu Huang
  • Patent number: D1003327
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: October 31, 2023
    Assignee: Hiwin Technologies Corp.
    Inventors: Jonus Liu, Jheng-Fu Huang, Yi-Chan Tseng, Shou-Yang Huang