Patents by Inventor Fu Lin

Fu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10684559
    Abstract: An apparatus for cleaning an electrostatic reticle holder used in a lithography system includes a chamber for providing a low pressure environment for the electrostatic reticle holder and an ultrasound transducer configured to apply ultrasound waves to the electrostatic reticle holder. The apparatus further includes a controller configured to control the ultrasound transducer and a gas flow controller. The gas flow controller is configured to enable pressurizing or depressurizing the chamber.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: June 16, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Fu Lin, Tung-Jung Chang, Chia-Chen Chen
  • Publication number: 20200185325
    Abstract: A structure of semiconductor device includes a substrate, having a dielectric layer on top. At least two metal elements are formed in the dielectric layer, wherein an air gap is between adjacent two of the metal elements. A cap layer is disposed over the substrate, wherein a portion of the cap layer above the adjacent two of the metal elements has a hydrophilic surface. An inter-layer dielectric layer is disposed on the cap layer. The inter-layer dielectric layer seals the air gap between the two metal elements. The air gap remains and extends higher than a top surface of the metal elements.
    Type: Application
    Filed: December 6, 2018
    Publication date: June 11, 2020
    Applicant: United Microelectronics Corp.
    Inventors: Da-Jun Lin, Bin-Siang Tsai, San-Fu Lin
  • Patent number: 10679932
    Abstract: A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: June 9, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Fu Lin, Ho-Yi Tsai, Chin-Tsai Yao
  • Publication number: 20200168523
    Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.
    Type: Application
    Filed: August 6, 2019
    Publication date: May 28, 2020
    Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Kuo-Hua Yu, Wen-Shan Tsai, En-Li Lin, Kaun-I Cheng, Wei-Ping Wang
  • Patent number: 10665546
    Abstract: A structure of semiconductor device includes a substrate, having a dielectric layer on top. At least two metal elements are formed in the dielectric layer, wherein an air gap is between adjacent two of the metal elements. A cap layer is disposed over the substrate, wherein a portion of the cap layer above the adjacent two of the metal elements has a hydrophilic surface. An inter-layer dielectric layer is disposed on the cap layer. The inter-layer dielectric layer seals the air gap between the two metal elements. The air gap remains and extends higher than a top surface of the metal elements.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: May 26, 2020
    Assignee: United Microelectronics Corp.
    Inventors: Da-jun Lin, Bin-Siang Tsai, San-Fu Lin
  • Patent number: 10650212
    Abstract: An optical identification method for sensing a physiological feature, includes: projecting light to a physiological portion for generating reflection light from the physiological portion; receiving the reflection light, to generate an image; generating slant pattern information according to the image; transforming the slant pattern information into a pattern identification matrix; and determining the physiological feature according to the pattern identification matrix.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: May 12, 2020
    Assignee: BEYOND TIME INVETMENTS LIMITED
    Inventors: Chu-Hsin Chang, Jun-Shian Hsiao, Ju-Yu Yu, Chun-Fu Lin, Yu-Ming Cheng, Hui-Min Tsai
  • Patent number: 10637690
    Abstract: An apparatus for performing decision feedback equalizer (DFE) adaptation control is provided. The apparatus includes arithmetic circuits, slicers, sample and hold circuits, a phase detector and a control circuit for related operations. The control circuit generates parameters at least according to an error sample value and data sample values, and dynamically updates the parameters based on at least one predetermined rule to perform the DFE adaptation control. The parameters include a first parameter, another parameter and a factor adjustment parameter. Regarding at least one data pattern, the control circuit selectively replaces the error sample value with a predetermined value according to whether a temporary storage value of the error sample value conforms to a predetermined condition to control the other parameter and the first parameter, in order to prevent triggering an unstable effect and thereby prevent abnormal operations.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: April 28, 2020
    Assignees: FARADAY TECHNOLOGY CORPORATION, Faraday Technology Corp.
    Inventors: Fu-Chien Tsai, Yin-Fu Lin, Ling Chen
  • Patent number: 10627728
    Abstract: A method for creating a vacuum in a load lock chamber is provided. The method includes building an air-tight environment in the load lock chamber. The method further includes reducing the pressure in a gas tank to a predetermined vacuum pressure. The method also includes enabling an exchange of gas between the load lock chamber and the gas tank when the pressure in the gas tank is at the predetermined vacuum pressure so as to reduce the pressure in the load lock chamber to an adjusted vacuum pressure.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: April 21, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tung-Jung Chang, Yu-Fu Lin, Sheng-Kang Yu
  • Publication number: 20200111749
    Abstract: A method of forming a package and a package are provided. The method includes placing a main die and a dummy die side by side on a carrier substrate. The method also includes forming a molding material along sidewalls of the main die and the dummy die. The method also includes forming a redistribution layer comprising a plurality of vias and conductive lines over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die. The method also includes removing the carrier substrate.
    Type: Application
    Filed: December 6, 2019
    Publication date: April 9, 2020
    Inventors: Yan-Fu Lin, Chen-Hua Yu, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen
  • Publication number: 20200105181
    Abstract: A display device comprising an active area and a surrounding area is provided. The active area includes a common electrode for receiving a common voltage. The surrounding area is located at a side of the active area, and the surrounding area includes a shielding metal layer and a surrounding circuit. The shielding metal layer is electrically isolated from the common electrode and receives a shielding voltage. The surrounding circuit and a first shielding metal are overlapped in a vertical projection direction, and the common voltage is power-isolated from the shielding voltage.
    Type: Application
    Filed: December 2, 2019
    Publication date: April 2, 2020
    Inventors: Rong-Fu LIN, Kai-Wei HONG, Jie-Chuan HUANG, Peng-Bo XI, Sung-Yu SU
  • Publication number: 20200094459
    Abstract: Provided is a liquid silicone molding die, including a first mold base, having at least one first molding zone and a feed hole on one side thereof and having a feeding mechanism coupled to the feed hole on the other side thereof, wherein the feeding mechanism is coupled to an injection machine to inject a raw material, and a heating element is provided around the first molding zone; and a second mold base, operatively facing or separating from the first mold base, corresponding to the side of the first mold base and correspondingly provided with a second molding zone, an injection channel, a sealing ring groove and a sealing ring.
    Type: Application
    Filed: August 29, 2019
    Publication date: March 26, 2020
    Inventors: Shun-Fu Lin, Yu-Chang Su
  • Patent number: 10600708
    Abstract: An electronic package and a method for fabricating the same are provided. The method includes disposing on a carrier an electronic component having a plurality of conductors, encapsulating the electronic component with an encapsulant, and disposing an electronic device on the encapsulant. The electronic device and the carrier are electrically connected through the conductors, thereby reducing the overall thickness of the electronic package.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: March 24, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Wen-Shan Tsai, Chee-Key Chung, Chang-Fu Lin
  • Publication number: 20200093006
    Abstract: This present disclosure provides an electronic package and a method for manufacturing the same. An antenna board with a limiter is stacked on a circuit board. A support body for holding the antenna board and the circuit board in place is provided between the antenna board and the circuit board, such that in the process of forming the support body, the limiter stops the flow of an adhesive material of the support body, and the adhesive material of the support body is prevented from overflowing onto an antenna structure of the antenna board to make sure that the antenna of the antenna board functions properly.
    Type: Application
    Filed: November 27, 2018
    Publication date: March 19, 2020
    Inventors: Ying-Chang Tseng, Yuan-Hung Hsu, Chang-Fu Lin
  • Publication number: 20200091109
    Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.
    Type: Application
    Filed: November 21, 2019
    Publication date: March 19, 2020
    Inventors: Yu-Min Lo, Chee-Key Chung, Chang-Fu Lin, Kuo-Hua Yu, Hsiang-Hua Huang
  • Publication number: 20200091059
    Abstract: Provided is a substrate structure including a substrate body, electrical contact pads and an insulating protection layer disposed on the substrate body, wherein the insulating protection layer has openings exposing the electrical contact pads, and at least one of the electrical contact pads has at least a concave portion filled with a filling material to prevent solder material from permeating along surfaces of the insulating protection layer and the electric contact pads, thereby eliminating the phenomenon of solder extrusion. Thus, bridging in the substrate structure can be eliminated even when the bump pitch between two adjacent electrical contact pads is small. As a result, short circuits can be prevented, and production yield can be increased.
    Type: Application
    Filed: November 21, 2019
    Publication date: March 19, 2020
    Inventors: Chang-Fu Lin, Chin-Tsai Yao, Chun-Tang Lin, Fu-Tang Huang
  • Patent number: 10576669
    Abstract: Provided is an injection molding device, including an injection port arranged on an upper mold base; an upper mold arranged in the upper mold base, wherein at least one ejection port, a gasket groove and a gasket are provided and the ejection portion is connected to the injection port; a lower mold base operatively aligned with or separated from the upper mold base and provided with at least one gas passage for the gas to enter or exit; and a lower mold disposed on the lower mold base. The lower mold base is aligned with or separated from the upper mold base, the lower mold is provided with a mold cavity and at least one shaped air path is provided to connect the mold cavity with the gas passage. The lower mold is a porous material and has a plurality of pores. Gas is pre-injected into the mold cavity through the gas passage and at least one air path to maintain a preset pressure inside the mold cavity.
    Type: Grant
    Filed: September 16, 2018
    Date of Patent: March 3, 2020
    Assignee: RAYSPERT PRECISION INDUSTRIAL INC.
    Inventors: Shun-Fu Lin, Yu-Chang Su
  • Publication number: 20200054936
    Abstract: A device and method for dropping ball and non-transitory computer-readable medium are provided in this disclosure. The device includes a launcher, a display and a processor. The launcher is configured to launch a first ball according to a control signal. The display is configured to display a gameplay frame. The processor is configured to transmit the control signal to the launcher according to a trigger signal, wherein, when the first ball dropped into a trigger unit when the launcher is launches the first ball; the trigger unit is configured to transmit a dropping ball result to the processor, and the processer is configured to transmit the gameplay frame to the display according to the dropping ball result.
    Type: Application
    Filed: April 9, 2019
    Publication date: February 20, 2020
    Inventor: Ko-Fu LIN
  • Patent number: 10566476
    Abstract: Some embodiments of the present disclosure provide an optical sensor. The optical sensor includes a semiconductive substrate; a light sensing region on the semiconductive substrate; a waveguide region configured to guide light from a wave insert portion through a waveguide portion and to a sample holding portion; and an interconnect region below the waveguide region, and the interconnect region being disposed above the light sensing region. The waveguide portion includes a first dielectric layer comprising a first refractive index and at least one second dielectric layer comprising a second refractive index, wherein the second refractive index is smaller than the first refractive index.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: February 18, 2020
    Assignee: PERSONAL GENOMICS, INC.
    Inventors: Teng-Chien Yu, Sheng-Fu Lin, Ming-Sheng Yang
  • Patent number: D875696
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: February 18, 2020
    Assignee: SHENZHEN SKYWORTH-RGB ELECTRONIC CO., LTD
    Inventors: Fu Lin, Lixing Chen, Zhiyong Chen, Shuxiao Wei, Feixiang Fang, Xinhua Zhang, Xiaohui Zhang, Shusan Yang
  • Patent number: D884679
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: May 19, 2020
    Assignee: SHENZHEN SKYWORTH-RGB ELECTRONIC CO., LTD
    Inventors: Fu Lin, Lixing Chen, Zhiyong Chen, Shuxiao Wei, Feixiang Fang, Xinhua Zhang, Xiaohui Zhang, Shusan Yang