Patents by Inventor Fu Lin

Fu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240222456
    Abstract: A semiconductor device includes a semiconductor layer and a gate structure on the semiconductor layer. The gate structure includes a multi-stepped gate dielectric on the semiconductor layer and a gate electrode on the multi-stepped gate dielectric. The multi-stepped gate dielectric includes a first gate dielectric segment having a first thickness and a second gate dielectric segment having a second thickness that is less than the first thickness.
    Type: Application
    Filed: March 19, 2024
    Publication date: July 4, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Fu LIN, Chia-Ta HSIEH, Tsung-Hao YEH
  • Publication number: 20240217109
    Abstract: An automated transport vehicle for transporting an article includes a carrying seat, a mechanical arm and a holding mechanism. The holding mechanism includes at least one first positioning post and at least one second positioning post and, when the holding mechanism holds the article, the first positioning post is in contact with a side surface of the article, and the second positioning post is in contact with a bottom surface of the article.
    Type: Application
    Filed: November 28, 2023
    Publication date: July 4, 2024
    Inventors: Chien-Wei CHEN, Hsin-Yi HSU, Shiang-Fu LIN
  • Patent number: 12027484
    Abstract: An electronic package is provided and includes a carrier for carrying electronic components. Electrical contact pads of the carrier for planting solder balls are connected with a plurality of columnar conductors, and the conductors are electrically connected to a circuit portion in the carrier. By connecting a plurality of conductors with a single electrical contact pad, structural stress can be distributed and breakage of the circuit portion can be prevented.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: July 2, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Ren Chen, Po-Yung Chang, Pei-Geng Weng, Yuan-Hung Hsu, Chang-Fu Lin, Don-Son Jiang
  • Publication number: 20240207928
    Abstract: The invention provides a composite particle material for selective laser sintering (SLS), which is composed of an inorganic powder coated with a binder. The composite particulate material is formed by mixing the inorganic powder and the binder to have the binder directly coated on the outer surface of the inorganic powder. In addition, the inorganic powder to be coated by the binder is preferably using a powder having a smaller particle size and a larger particle size distribution, and thereby the production cost can be greatly reduced. Further, since the outer surface of the inorganic powder is coated with the binder, there are no problems such as causing oxidation of the inorganic powder and so on. Furthermore, manufacturing the composite particle material can be easily carried out in a general ambient or an atmospheric environment, and the powder material after use is recyclable.
    Type: Application
    Filed: January 16, 2023
    Publication date: June 27, 2024
    Inventors: Yu-Deh Chao, Shu-Cheng Liu, Jeng-Ywan Jeng, Fu-Lin Chen
  • Patent number: 12017386
    Abstract: Provided is a mold core structure, which is arranged on a mold.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: June 25, 2024
    Inventors: Shun Fu Lin, Yu-Chang Su
  • Publication number: 20240206124
    Abstract: A separated heat dissipating device, and an optical module system thereof, includes at least one heat dissipating module and at least one suspension mechanism. The heat dissipating module has a lateral surface that can abut against an electronic device's surface, and another lateral surface disposed with at least one first mounting member and mountable with the suspension mechanism. The suspension mechanism includes at least one elastic element that can be sleeved around the first mounting member, a fixing plate formed with at least one through hole allowing passage of the first mounting member and the elastic element to be located between the heat dissipating module and the fixing plate, and at least one second mounting member that can be assembled with the first mounting member. The heat dissipating module moves towards the fixing plate and compresses the elastic element when a surface thereof is applied with a force.
    Type: Application
    Filed: May 1, 2023
    Publication date: June 20, 2024
    Applicant: Alpha Networks Inc.
    Inventors: HAO HUANG, GUAN-FU LIN
  • Patent number: 11994809
    Abstract: The present disclosure provides an exhaust system for discharging from semiconductor manufacturing equipment a hazardous gas. The exhaust system includes: a main exhaust pipe positioned above the semiconductor manufacturing equipment and having a top surface and a bottom surface extending parallel to the top surface; a first branch pipe including an upstream end coupled to a source of a gas mixture and a downstream end connected to the main exhaust pipe through the top surface; a second branch pipe including an upstream end and a downstream end connected to the main exhaust pipe through the bottom surface; and a detector configured to detect presence of the hazardous gas in the second branch pipe.
    Type: Grant
    Filed: June 20, 2023
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Fu Lin, Shih-Chang Shih, Chia-Chen Chen
  • Patent number: 11984379
    Abstract: Provided is an electronic package, in which a heat dissipating body is formed on an electronic device and is combined with a heat sink so that the electronic device, the heat dissipating body and the heat sink form a receiving space, and a heat dissipating material is formed in the receiving space and in contact with the heat sink and the electronic device, where a fluid regulating space is formed between the heat dissipating material and the heat dissipating body and is used as a volume regulating space for the heat dissipating material during thermal expansion and contraction.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: May 14, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
  • Patent number: 11978740
    Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Harry-Hak-Lay Chuang, Kuo-Ching Huang, Wei-Cheng Wu, Hsin Fu Lin, Henry Wang, Chien Hung Liu, Tsung-Hao Yeh, Hsien Jung Chen
  • Patent number: 11978392
    Abstract: A precharge method for a data driver includes steps of: outputting a display data to a plurality of output terminals of the data driver; outputting a second precharge voltage to an output terminal among the plurality of output terminals prior to outputting the display data to the output terminal, to precharge the output terminal to a voltage level closer to an output voltage; and outputting a first precharge voltage to the output terminal prior to outputting the second precharge voltage. The first precharge voltage provides a faster voltage transition on the output terminal than the second precharge voltage.
    Type: Grant
    Filed: May 31, 2023
    Date of Patent: May 7, 2024
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Min-Yang Chiu, Yu-Sheng Ma, Jin-Yi Lin, Hsuan-Yu Chen, Jhih-Siou Cheng, Chun-Fu Lin
  • Patent number: 11973014
    Abstract: Provided is a substrate structure including a substrate body, electrical contact pads and an insulating protection layer disposed on the substrate body, wherein the insulating protection layer has openings exposing the electrical contact pads, and at least one of the electrical contact pads has at least a concave portion filled with a filling material to prevent solder material from permeating along surfaces of the insulating protection layer and the electric contact pads, thereby eliminating the phenomenon of solder extrusion. Thus, bridging in the substrate structure can be eliminated even when the bump pitch between two adjacent electrical contact pads is small. As a result, short circuits can be prevented, and production yield can be increased.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: April 30, 2024
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Fu Lin, Chin-Tsai Yao, Chun-Tang Lin, Fu-Tang Huang
  • Patent number: 11967563
    Abstract: A Fan-Out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Fu Lin, Chen-Hua Yu, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen
  • Patent number: 11959230
    Abstract: A molding system includes a frame device, a scooping device, a demolding device, a cutting device, an inspection device, a packaging device, and a conveying device. The frame device defines a scooping zone, a hot pressing zone, a cutting zone, an inspection zone, and a packaging zone. The scooping device includes a pulp tank that is adapted to contain a slurry, and a scooping mold that is adapted to scoop the slurry such that the slurry forms a blank unit thereon. The cutting device is adapted to cut the blank unit into a plurality of blank bodies. The conveying device is adapted to convey the blank bodies from the cutting zone to the packaging zone through the inspection zone.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: April 16, 2024
    Inventors: Fu-Lin Hsiao, Yang-Han Lee
  • Patent number: 11961890
    Abstract: A semiconductor device includes a semiconductor layer and a gate structure on the semiconductor layer. The gate structure includes a multi-stepped gate dielectric on the semiconductor layer and a gate electrode on the multi-stepped gate dielectric. The multi-stepped gate dielectric includes a first gate dielectric segment having a first thickness and a second gate dielectric segment having a second thickness that is less than the first thickness.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Fu Lin, Chia-Ta Hsieh, Tsung-Hao Yeh
  • Patent number: 11950431
    Abstract: A magnetic tunnel junction (MTJ) device includes two magnetic tunnel junction elements and a magnetic shielding layer. The two magnetic tunnel junction elements are arranged side by side. The magnetic shielding layer is disposed between the magnetic tunnel junction elements. A method of forming said magnetic tunnel junction (MTJ) device includes the following steps. An interlayer including a magnetic shielding layer is formed. The interlayer is etched to form recesses in the interlayer. The magnetic tunnel junction elements fill in the recesses. Or, a method of forming said magnetic tunnel junction (MTJ) device includes the following steps. A magnetic tunnel junction layer is formed. The magnetic tunnel junction layer is patterned to form magnetic tunnel junction elements. An interlayer including a magnetic shielding layer is formed between the magnetic tunnel junction elements.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: April 2, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei Chen, Hui-Lin Wang, Yu-Ru Yang, Chin-Fu Lin, Yi-Syun Chou, Chun-Yao Yang
  • Patent number: 11948499
    Abstract: A driving circuit includes a first transistor, a capacitor, a second transistor, and a driving transistor. The first transistor is configured to provide a data signal according to a first scan signal. The capacitor is coupled to the first transistor, and the capacitor includes a first terminal and a second terminal. The second transistor is coupled to the first transistor, and the second transistor is configured to provide a start signal according to the data signal. The driving transistor is coupled to the second transistor, and the driving transistor is configured to output a driving signal according to the start signal.
    Type: Grant
    Filed: August 12, 2022
    Date of Patent: April 2, 2024
    Assignee: AUO CORPORATION
    Inventors: Rong-Fu Lin, June-Woo Lee, Sung-Yu Su
  • Patent number: 11942087
    Abstract: A device performs a method for using image data to aid voice recognition. The method includes the device capturing image data of a vicinity of the device and adjusting, based on the image data, a set of parameters for voice recognition performed by the device. The set of parameters for the device performing voice recognition include, but are not limited to: a trigger threshold of a trigger for voice recognition; a set of beamforming parameters; a database for voice recognition; and/or an algorithm for voice recognition. The algorithm may include using noise suppression or using acoustic beamforming.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: March 26, 2024
    Assignee: Google Technology Holdings LLC
    Inventors: Robert A. Zurek, Adrian M. Schuster, Fu-Lin Shau, Jincheng Wu
  • Publication number: 20240096753
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes: a substrate having a device area and a peripheral area surrounding the device area; a via, disposed at the peripheral area and extending at least partially through the substrate; an insulating structure, disposed at the peripheral area, extending at least partially through the substrate and surrounding the via; and a doped region, disposed at the peripheral area, over or in the substrate and adjacent to the via.
    Type: Application
    Filed: January 18, 2023
    Publication date: March 21, 2024
    Inventors: Harry-Haklay Chuang, Shiang-Hung Huang, Hsin Fu Lin
  • Patent number: 11935918
    Abstract: An integrated circuit (IC) device comprises a high voltage semiconductor device (HVSD) on a frontside of a semiconductor body and further comprises an electrode on a backside of the semiconductor body opposite the frontside. The HVSD may, for example, be a transistor or some other suitable type of semiconductor device. The electrode has one or more gaps directly beneath the HVSD. The one or more gaps enhance the effectiveness of the electrode for improving the breakdown voltage of the HVSD.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Harry-Hak-Lay Chuang, Hsin Fu Lin, Tsung-Hao Yeh
  • Patent number: D1018907
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: March 19, 2024
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Yun-Chien Lee, Yi-Ching Hsu, Pei-Yi Lin, Yu-Hung Su, Sheng-Yuan Huang, Chun-Fu Lin