Patents by Inventor Fu Lin

Fu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8476164
    Abstract: A method of manufacturing semiconductor device is provided. A substrate at least with a patterned silicon-containing layer on the substrate and spacers adjacent to the patterned silicon-containing layer is provided. A metal layer is formed on the substrate and covers the patterned silicon-containing layer and spacers. Then, a capping layer is formed on the metal layer. A first rapid thermal process is performed to at least make a portion of the metal layer react with the substrate around the spacers to form transitional silicides. The capping layer and the unreacted portions of the metal layer are removed. A first nitride film with a first tensile stress S1 is formed on the substrate. A second rapid thermal process is performed to transfer the transitional silicide to a silicide and transfer the first nitride film to a second nitride film with a second tensile stress S2, wherein S2>S1.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: July 2, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chin-Fu Lin, Chin-Cheng Chien, Chih-Chien Liu, Chia-Lin Hsu, Chun-Yuan Wu
  • Publication number: 20130154012
    Abstract: A manufacturing method for semiconductor device having metal gate includes providing a substrate having a first semiconductor device and a second semiconductor device formed thereon, the first semiconductor device having a first gate trench and the second semiconductor device having a second gate trench; sequentially forming a high dielectric constant (high-k) gate dielectric layer and a multiple metal layer on the substrate; forming a first work function metal layer in the first gate trench; performing a first pull back step to remove a portion of the first work function metal layer from the first gate trench; forming a second work function metal layer in the first gate trench and the second gate trench; and performing a second pull back step to remove a portion of the second work function metal layer from the first gate trench and the second gate trench.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 20, 2013
    Inventors: Ssu-I Fu, Wen-Tai Chiang, Ying-Tsung Chen, Shih-Hung Tsai, Chien-Ting Lin, Chi-Mao Hsu, Chin-Fu Lin
  • Publication number: 20130153969
    Abstract: A structure for a metal-oxide-semiconductor field-effect transistor (MOSFET) sensor is provided. The structure includes a MOSFET, a sensing membrane, and a reference electrode. The reference electrode and the sensing membrane are formed on the first surface of the MOSFET and are arranged in such a way that the reference electrode and the sensing membrane are uniformly and electrically coupled to each other. Thus, the electric field between the sensing membrane and the reference electrode is uniformly distributed therebetween to stabilize the working signal of the MOSFET sensor.
    Type: Application
    Filed: March 13, 2012
    Publication date: June 20, 2013
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Ying-Zong JUANG, Hann-Huei Tsai, Hsin-Hao Liao, Chen-Fu Lin
  • Patent number: 8466521
    Abstract: A hydrogen ion-sensitive field effect transistor and a manufacturing method thereof are provided. The hydrogen ion-sensitive field effect transistor includes a semiconductor substrate, an insulating layer, a transistor gate, and a sensing film. A gate area is defined on the semiconductor substrate having a source area and a drain area. The insulating layer is formed within the gate area on the semiconductor substrate. The transistor gate is deposited within the gate area and includes a first gate layer. Further, the first gate layer is an aluminum layer, and a sensing window is defined thereon. The sensing film is an alumina film formed within the sensing window by oxidizing the first gate layer. Thus, the sensing film is formed without any film deposition process, and consequently the manufacturing method is simplified.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: June 18, 2013
    Assignee: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Chin-Long Wey, Chin-Fong Chiu, Ying-Zong Juang, Hann-Huei Tsai, Chen-Fu Lin
  • Publication number: 20130150522
    Abstract: A modified conjugated diene rubber is disclosed. A method for producing the modified conjugated diene rubber includes providing an alkali metal ion-containing conjugated diene rubber; and reacting the alkali metal ion-containing conjugated diene rubber with an alkoxysilane to generate the modified conjugated diene rubber, the alkoxysilane being of the structural formula: wherein R1, R2, R3 are each independently selected from a group consisting of oxygen-containing C2-C12 group and nitrogen-containing C3-C12 group, the oxygen-containing C2-C12 group has a carbon atom directly connected to oxygen atom of the alkoxysilane, the nitrogen-containing C1-C12 group has a nitrogen atom directly connected to oxygen atom of the alkoxysilane, and R4 is selected from a group consisting of C3-C12 of alkyl, alkenyl, aryl, and alkoxy.
    Type: Application
    Filed: September 7, 2012
    Publication date: June 13, 2013
    Applicant: TSRC CORPORATION
    Inventors: Chi-Chen Hsieh, Fu Lin, Chi-Ta Tsai, Hui-Kai Lin, Bo-Han Lin
  • Publication number: 20130146899
    Abstract: A complementary metal-oxide semiconductor (CMOS) sensor with an image sensing unit integrated therein is provided. The CMOS sensor includes a first substrate, a CMOS circuit, and a sensing device. The first substrate has the image sensing unit formed thereon. The CMOS circuit is disposed on the first substrate and has a receiving space. The sensing device is disposed in the receiving space. The image sensing unit is located at a position from which the image sensing unit can monitor the sensing device. Accordingly, the image sensing unit monitors the sensing device by sensing its image.
    Type: Application
    Filed: February 29, 2012
    Publication date: June 13, 2013
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Ying-Zong JUANG, Hann-Huei Tsai, Hsin-Hao Liao, Chen-Fu Lin
  • Publication number: 20130146637
    Abstract: A trigger structure for switching one shoot mode or repeat shoot mode includes a trigger member and a switching member. The trigger member has a recess defined laterally. Two protrusions are defined in the inner wall of the recess. The switching member has an adjusting member and a trigger plate. Under this arrangement, when the adjusting member is pressed into the recess, the trigger plate is at one position to allow the trigger to shoot in a repeat shoot mode; when the adjusting member is turned to abut against the two protrusions, the trigger plate is at another position to allow the trigger to shoot in a one shoot mode.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 13, 2013
    Inventor: Tien-Fu LIN
  • Publication number: 20130141260
    Abstract: A pipelined ADC includes a first, second, and third pairs of comparators. The first pair of comparators compare an input voltage to a first positive reference voltage and to a first negative reference voltage. The second pair of comparators compare the input voltage to a second positive reference voltage and to a second negative reference voltage. Each comparator of the first and second pairs of comparators outputs a digital signal to an encoder. A third pair of comparators compares the input voltage to a third positive reference voltage and to a third negative reference voltage, and a comparator compares the input voltage to ground. The comparator and each comparator of the third pair of comparators is configured to output respective digital signals to an encoder. A multiplying digital-to-analog converter outputs a voltage based on the input voltage, an output from the encoder, and an output of the random number generator.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 6, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fang-Shi Jordan LAI, Hsu-Feng HSUEH, Chin-Hao CHANG, Cheng Yen WENG, Chih-Cheng LU, Manoj M. MHALA, Yung-Fu LIN
  • Patent number: 8451151
    Abstract: A capacitance mismatch calibrating method for a successive approximation register ADC which includes at least one array of capacitors is provided. The method includes the following steps: firstly, at least two compensating capacitors are configured. A capacitor from the array of capacitors is selected as a capacitor-under-test. Then, the terminal voltages on the terminals of the array of capacitors and on the terminals of the compensating capacitors are determined. A first comparison voltage is outputted based on the determined terminal voltages. Afterwards, a sequence of comparisons is controlled based on the first comparison voltage and a second comparison voltage to output a sequence of corresponding digital bits. Finally, a calibration value is calculated to calibrate the value of a capacitor-under-test according to the digital bits.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: May 28, 2013
    Assignee: Himax Technologies Limited
    Inventor: Jin-Fu Lin
  • Publication number: 20130126105
    Abstract: A window covering includes a plurality of cord shrouds for enclosing or covering lift cords. Each of the cord shrouds may be continuously attached to the window covering material via a continuous attachment mechanism that includes one or more columns of stitching, beads of adhesive or welding. The cord shrouds may prevent the lift cords from being pulled away from the window covering material to form loops that could pose a danger to a young child. Embodiments of the window covering may be configured as top down bottom up shades or other types of shades. The window covering material may be composed of any of a number of different materials. For example, the window covering material could include pleated material, or could be comprised of a sheet of material consisting of woven wood, interconnected fabric segments, non woven fabric or woven fabric.
    Type: Application
    Filed: November 23, 2011
    Publication date: May 23, 2013
    Applicant: WHOLE SPACE INDUSTRIES LTD
    Inventor: Tzong-Fu Lin
  • Publication number: 20130128548
    Abstract: A color filter array on pixel array substrate includes a substrate, an active device array, a wavelength converting layer, a first passivation layer, a second passivation layer, a color filter array, and a pixel electrode layer. The active device array is disposed on the substrate. The wavelength converting layer is disposed on the active device array and includes at least one first wavelength converting pattern. The first passivation layer is disposed on the wavelength converting layer and the active device array and covers the first wavelength converting pattern and the active device array. The color filter array is disposed on the first passivation layer and includes a plurality of first, second, and third color filter patterns disposed alternately. The first wavelength converting pattern is disposed corresponding to one first color filter pattern. The second passivation layer and the pixel electrode layer are sequentially disposed on the color filter array.
    Type: Application
    Filed: April 11, 2012
    Publication date: May 23, 2013
    Applicant: AU OPTRONICS CORPORATION
    Inventor: Shiuan-Fu Lin
  • Patent number: 8441384
    Abstract: A switched-capacitor circuit is disclosed. The switched-capacitor circuit includes a comparator having a first and second input, a first and second sampling capacitor, and a first and second switching circuitry. The first switching circuitry charges the first and second sampling capacitor with an input signal. The second switching circuitry selectively couples the first sampling capacitor with a reference voltage and selectively couples the second sampling capacitor and the first and second input of the comparator to a common voltage. The comparator performs a compare of the input signals against the reference voltage, and outputs a signal.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: May 14, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fang-Shi Lai, Manoj M. Mhala, Yung-Fu Lin, Hsu-Feng Hsueh, Chin-Hao Chang, Cheng Yen Weng
  • Patent number: 8441072
    Abstract: A non-planar semiconductor structure includes a substrate, at least two fin-shaped structures, at least an isolation structure, and a plurality of epitaxial layers. The fin-shaped structures are located on the substrate. The isolation structure is located between the fin-shaped structures, and the isolation structure has a nitrogen-containing layer. The epitaxial layers respectively cover a part of the fin-shaped structures and are located on the nitrogen-containing layer. A non-planar semiconductor process is also provided for forming the semiconductor structure.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: May 14, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Shih-Hung Tsai, Chien-Ting Lin, Chin-Cheng Chien, Chin-Fu Lin, Chih-Chien Liu, Teng-Chun Tsai, Chun-Yuan Wu
  • Patent number: 8441086
    Abstract: An image sensor packaging structure with a predetermined focal length is provided. The image sensor packaging structure includes a substrate, a chip, an optical assembly, and an encapsulation compound. The chip has a sensitization area and is coupled to the substrate. Conductive contacts on the substrate are electrically connected with conductive contacts around the sensitization area. The optical assembly has the predetermined focal length and is disposed above the chip so as to form an air cavity between the optical assembly and the sensitization area of the chip. The encapsulation compound is formed on the substrate to surround the chip and the optical assembly. With the above stated structure, not only can the focus adjusting procedure be dispensed with, but also the image sensor packaging structure can be manufactured by a molding or dispensing process.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: May 14, 2013
    Assignee: Kingpak Technology Inc.
    Inventors: Hsiu-Wen Tu, Chung-Hsien Hsin, Chun-Hua Chuang, Ren-Long Kuo, Chin-Fu Lin, Young-Houng Shiao
  • Patent number: 8431473
    Abstract: A method for fabricating a semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a dielectric layer on the substrate, wherein the dielectric layer comprises metal interconnects therein; forming a top metal layer on the dielectric layer; and forming a passivation layer on the top metal layer through high-density plasma chemical vapor deposition (HDPCVD) process.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: April 30, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Shu-Hui Hu, Shih-Feng Su, Hui-Shen Shih, Chih-Chien Liu, Po-Chun Chen, Ya-Jyuan Hung, Bin-Siang Tsai, Chin-Fu Lin
  • Publication number: 20130091968
    Abstract: A tension device for a corded-loop drive system has a base with a sprocket on the base such that the cord loop travels over the sprocket. At least one resilient finger has a first end attached to the base and a free end. Each finger is sized and positioned to engage the cord loop when the tension device is not properly mounted to a wall or window frame and prevent movement of the cord loop around the sprocket. There is a hole in the finger through which a screw passes. When the base is placed on a mounting surface and the screw is driven into the mounting surface, the free end of the finger will have moved from the first position to a second position away from the cord so that the cord loop may move around the sprocket and the window covering can be fully raised and fully lowered.
    Type: Application
    Filed: October 14, 2011
    Publication date: April 18, 2013
    Applicant: WHOLE SPACE INDUSTRIES LTD
    Inventor: Tzong-Fu Lin
  • Publication number: 20130093358
    Abstract: A driving circuit of a light emitting diode (LED) and a ghost phenomenon elimination circuit thereof are disclosed. The ghost phenomenon elimination circuit which includes a ghost phenomenon elimination unit and a counter unit may determine a black insertion period according to a gray scale clock signal, and output an enable signal to the ghost phenomenon elimination unit during the black insertion period. The ghost phenomenon elimination unit may pull up the voltage levels at current driving terminals of the driving circuit so as to prevent the ghost phenomenon from occurring.
    Type: Application
    Filed: July 20, 2012
    Publication date: April 18, 2013
    Applicant: MY-SEMI INC.
    Inventors: CHUN-FU LIN, CHUN-TING KUO, CHENG-HAN HSIEH
  • Patent number: 8421652
    Abstract: A decoding circuit is adapted for decoding an input signal. The input signal includes at least a break and the time length of the break is a preset time. The decoding circuit includes a decoding unit and a detecting unit. The detecting unit detects whether the voltage level of the input signal is kept at a specific logic level for more than the preset time. If the input signal is kept at the specific logic level for more than the preset time, the detecting circuit, according to the voltage level of the specific logic level, outputs the input signal or the inverted input signal to the decoding unit so as to perform a decoding process.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: April 16, 2013
    Assignee: MY-Semi Inc.
    Inventors: Chun-Ting Kuo, Chun-Fu Lin, Cheng-Han Hsieh
  • Patent number: 8422238
    Abstract: The present invention provides a signal conversion device comprising: a substrate having a first surface and a second surface, the first surface being provided with a first contact region comprising at least a first contact and a second contact while the second surface being provided with a second contact region comprising at least a third contact and a fourth contact; wherein there is an electrical connection between the first and third contacts, and the second and fourth contacts are electrically connected to an IC fabricated using Wafer Level Chip Scale Package (WLCSP) or Chip On Film (COF) technology, and wherein the IC is disposed at the first surface or the second surface.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: April 16, 2013
    Assignee: Phytrex Technology Corporation
    Inventors: Feng Chi Hsiao, Kun Shan Yang, Tung Fu Lin, Chin Fen Cheng, Chih Wei Lee
  • Patent number: D683563
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: June 4, 2013
    Assignee: Whole Space Industries Ltd
    Inventor: Tzong-Fu Lin